mb/starlabs/{lite_adl,byte_adl}: Don't select MAINBOARD_HAS_TPM2
[coreboot2.git] / src / soc / intel / xeon_sp / gnr / soc_util.c
blob9d8e815f8e78f41ea1bce92e6207a99b08e0b207
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <assert.h>
4 #include <cpu/intel/cpu_ids.h>
5 #include <device/device.h>
6 #include <device/pci.h>
7 #include <fsp/util.h>
8 #include <soc/util.h>
9 #include <soc/acpi.h>
10 #include <soc/chip_common.h>
11 #include <soc/pci_devs.h>
12 #include <soc/soc_util.h>
13 #include <stdlib.h>
14 #include <string.h>
15 #include <MemoryMapDataHob.h>
17 const char *pciroot_res_to_domain_type(const UDS_STACK_RES *sr, const UDS_PCIROOT_RES *pr)
19 int index = 0;
20 int instance = -1;
22 for (; index < sr->PciRootBridgeNum; index++) {
23 if (sr->PciRoot[index].UidType == pr->UidType)
24 instance++;
25 if (sr->PciRoot[index].BusBase == pr->BusBase)
26 break;
29 if (index == sr->PciRootBridgeNum)
30 return NULL;
32 switch (pr->UidType) {
33 case PC_UID:
34 return DOMAIN_TYPE_PCIE;
35 case DINO_UID:
36 return DOMAIN_TYPE_DINO;
37 case CPM0_UID:
38 return DOMAIN_TYPE_CPM0;
39 case HQM0_UID:
40 return DOMAIN_TYPE_HQM0;
41 case UB_UID:
42 return (instance == 0) ? DOMAIN_TYPE_UBX0 : DOMAIN_TYPE_UBX1;
43 default:
44 return NULL;
48 static bool is_domain_type_supported_on_stack(const xSTACK_RES *sr, const char *dt)
50 for (unsigned int index = 0; index < sr->PciRootBridgeNum; index++)
51 if (!strcmp(dt, pciroot_res_to_domain_type(sr, &sr->PciRoot[index])))
52 return true;
54 return false;
57 bool is_pcie_iio_stack_res(const xSTACK_RES *res)
59 return is_domain_type_supported_on_stack(res, DOMAIN_TYPE_PCIE);
62 bool is_ioat_iio_stack_res(const xSTACK_RES *res)
64 return (is_domain_type_supported_on_stack(res, DOMAIN_TYPE_DINO) ||
65 is_domain_type_supported_on_stack(res, DOMAIN_TYPE_CPM0) ||
66 is_domain_type_supported_on_stack(res, DOMAIN_TYPE_HQM0));
70 bool is_ubox_stack_res(const xSTACK_RES *res)
72 return (is_domain_type_supported_on_stack(res, DOMAIN_TYPE_UBX0) ||
73 is_domain_type_supported_on_stack(res, DOMAIN_TYPE_UBX1));
76 bool is_iio_cxl_stack_res(const xSTACK_RES *res)
78 return false;
81 const struct SystemMemoryMapHob *get_system_memory_map(void)
83 size_t hob_size;
84 const EFI_GUID mem_hob_guid = MEMORY_MAP_HOB_GUID;
85 const struct SystemMemoryMapHob **memmap_addr;
87 memmap_addr = (const struct SystemMemoryMapHob **)
88 fsp_find_extension_hob_by_guid((uint8_t *)&mem_hob_guid, &hob_size);
89 /* hob_size is the size of the 8-byte address not the hob data */
90 assert(memmap_addr != NULL && hob_size != 0);
91 /* assert the pointer to the hob is not NULL */
92 assert(*memmap_addr != NULL);
94 return *memmap_addr;
97 const struct SystemMemoryMapElement *get_system_memory_map_elment(uint8_t *num)
99 const struct SystemMemoryMapHob *hob = get_system_memory_map();
100 if (!hob)
101 return NULL;
103 *num = hob->numberEntries;
104 return hob->Element;
107 const CXL_NODE_SOCKET *get_cxl_node(void)
109 size_t hob_size;
110 static const CXL_NODE_SOCKET *hob;
111 const EFI_GUID fsp_hob_cxl_node_socket_guid = CXL_NODE_HOB_GUID;
113 if (hob != NULL)
114 return hob;
116 hob = fsp_find_extension_hob_by_guid((uint8_t *)&fsp_hob_cxl_node_socket_guid, &hob_size);
117 if (hob == NULL || hob_size == 0) {
118 printk(BIOS_DEBUG, "CXL_NODE_HOB_GUID not found: CXL may not be installed\n");
119 return NULL;
121 return hob;
124 uint8_t get_cxl_node_count(void)
126 const CXL_NODE_SOCKET *hob = get_cxl_node();
127 uint8_t count = 0;
129 if (hob == NULL)
130 return 0;
131 for (unsigned int skt_id = 0 ; skt_id < MAX_SOCKET; skt_id++)
132 count += hob[skt_id].CxlNodeCount;
134 return count;
137 bool is_memtype_reserved(uint16_t mem_type)
139 return false;
142 bool is_memtype_non_volatile(uint16_t mem_type)
144 return false;
147 bool is_memtype_processor_attached(uint16_t mem_type)
149 return true;
152 bool get_mmio_high_base_size(resource_t *base, resource_t *size)
154 return false;