1 ## SPDX-License-Identifier: GPL-2.0-only
3 config MISSING_BOARD_RESET
6 Selected by boards that don't provide a do_board_reset()
7 implementation. This activates a stub that logs the missing
8 board reset and halts execution.
13 Selected by features that use Ada code in romstage.
18 Selected by features that use Ada code in ramstage.
20 config RAMSTAGE_LIBHWBASE
24 Selected by features that require `libhwbase` in ramstage.
26 config ROMSTAGE_LIBHWBASE
30 Selected by features that require `libhwbase` in romstage.
32 config FLATTENED_DEVICE_TREE
35 Selected by features that require to parse and manipulate a flattened
36 devicetree in ramstage.
38 config HAVE_SPD_IN_CBFS
41 If enabled, add support for adding spd.hex files in cbfs as spd.bin
42 and locating it runtime to load SPD.
48 Total number of memory DIMM slots available on motherboard.
49 It is multiplication of number of channel to number of DIMMs per
56 Total SPD size that will be used for DIMM.
57 Ex: DDR3 256, DDR4 512.
59 config SPD_READ_BY_WORD
62 config SPD_CACHE_IN_FMAP
66 Enables capability to cache DIMM SPDs in a dedicated FMAP region
67 to speed loading of SPD data. Currently requires board-level
68 romstage implementation to read/write/utilize cached SPD data.
69 When the default FMAP is used, will create a region named RW_SPD_CACHE
70 to store the cached SPD data.
72 config SPD_CACHE_FMAP_NAME
74 depends on SPD_CACHE_IN_FMAP
75 default "RW_SPD_CACHE"
77 Name of the FMAP region created in the default FMAP to cache SPD data.
79 if RAMSTAGE_LIBHWBASE && !ROMSTAGE_LIBHWBASE
81 config HWBASE_DYNAMIC_MMIO
88 config HWBASE_STATIC_MMIO
93 if RAMSTAGE_LIBHWBASE || ROMSTAGE_LIBHWBASE
95 config HWBASE_DEFAULT_MMCONF
97 default ECAM_MMCONF_BASE_ADDRESS
99 config HWBASE_DIRECT_PCIDEV
107 If your platform really doesn't want to use an FMAP cache (e.g. due to
108 space constraints), you can select this to disable warnings and save
114 This option enables eSPI library helper functions for displaying debug
117 config NO_CBFS_MCACHE
120 Disables the CBFS metadata cache. This means that your platform does
121 not need to provide a CBFS_MCACHE section in memlayout and can save
122 the associated CAR/SRAM size. In that case every single CBFS file
123 lookup must re-read the same CBFS directory entries from flash to find
126 config CBFS_CACHE_ALIGN
130 Sets the alignment of the buffers returned by the cbfs_cache.
134 depends on COOP_MULTITASKING
136 When enabled it will be possible to preload CBFS files into the
137 cbfs_cache. This helps reduce boot time by loading the files
138 in the background before they are actually required. This feature
139 depends on the read-only boot_device having a DMA controller to
140 perform the background transfer.
142 config DECOMPRESS_OFAST
144 depends on COMPILER_GCC
147 Compile the decompressing function in -Ofast instead of standard -Os
150 def_bool y if VENDOR_EMULATION
152 When enabled it will be possible to detect usable RAM using probe_ram
155 config HAVE_CUSTOM_BMP_LOGO