src/mainboard/amd/mayan/port_descriptors.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/i2c_simple.h>
   5 #include <gpio.h>
   6 #include <soc/platform_descriptors.h>
   7 #include <types.h>
   8
   9
  10
  11 static const fsp_dxio_descriptor mayan_dxio_descriptors[] = {
  12         {
  13                 // MXM
  14                 .engine_type = PCIE_ENGINE,
  15                 .port_present = true,
  16                 .start_lane = 0,
  17                 .end_lane = 3,
  18                 .device_number = 1,
  19                 .function_number = 1,
  20                 .link_speed_capability = GEN_MAX,
  21                 .turn_off_unused_lanes = true,
  22                 .link_aspm = ASPM_L1,
  23                 .link_aspm_L1_1 = true,
  24                 .link_aspm_L1_2 = true,
  25                 .link_hotplug = HOTPLUG_DISABLED,
  26                 .gpio_group_id = 4,
  27                 .clk_pm_support = true,
  28                 .clk_req = CLK_REQ0,
  29                 .eq_preset = 3,
  30                 .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}
  31         },
  32         {
  33                 // M2 SSD0-NVME
  34                 .engine_type = PCIE_ENGINE,
  35                 .port_present = true,
  36                 .start_lane = 16,
  37                 .end_lane = 19,
  38                 .device_number = 2,
  39                 .function_number = 4,
  40                 .link_speed_capability = GEN_MAX,
  41                 .turn_off_unused_lanes = true,
  42                 .link_aspm = ASPM_L1,
  43                 .link_aspm_L1_1 = true,
  44                 .link_aspm_L1_2 = true,
  45                 .link_hotplug = HOTPLUG_DISABLED,
  46                 .gpio_group_id = 27,
  47                 .clk_pm_support = true,
  48                 .clk_req = CLK_REQ4,
  49                 .eq_preset = 3,
  50                 .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}
  51         },
  52         {
  53                 // X1
  54                 .engine_type = PCIE_ENGINE,
  55                 .port_present = true,
  56                 .start_lane = 12,
  57                 .end_lane = 12,
  58                 .device_number = 1,
  59                 .function_number = 3,
  60                 .link_speed_capability = GEN_MAX,
  61                 .turn_off_unused_lanes = true,
  62                 .link_aspm = ASPM_L1,
  63                 .link_aspm_L1_1 = true,
  64                 .link_aspm_L1_2 = true,
  65                 .link_hotplug = HOTPLUG_DISABLED,
  66                 .clk_pm_support = true,
  67                 .clk_req = CLK_REQ2,
  68                 .eq_preset = 3,
  69                 .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}
  70         },
  71         {
  72                 // DT
  73                 .engine_type = PCIE_ENGINE,
  74                 .port_present = !CONFIG(DISABLE_DT_M2_MAYAN),
  75                 .start_lane = 8,
  76                 .end_lane = 9,
  77                 .device_number = 1,
  78                 .function_number = 2,
  79                 .link_speed_capability = GEN_MAX,
  80                 .turn_off_unused_lanes = true,
  81                 .link_aspm = ASPM_L1,
  82                 .link_aspm_L1_1 = true,
  83                 .link_aspm_L1_2 = true,
  84                 .link_hotplug = HOTPLUG_DISABLED,
  85                 .clk_pm_support = true,
  86                 .clk_req = CLK_REQ1,
  87                 .eq_preset = 3,
  88                 .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}
  89         },
  90 };
  91
  92 static fsp_ddi_descriptor mayan_ddi_descriptors[] = {
  93         { /* DDI0 - eDP */
  94                 .connector_type = DDI_EDP,
  95                 .aux_index = DDI_AUX1,
  96                 .hdp_index = DDI_HDP1
  97         },
  98         { /* DDI1 - HDMI/DP */
  99                 .connector_type = DDI_HDMI,
 100                 .aux_index = DDI_AUX2,
 101                 .hdp_index = DDI_HDP2
 102         },
 103         { /* DDI2 - DP (type C) */
 104                 .connector_type = DDI_DP,
 105                 .aux_index = DDI_AUX3,
 106                 .hdp_index = DDI_HDP3,
 107         },
 108         { /* DDI3 - DP (type C) */
 109                 .connector_type = DDI_DP,
 110                 .aux_index = DDI_AUX4,
 111                 .hdp_index = DDI_HDP4,
 112         },
 113         { /* DDI4 - unused */
 114                 .connector_type = DDI_UNUSED_TYPE,
 115                 .aux_index = DDI_AUX5,
 116                 .hdp_index = DDI_HDP5,
 117         }
 118 };
 119
 120 static uint8_t get_ddi1_type(void)
 121 {
 122         const uint8_t eeprom_i2c_bus = 2;
 123         const uint8_t eeprom_i2c_address = 0x55;
 124         const uint16_t eeprom_connector_type_offset = 2;
 125         uint8_t eeprom_connector_type_data[2];
 126         uint16_t connector_type;
 127
 128         if (i2c_2ba_read_bytes(eeprom_i2c_bus, eeprom_i2c_address,
 129                                eeprom_connector_type_offset, eeprom_connector_type_data,
 130                                sizeof(eeprom_connector_type_data))) {
 131                 printk(BIOS_NOTICE,
 132                        "Display connector type couldn't be determined. Disabling DDI1.\n");
 133                 return DDI_UNUSED_TYPE;
 134         }
 135
 136         connector_type = eeprom_connector_type_data[1] | eeprom_connector_type_data[0] << 8;
 137
 138         switch (connector_type) {
 139         case 0xc:
 140                 printk(BIOS_DEBUG, "Configuring DDI1 as HDMI.\n");
 141                 return DDI_HDMI;
 142         case 0x13:
 143                 printk(BIOS_DEBUG, "Configuring DDI1 as DP.\n");
 144                 return DDI_DP;
 145         case 0x14:
 146                 printk(BIOS_DEBUG, "Configuring DDI1 as eDP.\n");
 147                 return DDI_EDP;
 148         default:
 149                 printk(BIOS_WARNING, "Unexpected display connector type %x. Disabling DDI1.\n",
 150                        connector_type);
 151                 return DDI_UNUSED_TYPE;
 152         }
 153 }
 154
 155 void mainboard_get_dxio_ddi_descriptors(
 156                 const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
 157                 const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
 158 {
 159         mayan_ddi_descriptors[1].connector_type = get_ddi1_type();
 160         *dxio_descs = mayan_dxio_descriptors;
 161         *dxio_num = ARRAY_SIZE(mayan_dxio_descriptors);
 162         *ddi_descs = mayan_ddi_descriptors;
 163         *ddi_num = ARRAY_SIZE(mayan_ddi_descriptors);
 164 }