src/mainboard/asus/maximus_iv_gene-z/early_init.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <bootblock_common.h>
   4 #include <device/pnp_ops.h>
   5 #include <southbridge/intel/bd82x6x/pch.h>
   6 #include <superio/nuvoton/common/nuvoton.h>
   7 #include <superio/nuvoton/nct6776/nct6776.h>
   8
   9 const struct southbridge_usb_port mainboard_usb_ports[] = {
  10         { 1, 0, 0 },
  11         { 1, 0, 0 },
  12         { 1, 0, 1 },
  13         { 1, 0, 1 },
  14         { 1, 0, 2 },
  15         { 1, 0, 2 },
  16         { 1, 0, 3 },
  17         { 1, 0, 3 },
  18         { 1, 0, 4 },
  19         { 1, 0, 4 },
  20         { 1, 0, 5 },
  21         { 1, 0, 5 },
  22         { 1, 0, 6 },
  23         { 1, 0, 6 },
  24 };
  25
  26 void bootblock_mainboard_early_init(void)
  27 {
  28         static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
  29         static const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI);
  30
  31         nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
  32
  33         /* Select HWM/LED functions instead of floppy functions. */
  34         pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03);
  35         pnp_write_config(GLOBAL_PSEUDO_DEV, 0x24, 0x24);
  36
  37         /* Power RAM in S3. */
  38         pnp_set_logical_device(ACPI_DEV);
  39         pnp_write_config(ACPI_DEV, 0xe4, 0x10);
  40
  41         nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
  42 }