soc/intel: Remove blank lines before '}' and after '{'
[coreboot2.git] / src / mainboard / clevo / tgl-u / Kconfig
blob3ab0e9190f4a518e89b1a5185ee3fe04aff17d50
1 ## SPDX-License-Identifier: GPL-2.0-only
3 config BOARD_CLEVO_TGLU_COMMON
4         def_bool n
5         select BOARD_ROMSIZE_KB_16384
6         select DRIVERS_I2C_HID
7         select DRIVERS_INTEL_PMC
8         select DRIVERS_INTEL_USB4_RETIMER
9         select HAVE_ACPI_TABLES
10         select HAVE_CMOS_DEFAULT
11         select HAVE_OPTION_TABLE
12         select INTEL_GMA_HAVE_VBT
13         select INTEL_LPSS_UART_FOR_CONSOLE
14         select MEMORY_MAPPED_TPM
15         select MAINBOARD_HAS_TPM2
16         select NO_UART_ON_SUPERIO
17         select SOC_INTEL_COMMON_BLOCK_HDA_VERB
18         select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
19         select SOC_INTEL_TIGERLAKE
20         select SPD_READ_BY_WORD
21         select SYSTEM_TYPE_LAPTOP
23 config BOARD_CLEVO_L140MU
24         select BOARD_CLEVO_TGLU_COMMON
25         select EC_CLEVO_IT5570E
26         select HAVE_SPD_IN_CBFS
28 if BOARD_CLEVO_TGLU_COMMON
30 config MAINBOARD_DIR
31         default "clevo/tgl-u"
33 config VARIANT_DIR
34         default "l140mu" if BOARD_CLEVO_L140MU
36 config MAINBOARD_PART_NUMBER
37         default "L140MU" if BOARD_CLEVO_L140MU
39 config MAINBOARD_VERSION
40         default "2.2A" if BOARD_CLEVO_L140MU
42 config DEVICETREE
43         default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
45 config CBFS_SIZE
46         default 0xb00000 if BOARD_CLEVO_L140MU
48 config CONSOLE_POST
49         default y
51 config UART_FOR_CONSOLE
52         default 2
54 config TPM_PIRQ
55         default 0x77 if BOARD_CLEVO_L140MU # GPP_C9_IRQ
57 config POST_DEVICE
58         default n
60 config SEABIOS_PS2_TIMEOUT
61         default 500
63 config USE_PM_ACPI_TIMER
64         default n
66 config EC_CLEVO_IT5570E_MEM_BASE
67         default 0xfe0b0000
69 endif