src/mainboard/intel/adlrvp/Kconfig

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 config BOARD_INTEL_ADLRVP_COMMON
   4         def_bool n
   5         select BOARD_ROMSIZE_KB_32768
   6         select DRIVERS_I2C_GENERIC
   7         select DRIVERS_I2C_HID
   8         select DRIVERS_I2C_MAX98373
   9         select DRIVERS_INTEL_DPTF
  10         select DRIVERS_INTEL_MIPI_CAMERA
  11         select DRIVERS_INTEL_SOUNDWIRE
  12         select DRIVERS_SOUNDWIRE_ALC711
  13         select DRIVERS_SPI_ACPI
  14         select DRIVERS_USB_ACPI
  15         select HAVE_ACPI_RESUME
  16         select HAVE_ACPI_TABLES
  17         select HAVE_SPD_IN_CBFS
  18         select MAINBOARD_HAS_CHROMEOS
  19         select SOC_INTEL_COMMON_BLOCK_IPU
  20         select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
  21
  22 config BOARD_INTEL_ADLRVP_P
  23         select BOARD_INTEL_ADLRVP_COMMON
  24         select DRIVERS_UART_8250IO
  25         select MAINBOARD_USES_IFD_EC_REGION
  26         select SOC_INTEL_ALDERLAKE_PCH_P
  27         select GEN3_EXTERNAL_CLOCK_BUFFER
  28         select MAINBOARD_USES_IFD_GBE_REGION
  29
  30 config BOARD_INTEL_ADLRVP_P_EXT_EC
  31         select BOARD_INTEL_ADLRVP_COMMON
  32         select DRIVERS_INTEL_PMC
  33         select INTEL_LPSS_UART_FOR_CONSOLE
  34         select SOC_INTEL_ALDERLAKE_PCH_P
  35         select GEN3_EXTERNAL_CLOCK_BUFFER
  36         select DRIVERS_WWAN_FM350GL
  37
  38 config BOARD_INTEL_ADLRVP_RPL
  39         select BOARD_INTEL_ADLRVP_COMMON
  40         select DRIVERS_UART_8250IO
  41         select GEN3_EXTERNAL_CLOCK_BUFFER
  42         select MAINBOARD_USES_IFD_EC_REGION
  43         select SOC_INTEL_ALDERLAKE_PCH_P
  44         select SOC_INTEL_RAPTORLAKE
  45
  46 config BOARD_INTEL_ADLRVP_RPL_EXT_EC
  47         select SOC_INTEL_RAPTORLAKE
  48         select BOARD_INTEL_ADLRVP_COMMON
  49         select DRIVERS_INTEL_PMC
  50         select INTEL_LPSS_UART_FOR_CONSOLE
  51         select SOC_INTEL_ALDERLAKE_PCH_P
  52         select GEN3_EXTERNAL_CLOCK_BUFFER
  53         select DRIVERS_WWAN_FM350GL
  54         select MAINBOARD_HAS_TPM2
  55         select SPI_TPM
  56         select TPM_GOOGLE_CR50
  57
  58 config BOARD_INTEL_ADLRVP_P_MCHP
  59         select BOARD_INTEL_ADLRVP_COMMON
  60         select DRIVERS_INTEL_MIPI_CAMERA
  61         select DRIVERS_INTEL_PMC
  62         select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
  63         select EC_GOOGLE_CHROMEEC_MEC
  64         select INTEL_LPSS_UART_FOR_CONSOLE
  65         select SOC_INTEL_ALDERLAKE_PCH_P
  66
  67 config BOARD_INTEL_ADLRVP_N
  68         select BOARD_INTEL_ADLRVP_COMMON
  69         select DRIVERS_UART_8250IO
  70         select MAINBOARD_USES_IFD_EC_REGION
  71         select SOC_INTEL_ALDERLAKE_PCH_N
  72
  73 config BOARD_INTEL_ADLRVP_N_EXT_EC
  74         select BOARD_INTEL_ADLRVP_COMMON
  75         select DRIVERS_INTEL_PMC
  76         select INTEL_LPSS_UART_FOR_CONSOLE
  77         select SOC_INTEL_ALDERLAKE_PCH_N
  78         select FW_CONFIG
  79         select FW_CONFIG_SOURCE_CHROMEEC_CBI
  80
  81 if BOARD_INTEL_ADLRVP_COMMON
  82
  83 config SOC_INTEL_CSE_LITE_SKU
  84         bool "Use CSE Lite firmware"
  85         default y if ADL_CHROME_EC
  86         help
  87           Enable if CSE Lite firmware is used in your build. It is commonly
  88           used in Chrome boards (chromebooks, chromeboxes, ...).
  89           But since ADL RVP build can be used with or without CSE Lite firmware
  90           it is a configurable option. Alderlake RVP boards usually don't use
  91           an CSE Lite firmware, but are still very likely to use it in case
  92           ChromeEC is used.
  93
  94 config CHROMEOS
  95         select GBB_FLAG_FORCE_DEV_SWITCH_ON
  96         select GBB_FLAG_FORCE_DEV_BOOT_USB
  97         select GBB_FLAG_FORCE_DEV_BOOT_ALTFW
  98         select GBB_FLAG_FORCE_MANUAL_RECOVERY
  99         select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
 100         select HAS_RECOVERY_MRC_CACHE
 101
 102 config MAINBOARD_DIR
 103         default "intel/adlrvp"
 104
 105 config VARIANT_DIR
 106         default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
 107         default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
 108         default "adlrvp_rpl" if BOARD_INTEL_ADLRVP_RPL
 109         default "adlrvp_rpl_ext_ec" if BOARD_INTEL_ADLRVP_RPL_EXT_EC
 110         default "adlrvp_p_mchp" if BOARD_INTEL_ADLRVP_P_MCHP
 111         default "adlrvp_n" if BOARD_INTEL_ADLRVP_N
 112         default "adlrvp_n_ext_ec" if BOARD_INTEL_ADLRVP_N_EXT_EC
 113
 114 config GBB_HWID
 115         string
 116         depends on CHROMEOS
 117         default "ADLRVPN TEST 7673" if BOARD_INTEL_ADLRVP_N || BOARD_INTEL_ADLRVP_N_EXT_EC
 118         default "ADLRVPP TEST 2418"
 119
 120 config MAINBOARD_PART_NUMBER
 121         default "Alder Lake Client"
 122
 123 config MAINBOARD_VENDOR
 124         string
 125         default "Intel Corporation"
 126
 127 config MAINBOARD_FAMILY
 128         string
 129         default "Intel_adlrvp"
 130
 131 config DEVICETREE
 132         default "devicetree_n.cb" if BOARD_INTEL_ADLRVP_N || BOARD_INTEL_ADLRVP_N_EXT_EC
 133         default "devicetree.cb"
 134
 135 config OVERRIDE_DEVICETREE
 136         default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
 137
 138 config DIMM_SPD_SIZE
 139         default 512
 140
 141 choice
 142         prompt "ON BOARD EC"
 143         default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_RPL_EXT_EC
 144         help
 145           This option allows you to select the on board EC to use.
 146           Select whether the board has Intel EC or Chrome EC
 147
 148 config ADL_CHROME_EC
 149         bool "Chrome EC"
 150         select EC_GOOGLE_CHROMEEC
 151         select EC_GOOGLE_CHROMEEC_ESPI
 152         select EC_GOOGLE_CHROMEEC_BOARDID
 153         select EC_ACPI
 154         select EC_GOOGLE_CHROMEEC_LPC
 155
 156 config ADL_INTEL_EC
 157         bool "Intel EC"
 158         select EC_ACPI
 159 endchoice
 160
 161 config VBOOT
 162         select VBOOT_LID_SWITCH
 163         select VBOOT_MOCK_SECDATA if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_N_EXT_EC
 164         select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC
 165         select VBOOT_EARLY_EC_SYNC if BOARD_INTEL_ADLRVP_N_EXT_EC
 166
 167 config UART_FOR_CONSOLE
 168         int
 169         default 0
 170
 171 config DRIVER_TPM_SPI_BUS
 172         default 0x2 if BOARD_INTEL_ADLRVP_RPL_EXT_EC
 173
 174 config USE_PM_ACPI_TIMER
 175         default n if BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_N
 176
 177 config TPM_TIS_ACPI_INTERRUPT
 178         int
 179         default 67 if BOARD_INTEL_ADLRVP_RPL_EXT_EC # GPE0_DW2_3 (GPP_E3)
 180
 181 config GEN3_EXTERNAL_CLOCK_BUFFER
 182         bool
 183         depends on SOC_INTEL_ALDERLAKE_PCH_P
 184         default n
 185         help
 186           Support external Gen-3 clock chip for ADL-P.
 187           `CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER` provides feed clock to discrete buffer
 188           for further distribution to platform. SRCCLKREQB[7:9] maps to internal
 189           SRCCLKREQB[6]. If any of them asserted, SRC buffer
 190           `CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER` gets enabled.
 191
 192 config CLKSRC_FOR_EXTERNAL_BUFFER
 193         depends on GEN3_EXTERNAL_CLOCK_BUFFER
 194         int
 195         default 6  # CLKSRC 6
 196 endif