1 /* SPDX-License-Identifier: GPL-2.0-only */
5 #include <device/device.h>
6 #include <console/console.h>
7 #include <drivers/intel/gma/int15.h>
9 #include <superio/hwm5_conf.h>
10 #include <superio/nuvoton/common/hwm.h>
12 /* Hardware Monitor */
14 static u16 hwm_base
= 0xa00;
16 #define FAN_CRUISE_CONTROL_DISABLED 0
17 #define FAN_CRUISE_CONTROL_SPEED 1
18 #define FAN_CRUISE_CONTROL_THERMAL 2
19 #define FAN_SPEED_5625 0
26 /* FANIN Target Speed Register */
27 /* FANIN = 337500 / RPM */
28 struct fan_speed fan_speeds
[] = {
29 { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
30 { 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 },
31 { 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 },
32 { 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 }
40 struct temperature temperatures
[] = {
41 { 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 },
42 { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
43 { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
44 { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
47 static void hwm_setup(void)
49 unsigned int cpufan_control
= 0, sysfan_control
= 0;
50 unsigned int cpufan_speed
= 0, sysfan_speed
= 0;
51 unsigned int cpufan_temperature
= 0, sysfan_temperature
= 0;
53 cpufan_control
= get_uint_option("cpufan_cruise_control", FAN_CRUISE_CONTROL_DISABLED
);
54 cpufan_speed
= get_uint_option("cpufan_speed", FAN_SPEED_5625
);
56 sysfan_control
= get_uint_option("sysfan_cruise_control", FAN_CRUISE_CONTROL_DISABLED
);
57 sysfan_speed
= get_uint_option("sysfan_speed", FAN_SPEED_5625
);
59 nuvoton_hwm_select_bank(hwm_base
, 0);
60 pnp_write_hwm5_index(hwm_base
, 0x59, 0x20); /* Diode Selection */
61 pnp_write_hwm5_index(hwm_base
, 0x5d, 0x0f); /* All Sensors Diode, not Thermistor */
63 nuvoton_hwm_select_bank(hwm_base
, 4);
64 pnp_write_hwm5_index(hwm_base
, 0x54, 0xf1); /* SYSTIN temperature offset */
65 pnp_write_hwm5_index(hwm_base
, 0x55, 0x19); /* CPUTIN temperature offset */
66 pnp_write_hwm5_index(hwm_base
, 0x56, 0xfc); /* AUXTIN temperature offset */
68 nuvoton_hwm_select_bank(hwm_base
, 0x80); /* Default */
71 /* 00 FANOUT is Manual Mode */
72 /* 01 FANOUT is Thermal Cruise Mode */
73 /* 10 FANOUT is Fan Speed Cruise Mode */
74 switch (cpufan_control
) {
75 case FAN_CRUISE_CONTROL_SPEED
: fan_config
|= (2 << 4); break;
76 case FAN_CRUISE_CONTROL_THERMAL
: fan_config
|= (1 << 4); break;
78 switch (sysfan_control
) {
79 case FAN_CRUISE_CONTROL_SPEED
: fan_config
|= (2 << 2); break;
80 case FAN_CRUISE_CONTROL_THERMAL
: fan_config
|= (1 << 2); break;
82 /* This register must be written first */
83 pnp_write_hwm5_index(hwm_base
, 0x04, fan_config
);
85 switch (cpufan_control
) {
86 case FAN_CRUISE_CONTROL_SPEED
: /* CPUFANIN target speed */
87 printk(BIOS_DEBUG
, "Fan Cruise Control setting CPU fan to %d RPM\n",
88 fan_speeds
[cpufan_speed
].fan_speed
);
89 pnp_write_hwm5_index(hwm_base
, 0x06, fan_speeds
[cpufan_speed
].fan_in
);
91 case FAN_CRUISE_CONTROL_THERMAL
: /* CPUFANIN target temperature */
92 printk(BIOS_DEBUG
, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n",
93 temperatures
[cpufan_temperature
].deg_celsius
,
94 temperatures
[cpufan_temperature
].deg_fahrenheit
);
95 pnp_write_hwm5_index(hwm_base
, 0x06,
96 temperatures
[cpufan_temperature
].deg_celsius
);
100 switch (sysfan_control
) {
101 case FAN_CRUISE_CONTROL_SPEED
: /* SYSFANIN target speed */
102 printk(BIOS_DEBUG
, "Fan Cruise Control setting system fan to %d RPM\n",
103 fan_speeds
[sysfan_speed
].fan_speed
);
104 pnp_write_hwm5_index(hwm_base
, 0x05, fan_speeds
[sysfan_speed
].fan_in
);
106 case FAN_CRUISE_CONTROL_THERMAL
: /* SYSFANIN target temperature */
107 printk(BIOS_DEBUG
, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n",
108 temperatures
[sysfan_temperature
].deg_celsius
,
109 temperatures
[sysfan_temperature
].deg_fahrenheit
);
110 pnp_write_hwm5_index(hwm_base
, 0x05,
111 temperatures
[sysfan_temperature
].deg_celsius
);
115 pnp_write_hwm5_index(hwm_base
, 0x0e, 0x02); /* Fan Output Step Down Time */
116 pnp_write_hwm5_index(hwm_base
, 0x0f, 0x02); /* Fan Output Step Up Time */
118 pnp_write_hwm5_index(hwm_base
, 0x47, 0xaf); /* FAN divisor register */
119 pnp_write_hwm5_index(hwm_base
, 0x4b, 0x84); /* AUXFANIN speed divisor */
121 pnp_write_hwm5_index(hwm_base
, 0x40, 0x01); /* Init, but no SMI# */
124 static void mainboard_enable(struct device
*dev
)
126 install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS
, GMA_INT15_PANEL_FIT_DEFAULT
, GMA_INT15_BOOT_DISPLAY_DEFAULT
, 3);
130 static void mainboard_init(void *chip_info
)
135 for (i
= 1; i
<= 3; i
++) {
136 char cmos_option_name
[] = "ethernetx";
137 snprintf(cmos_option_name
, sizeof(cmos_option_name
),
139 unsigned int ethernet_disable
= get_uint_option(cmos_option_name
, 0);
140 if (!ethernet_disable
)
142 printk(BIOS_DEBUG
, "Disabling Ethernet NIC #%d\n", i
);
143 dev
= pcidev_on_root(28, i
- 1);
146 "Disabling Ethernet NIC: Cannot find 00:1c.%d!\n",
154 struct chip_operations mainboard_ops
= {
155 .init
= mainboard_init
,
156 .enable_dev
= mainboard_enable
,