1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
9 #include <console/console.h>
11 #include "mainboard.h"
13 void bootblock_mainboard_early_init(void)
15 /* Route UART0 to CON1 */
16 gpio_output(ELGON_GPIO_UART_SEL
, 0);
18 /* Turn off error LED */
19 gpio_output(ELGON_GPIO_ERROR_LED
, 0);
21 if (CONFIG(BOOTBLOCK_CONSOLE
)) {
22 if (!uart_is_enabled(CONFIG_UART_FOR_CONSOLE
))
23 uart_setup(CONFIG_UART_FOR_CONSOLE
, CONFIG_TTYS0_BAUD
);
27 static void configure_spi_flash(void)
29 /* The maximum SPI frequency for error-free transmission is at 30 MHz */
30 spi_init_custom(0, // bus
32 0, // idle low disabled
33 0, // zero idle cycles between transfers
38 /* Route SPI to SoC */
39 gpio_output(ELGON_GPIO_SPI_MUX
, 1);
43 * Handle flash write protection.
44 * This code verifies the write-protection on each boot.
45 * Enabling the write protection does only run on the first boot.
46 * An error is fatal as it breaks the Chain Of Trust.
48 static void protect_ro_rgn_spi_flash(void)
50 const struct spi_flash
*flash
= boot_device_spi_flash();
51 const char *fmapname
= "WP_RO";
54 if (fmap_locate_area(fmapname
, &ro_rgn
)) {
55 printk(BIOS_ERR
, "%s: No %s FMAP section.\n", __func__
,
57 die("Can't verify flash protections!");
61 spi_flash_status(flash
, ®8
);
63 /* Check if SRP0 is set and RO region is protected */
65 spi_flash_is_write_protected(flash
, &ro_rgn
) != 1) {
66 printk(BIOS_WARNING
, "%s: FMAP section %s is not write-protected\n",
70 * Need to protect flash region :
71 * WP_RO read only and use /WP pin
72 * non-volatile programming
74 if (spi_flash_set_write_protected(flash
, &ro_rgn
,
75 SPI_WRITE_PROTECTION_PIN
) != 0)
76 die("Failed to write-protect WP_RO region!");
78 printk(BIOS_INFO
, "%s: FMAP section %s is write-protected\n",
82 void bootblock_mainboard_init(void)
84 configure_spi_flash();
85 protect_ro_rgn_spi_flash();