| blob | 5c055e645729903c2f73c614e676b1b4b786fe45 |
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /dts-v1/;
5 / {
6 model = "Cavium ThunderX CN81XX board";
7 compatible = "cavium,thunder-81xx";
8 interrupt-parent = <0x1>;
9 #address-cells = <0x2>;
10 #size-cells = <0x2>;
12 psci {
13 compatible = "arm,psci-0.2";
14 method = "smc";
15 };
17 cpus {
18 #address-cells = <0x2>;
19 #size-cells = <0x0>;
21 cpu-map {
23 cluster0 {
25 core0 {
26 cpu = <0x2>;
27 };
29 core1 {
30 cpu = <0x3>;
31 };
33 core2 {
34 cpu = <0x4>;
35 };
37 core3 {
38 cpu = <0x5>;
39 };
40 };
41 };
43 cpu@0 {
44 device_type = "cpu";
45 compatible = "cavium,thunder", "arm,armv8";
46 reg = <0x0 0x0>;
47 enable-method = "psci";
48 numa-node-id = <0x0>;
49 next-level-cache = <0x6>;
50 linux,phandle = <0x2>;
51 phandle = <0x2>;
52 };
54 cpu@1 {
55 device_type = "cpu";
56 compatible = "cavium,thunder", "arm,armv8";
57 reg = <0x0 0x1>;
58 enable-method = "psci";
59 numa-node-id = <0x0>;
60 next-level-cache = <0x6>;
61 linux,phandle = <0x3>;
62 phandle = <0x3>;
63 };
65 cpu@2 {
66 device_type = "cpu";
67 compatible = "cavium,thunder", "arm,armv8";
68 reg = <0x0 0x2>;
69 enable-method = "psci";
70 numa-node-id = <0x0>;
71 next-level-cache = <0x6>;
72 linux,phandle = <0x4>;
73 phandle = <0x4>;
74 };
76 cpu@3 {
77 device_type = "cpu";
78 compatible = "cavium,thunder", "arm,armv8";
79 reg = <0x0 0x3>;
80 enable-method = "psci";
81 numa-node-id = <0x0>;
82 next-level-cache = <0x6>;
83 linux,phandle = <0x5>;
84 phandle = <0x5>;
85 };
86 };
88 l2-cache0 {
89 compatible = "cache";
90 numa-node-id = <0x0>;
91 linux,phandle = <0x6>;
92 phandle = <0x6>;
93 };
95 timer {
96 compatible = "arm,armv8-timer";
97 interrupts = <0x1 0xd 0x4 0x1 0xe 0x4 0x1 0xb 0x4 0x1 0xa 0x4>;
98 };
100 pmu {
101 compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
102 interrupts = <0x1 0x7 0x4>;
103 };
105 mmc_supply_3v3 {
106 compatible = "regulator-fixed";
107 regulator-name = "mmc_supply_3v3";
108 regulator-min-microvolt = <0x325aa0>;
109 regulator-max-microvolt = <0x325aa0>;
110 gpio = <0x7 0x8 0x0>;
111 enable-active-high;
112 linux,phandle = <0xf>;
113 phandle = <0xf>;
114 };
116 interrupt-controller@801000000000 {
117 compatible = "arm,gic-v3";
118 #interrupt-cells = <0x3>;
119 #address-cells = <0x2>;
120 #size-cells = <0x2>;
121 #redistributor-regions = <0x1>;
122 ranges;
123 interrupt-controller;
124 reg = <0x8010 0x0 0x0 0x10000 0x8010 0x80000000 0x0 0x600000>;
125 interrupts = <0x1 0x9 0x4>;
126 linux,phandle = <0x1>;
127 phandle = <0x1>;
129 gic-its@801000020000 {
130 compatible = "arm,gic-v3-its";
131 reg = <0x8010 0x20000 0x0 0x200000>;
132 msi-controller;
133 numa-node-id = <0x0>;
134 linux,phandle = <0xd>;
135 phandle = <0xd>;
136 };
137 };
139 soc@0 {
140 compatible = "simple-bus";
141 #address-cells = <0x2>;
142 #size-cells = <0x2>;
143 ranges;
144 numa-node-id = <0x0>;
146 refclkuaa {
147 compatible = "fixed-clock";
148 #clock-cells = <0x0>;
149 clock-frequency = <0x6f3c900>;
150 clock-output-names = "refclkuaa";
151 linux,phandle = <0x8>;
152 phandle = <0x8>;
153 };
155 sclk {
156 compatible = "fixed-clock";
157 #clock-cells = <0x0>;
158 clock-frequency = <0x2faf0800>;
159 clock-output-names = "sclk";
160 linux,phandle = <0xe>;
161 phandle = <0xe>;
162 };
164 serial@87e028000000 {
165 compatible = "arm,pl011", "arm,primecell";
166 reg = <0x87e0 0x28000000 0x0 0x1000>;
167 interrupts = <0x0 0x5 0x4>;
168 clocks = <0x8>;
169 clock-names = "apb_pclk";
170 skip-init;
171 };
173 serial@87e029000000 {
174 compatible = "arm,pl011", "arm,primecell";
175 reg = <0x87e0 0x29000000 0x0 0x1000>;
176 interrupts = <0x0 0x6 0x4>;
177 clocks = <0x8>;
178 clock-names = "apb_pclk";
179 skip-init;
180 };
182 serial@87e02a000000 {
183 compatible = "arm,pl011", "arm,primecell";
184 reg = <0x87e0 0x2a000000 0x0 0x1000>;
185 interrupts = <0x0 0x7 0x4>;
186 clocks = <0x8>;
187 clock-names = "apb_pclk";
188 skip-init;
189 };
191 serial@87e02b000000 {
192 compatible = "arm,pl011", "arm,primecell";
193 reg = <0x87e0 0x2b000000 0x0 0x1000>;
194 interrupts = <0x0 0x8 0x4>;
195 clocks = <0x8>;
196 clock-names = "apb_pclk";
197 skip-init;
198 };
200 watch-dog@8440000a0000 {
201 compatible = "arm,sbsa-gwdt";
202 reg = <0x8440 0xa0000 0x0 0x1000 0x8440 0xb0000 0x0 0x1000>;
203 interrupts = <0x0 0x9 0x4>;
204 };
206 smmu0@830000000000 {
207 compatible = "cavium,smmu-v2";
208 reg = <0x8300 0x0 0x0 0x2000000>;
209 #global-interrupts = <0x1>;
210 interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4 0x0 0x45 0x4>;
211 mmu-masters = <0x9 0x100 0xa 0x200 0xb 0x300 0xc 0x400>;
212 };
214 pci@848000000000 {
215 compatible = "pci-host-ecam-generic";
216 device_type = "pci";
217 msi-parent = <0xd>;
218 msi-map = <0x0 0xd 0x0 0x10000>;
219 bus-range = <0x0 0x1f>;
220 #size-cells = <0x2>;
221 #address-cells = <0x3>;
222 #stream-id-cells = <0x1>;
223 dma-coherent;
224 reg = <0x8480 0x0 0x0 0x2000000>;
225 ranges = <0x3000000 0x8010 0x0 0x8010 0x0 0x80 0x0 0x3000000 0x8100 0x0 0x8100 0x0 0x80 0x0 0x3000000 0x8680 0x0 0x8680 0x0 0x160 0x28000000 0x3000000 0x87e0 0x2c000000 0x87e0 0x2c000000 0x0 0x94000000 0x3000000 0x8400 0x0 0x8400 0x0 0x10 0x0 0x3000000 0x8430 0x0 0x8430 0x0 0x2 0x0 0x3000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x1f 0x3a000000>;
226 linux,phandle = <0x9>;
227 phandle = <0x9>;
229 mrml-bridge0@1,0 {
230 compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge";
231 #size-cells = <0x2>;
232 #address-cells = <0x3>;
233 ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>;
234 reg = <0x800 0x0 0x0 0x0 0x0>;
235 device_type = "pci";
237 mdio-nexus@1,3 {
238 compatible = "cavium,thunder-8890-mdio-nexus";
239 #address-cells = <0x2>;
240 #size-cells = <0x2>;
241 reg = <0xb00 0x0 0x0 0x0 0x0>;
242 assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x800000>;
243 ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x800000>;
245 mdio0@87e005003800 {
246 compatible = "cavium,thunder-8890-mdio";
247 #address-cells = <0x1>;
248 #size-cells = <0x0>;
249 reg = <0x87e0 0x5003800 0x0 0x30>;
250 };
252 mdio1@87e005003880 {
253 compatible = "cavium,thunder-8890-mdio";
254 #address-cells = <0x1>;
255 #size-cells = <0x0>;
256 reg = <0x87e0 0x5003880 0x0 0x30>;
257 };
258 };
260 mmc@1,4 {
261 compatible = "cavium,thunder-8890-mmc";
262 reg = <0xc00 0x0 0x0 0x0 0x0>;
263 #address-cells = <0x1>;
264 #size-cells = <0x0>;
265 clocks = <0xe>;
267 mmc-slot@0 {
268 compatible = "mmc-slot";
269 reg = <0x0>;
270 vmmc-supply = <0xf>;
271 max-frequency = <0x18cba80>;
272 no-1-8-v;
273 bus-width = <0x4>;
274 disable-wp;
275 broken-cd;
276 sd-uhs-sdr25;
277 sd-uhs-ddr50;
278 sd-uhs-sdr50;
279 cap-sd-highspeed;
280 no-sdio;
281 no-mmc;
282 };
283 };
285 i2c@9,0 {
286 #address-cells = <0x1>;
287 #size-cells = <0x0>;
288 compatible = "cavium,thunder-8890-twsi";
289 reg = <0x4800 0x0 0x0 0x0 0x0>;
290 clock-frequency = <0x186a0>;
291 clocks = <0xe>;
293 idt-ptp@0x52 {
294 compatible = "idt,82p33914-1";
295 reg = <0x52>;
296 };
297 };
299 i2c@9,1 {
300 #address-cells = <0x1>;
301 #size-cells = <0x0>;
302 compatible = "cavium,thunder-8890-twsi";
303 reg = <0x4900 0x0 0x0 0x0 0x0>;
304 clock-frequency = <0x186a0>;
305 clocks = <0xe>;
307 rom@54 {
308 compatible = "atmel,24c256";
309 reg = <0x54>;
310 pagesize = <0x40>;
311 };
313 rtc@68 {
314 compatible = "isil,isl12057";
315 reg = <0x68>;
316 };
318 tpm@20 {
319 compatible = "infineon,slb9645tt";
320 reg = <0x20>;
321 };
322 };
324 rgx0 {
325 #address-cells = <0x1>;
326 #size-cells = <0x0>;
327 compatible = "cavium,thunder-8890-bgx";
328 reg = <0x9000 0x0 0x0 0x0 0x0>;
330 rgmii00 {
331 reg = <0x0>;
332 local-mac-address = [00 00 00 00 00 00];
333 };
334 };
336 bgx0 {
337 #address-cells = <0x1>;
338 #size-cells = <0x0>;
339 compatible = "cavium,thunder-8890-bgx";
340 reg = <0x8000 0x0 0x0 0x0 0x0>;
342 sgmii00 {
343 reg = <0x0>;
344 qlm-mode = "0x000,sgmii";
345 local-mac-address = [00 00 00 00 00 00];
346 cavium,disable-autonegotiation;
347 };
348 };
350 bgx1 {
351 #address-cells = <0x1>;
352 #size-cells = <0x0>;
353 compatible = "cavium,thunder-8890-bgx";
354 reg = <0x8100 0x0 0x0 0x0 0x0>;
355 };
356 };
358 spi@7,0 {
359 compatible = "cavium,thunder-8190-spi";
360 reg = <0x3800 0x0 0x0 0x0 0x0>;
361 #address-cells = <0x1>;
362 #size-cells = <0x0>;
363 clocks = <0xe>;
365 flash@0 {
366 compatible = "winbond,w25q128", "jedec,spi-nor";
367 reg = <0x0>;
368 spi-max-frequency = <104000000>;
369 #address-cells = <0x1>;
370 #size-cells = <0x1>;
371 };
372 };
374 gpio0@6,0 {
375 #gpio-cells = <0x2>;
376 compatible = "cavium,thunder-8890-gpio";
377 gpio-controller;
378 reg = <0x3000 0x0 0x0 0x0 0x0>;
379 linux,phandle = <0x7>;
380 phandle = <0x7>;
381 };
383 nand@b,0 {
384 #address-cells = <0x1>;
385 #size-cells = <0x0>;
386 compatible = "cavium,cn8130-nand";
387 reg = <0x5800 0x0 0x0 0x0 0x0>;
388 clocks = <0xe>;
389 };
390 };
392 pci@87e0c0000000 {
393 compatible = "cavium,pci-host-thunder-pem";
394 device_type = "pci";
395 msi-parent = <0xd>;
396 msi-map = <0x0 0xd 0x0 0x10000>;
397 bus-range = <0x1f 0x57>;
398 #size-cells = <0x2>;
399 #address-cells = <0x3>;
400 #stream-id-cells = <0x1>;
401 dma-coherent;
402 reg = <0x8800 0x1f000000 0x0 0x39000000 0x87e0 0xc0000000 0x0 0x1000000>;
403 ranges = <0x1000000 0x0 0x0 0x8830 0x0 0x0 0x10000 0x3000000 0x0 0x10000000 0x8810 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8820 0x0 0x10 0x0 0x3000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x0 0x1000000>;
404 #interrupt-cells = <0x1>;
405 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
406 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x11 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x13 0x4>;
407 linux,phandle = <0xa>;
408 phandle = <0xa>;
409 };
411 pci@87e0c1000000 {
412 compatible = "cavium,pci-host-thunder-pem";
413 device_type = "pci";
414 msi-parent = <0xd>;
415 msi-map = <0x0 0xd 0x0 0x10000>;
416 bus-range = <0x57 0x8f>;
417 #size-cells = <0x2>;
418 #address-cells = <0x3>;
419 #stream-id-cells = <0x1>;
420 dma-coherent;
421 reg = <0x8840 0x57000000 0x0 0x39000000 0x87e0 0xc1000000 0x0 0x1000000>;
422 ranges = <0x1000000 0x0 0x10000 0x8870 0x10000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8850 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x8860 0x0 0x10 0x0 0x3000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x0 0x1000000>;
423 #interrupt-cells = <0x1>;
424 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
425 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x14 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x15 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x17 0x4>;
426 linux,phandle = <0xb>;
427 phandle = <0xb>;
428 };
430 pci@87e0c2000000 {
431 compatible = "cavium,pci-host-thunder-pem";
432 device_type = "pci";
433 msi-parent = <0xd>;
434 msi-map = <0x0 0xd 0x0 0x10000>;
435 bus-range = <0x8f 0xc7>;
436 #size-cells = <0x2>;
437 #address-cells = <0x3>;
438 #stream-id-cells = <0x1>;
439 dma-coherent;
440 reg = <0x8880 0x8f000000 0x0 0x39000000 0x87e0 0xc2000000 0x0 0x1000000>;
441 ranges = <0x1000000 0x0 0x20000 0x88b0 0x20000 0x0 0x10000 0x3000000 0x0 0x10000000 0x8890 0x10000000 0xf 0xf0000000 0x43000000 0x10 0x0 0x88a0 0x0 0x10 0x0 0x3000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x0 0x1000000>;
442 #interrupt-cells = <0x1>;
443 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
444 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x18 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x19 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x1a 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x1b 0x4>;
445 linux,phandle = <0xc>;
446 phandle = <0xc>;
447 };
449 tdm@d,0 {
450 #address-cells = <0x1>;
451 #size-cells = <0x0>;
452 compatible = "cavium,thunder-8190-tdm";
453 reg = <0x6800 0x0 0x0 0x0>;
454 clocks = <0xe>;
455 };
456 };
458 aliases {
459 serial0 = "/soc@0/serial@87e028000000";
460 serial1 = "/soc@0/serial@87e029000000";
461 serial2 = "/soc@0/serial@87e02a000000";
462 serial3 = "/soc@0/serial@87e02b000000";
463 i2c0 = "/soc@0/pci@848000000000/mrml-bridge0@1,0/i2c@9,0";
464 i2c1 = "/soc@0/pci@848000000000/mrml-bridge0@1,0/i2c@9,1";
465 spi0 = "/soc@0/pci@848000000000/spi@7,0";
466 };
468 chosen {
469 stdout-path = "serial0:115200n8";
470 };
472 memory@0 {
473 device_type = "memory";
474 reg = <0x0 0x1400000 0x0 0x7ec00000>;
475 numa-node-id = <0x0>;
476 };
477 };