1 /* SPDX-License-Identifier: GPL-2.0-only */
8 #ifndef PAD_CFG_GPIO_BIDIRECT
9 #define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
10 _PAD_CFG_STRUCT(pad, \
11 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
12 PAD_BUF(NO_DISABLE) | val, \
13 PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
16 /* PAD configuration was generated automatically using intelp2m utility */
17 static const struct pad_config gpio_table
[] = {
19 /* ------- GPIO Community 0 ------- */
21 /* ------- GPIO Group GPP_B ------- */
23 /* GPP_B0 - PMC_CORE_VID0 */
24 /* DW0: 0x44000700, DW1: 0x00000000 */
25 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
26 PAD_CFG_NF(GPP_B0
, NONE
, DEEP
, NF1
),
28 /* GPP_B1 - PMC_CORE_VID1 */
29 /* DW0: 0x44000700, DW1: 0x00000000 */
30 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
31 PAD_CFG_NF(GPP_B1
, NONE
, DEEP
, NF1
),
33 /* GPP_B2 - ESPI_ALERT2_N */
34 /* DW0: 0x44001302, DW1: 0x00003000 */
35 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
36 PAD_CFG_NF(GPP_B2
, UP_20K
, DEEP
, NF4
),
38 /* GPP_B3 - ESPI_ALERT0_N */
39 /* DW0: 0x44001302, DW1: 0x00003000 */
40 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
41 PAD_CFG_NF(GPP_B3
, UP_20K
, DEEP
, NF4
),
50 /* GPP_B10 - ESPI_ALERT3_N */
51 /* DW0: 0x44001302, DW1: 0x00003000 */
52 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
53 PAD_CFG_NF(GPP_B10
, UP_20K
, DEEP
, NF4
),
55 PAD_NC(GPP_B11
, NONE
),
57 /* GPP_B12 - PMC_SLP_S0_N */
58 /* DW0: 0x44000700, DW1: 0x00000000 */
59 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
60 PAD_CFG_NF(GPP_B12
, NONE
, DEEP
, NF1
),
62 /* GPP_B13 - PMC_PLTRST_N */
63 /* DW0: 0x44000700, DW1: 0x00000000 */
64 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
65 PAD_CFG_NF(GPP_B13
, NONE
, DEEP
, NF1
),
68 /* DW0: 0x84000700, DW1: 0x00000000 */
69 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
70 PAD_CFG_NF(GPP_B14
, NONE
, PLTRST
, NF1
),
72 PAD_NC(GPP_B15
, NONE
),
73 PAD_NC(GPP_B16
, NONE
),
74 PAD_NC(GPP_B17
, NONE
),
75 PAD_NC(GPP_B18
, NONE
),
76 PAD_NC(GPP_B19
, NONE
),
77 PAD_NC(GPP_B20
, NONE
),
78 PAD_NC(GPP_B21
, NONE
),
79 PAD_NC(GPP_B22
, NONE
),
80 PAD_NC(GPP_B23
, NONE
),
82 /* GPIO_RSVD_0 - n/a */
83 /* DW0: 0x40000700, DW1: 0x00000000 */
84 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
85 PAD_CFG_NF(GPIO_RSVD_0
, NONE
, DEEP
, NF1
),
87 /* GPIO_RSVD_1 - n/a */
88 /* DW0: 0x40000700, DW1: 0x00000000 */
89 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
90 PAD_CFG_NF(GPIO_RSVD_1
, NONE
, DEEP
, NF1
),
92 /* ------- GPIO Group GPP_T ------- */
95 /* DW0: 0x44000300, DW1: 0x00000000 */
96 /* DW0: PAD_TRIG(OFF) - IGNORED */
100 /* DW0: 0x44000300, DW1: 0x00000000 */
101 /* DW0: PAD_TRIG(OFF) - IGNORED */
102 PAD_NC(GPP_T1
, NONE
),
105 /* DW0: 0x44000300, DW1: 0x00000000 */
106 /* DW0: PAD_TRIG(OFF) - IGNORED */
107 PAD_NC(GPP_T2
, NONE
),
110 /* DW0: 0x44000300, DW1: 0x00000000 */
111 /* DW0: PAD_TRIG(OFF) - IGNORED */
112 PAD_NC(GPP_T3
, NONE
),
115 /* DW0: 0x44000300, DW1: 0x00000000 */
116 /* DW0: PAD_TRIG(OFF) - IGNORED */
117 PAD_NC(GPP_T4
, NONE
),
120 /* DW0: 0x44000300, DW1: 0x00000000 */
121 /* DW0: PAD_TRIG(OFF) - IGNORED */
122 PAD_NC(GPP_T5
, NONE
),
125 /* DW0: 0x44000300, DW1: 0x00000000 */
126 /* DW0: PAD_TRIG(OFF) - IGNORED */
127 PAD_NC(GPP_T6
, NONE
),
130 /* DW0: 0x44000300, DW1: 0x00000000 */
131 /* DW0: PAD_TRIG(OFF) - IGNORED */
132 PAD_NC(GPP_T7
, NONE
),
135 /* DW0: 0x44000300, DW1: 0x00000000 */
136 /* DW0: PAD_TRIG(OFF) - IGNORED */
137 PAD_NC(GPP_T8
, NONE
),
140 /* DW0: 0x44000300, DW1: 0x00000000 */
141 /* DW0: PAD_TRIG(OFF) - IGNORED */
142 PAD_NC(GPP_T9
, NONE
),
145 /* DW0: 0x44000300, DW1: 0x00000000 */
146 /* DW0: PAD_TRIG(OFF) - IGNORED */
147 PAD_NC(GPP_T10
, NONE
),
150 /* DW0: 0x44000300, DW1: 0x00000000 */
151 /* DW0: PAD_TRIG(OFF) - IGNORED */
152 PAD_NC(GPP_T11
, NONE
),
155 /* DW0: 0x44000300, DW1: 0x00000000 */
156 /* DW0: PAD_TRIG(OFF) - IGNORED */
157 PAD_NC(GPP_T12
, NONE
),
160 /* DW0: 0x44000300, DW1: 0x00000000 */
161 /* DW0: PAD_TRIG(OFF) - IGNORED */
162 PAD_NC(GPP_T13
, NONE
),
165 /* DW0: 0x44000300, DW1: 0x00000000 */
166 /* DW0: PAD_TRIG(OFF) - IGNORED */
167 PAD_NC(GPP_T14
, NONE
),
170 /* DW0: 0x44000300, DW1: 0x00000000 */
171 /* DW0: PAD_TRIG(OFF) - IGNORED */
172 PAD_NC(GPP_T15
, NONE
),
174 /* ------- GPIO Group GPP_G ------- */
177 /* DW0: 0x44000300, DW1: 0x00000000 */
178 /* DW0: PAD_TRIG(OFF) - IGNORED */
179 PAD_NC(GPP_G0
, NONE
),
182 /* DW0: 0x44000300, DW1: 0x00000000 */
183 /* DW0: PAD_TRIG(OFF) - IGNORED */
184 PAD_NC(GPP_G1
, NONE
),
187 /* DW0: 0x44000300, DW1: 0x00000000 */
188 /* DW0: PAD_TRIG(OFF) - IGNORED */
189 PAD_NC(GPP_G2
, NONE
),
192 /* DW0: 0x44000300, DW1: 0x00000000 */
193 /* DW0: PAD_TRIG(OFF) - IGNORED */
194 PAD_NC(GPP_G3
, NONE
),
197 /* DW0: 0x44000300, DW1: 0x00000000 */
198 /* DW0: PAD_TRIG(OFF) - IGNORED */
199 PAD_NC(GPP_G4
, NONE
),
202 /* DW0: 0x44000300, DW1: 0x00000000 */
203 /* DW0: PAD_TRIG(OFF) - IGNORED */
204 PAD_NC(GPP_G5
, NONE
),
207 /* DW0: 0x44000300, DW1: 0x00000000 */
208 /* DW0: PAD_TRIG(OFF) - IGNORED */
209 PAD_NC(GPP_G6
, NONE
),
212 /* DW0: 0x44000300, DW1: 0x00000000 */
213 /* DW0: PAD_TRIG(OFF) - IGNORED */
214 PAD_NC(GPP_G7
, NONE
),
217 /* DW0: 0x44000b00, DW1: 0x00000000 */
218 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
219 PAD_NC(GPP_G8
, NONE
),
222 /* DW0: 0x44000b00, DW1: 0x00000000 */
223 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
224 PAD_NC(GPP_G9
, NONE
),
227 /* DW0: 0x44000300, DW1: 0x00000000 */
228 /* DW0: PAD_TRIG(OFF) - IGNORED */
229 PAD_NC(GPP_G10
, NONE
),
232 /* DW0: 0x44000300, DW1: 0x00000000 */
233 /* DW0: PAD_TRIG(OFF) - IGNORED */
234 PAD_NC(GPP_G11
, NONE
),
237 /* DW0: 0x44000300, DW1: 0x00000000 */
238 /* DW0: PAD_TRIG(OFF) - IGNORED */
239 PAD_NC(GPP_G12
, NONE
),
242 /* DW0: 0x44000300, DW1: 0x00000000 */
243 /* DW0: PAD_TRIG(OFF) - IGNORED */
244 PAD_NC(GPP_G13
, NONE
),
247 /* DW0: 0x44000300, DW1: 0x00000000 */
248 /* DW0: PAD_TRIG(OFF) - IGNORED */
249 PAD_NC(GPP_G14
, NONE
),
251 /* GPP_G15 - ESPI_IO0 */
252 /* DW0: 0x44000700, DW1: 0x00003000 */
253 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
254 PAD_CFG_NF(GPP_G15
, UP_20K
, DEEP
, NF1
),
256 /* GPP_G16 - ESPI_IO1 */
257 /* DW0: 0x44000702, DW1: 0x00003000 */
258 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
259 PAD_CFG_NF(GPP_G16
, UP_20K
, DEEP
, NF1
),
261 /* GPP_G17 - ESPI_IO2 */
262 /* DW0: 0x44000700, DW1: 0x00003000 */
263 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
264 PAD_CFG_NF(GPP_G17
, UP_20K
, DEEP
, NF1
),
266 /* GPP_G18 - ESPI_IO3 */
267 /* DW0: 0x44000700, DW1: 0x00003000 */
268 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
269 PAD_CFG_NF(GPP_G18
, UP_20K
, DEEP
, NF1
),
272 /* DW0: 0x44000300, DW1: 0x00000000 */
273 /* DW0: PAD_TRIG(OFF) - IGNORED */
274 PAD_CFG_GPI_APIC_LOCK(GPP_G19
, NONE
, LEVEL
, INVERT
, LOCK_CONFIG
),
276 /* GPP_G20 - ESPI_CS0_N */
277 /* DW0: 0x44000700, DW1: 0x00003000 */
278 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
279 PAD_CFG_NF(GPP_G20
, UP_20K
, DEEP
, NF1
),
281 /* GPP_G21 - ESPI_CLK */
282 /* DW0: 0x44000700, DW1: 0x00001000 */
283 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
284 PAD_CFG_NF(GPP_G21
, DN_20K
, DEEP
, NF1
),
286 /* GPP_G22 - ESPI_RST0_N */
287 /* DW0: 0x44000700, DW1: 0x00000000 */
288 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
289 PAD_CFG_NF(GPP_G22
, NONE
, DEEP
, NF1
),
292 /* DW0: 0x44000300, DW1: 0x00000000 */
293 /* DW0: PAD_TRIG(OFF) - IGNORED */
294 PAD_NC(GPP_G23
, NONE
),
296 /* GPIO_RSVD_2 - n/a */
297 /* DW0: 0x40000700, DW1: 0x00000000 */
298 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
299 PAD_CFG_NF(GPIO_RSVD_2
, NONE
, DEEP
, NF1
),
301 /* ------- GPIO Community 1 ------- */
303 /* ------- GPIO Group GPP_V ------- */
305 /* GPP_V0 - EMMC_CMD */
306 /* DW0: 0x44000700, DW1: 0x00003000 */
307 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
308 PAD_CFG_NF(GPP_V0
, UP_20K
, DEEP
, NF1
),
310 /* GPP_V1 - EMMC_DATA0 */
311 /* DW0: 0x44000700, DW1: 0x00003000 */
312 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
313 PAD_CFG_NF(GPP_V1
, UP_20K
, DEEP
, NF1
),
315 /* GPP_V2 - EMMC_DATA1 */
316 /* DW0: 0x44000700, DW1: 0x00003000 */
317 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
318 PAD_CFG_NF(GPP_V2
, UP_20K
, DEEP
, NF1
),
320 /* GPP_V3 - EMMC_DATA2 */
321 /* DW0: 0x44000700, DW1: 0x00003000 */
322 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
323 PAD_CFG_NF(GPP_V3
, UP_20K
, DEEP
, NF1
),
325 /* GPP_V4 - EMMC_DATA3 */
326 /* DW0: 0x44000700, DW1: 0x00003000 */
327 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
328 PAD_CFG_NF(GPP_V4
, UP_20K
, DEEP
, NF1
),
330 /* GPP_V5 - EMMC_DATA4 */
331 /* DW0: 0x44000700, DW1: 0x00003000 */
332 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
333 PAD_CFG_NF(GPP_V5
, UP_20K
, DEEP
, NF1
),
335 /* GPP_V6 - EMMC_DATA5 */
336 /* DW0: 0x44000700, DW1: 0x00003000 */
337 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
338 PAD_CFG_NF(GPP_V6
, UP_20K
, DEEP
, NF1
),
340 /* GPP_V7 - EMMC_DATA6 */
341 /* DW0: 0x44000700, DW1: 0x00003000 */
342 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
343 PAD_CFG_NF(GPP_V7
, UP_20K
, DEEP
, NF1
),
345 /* GPP_V8 - EMMC_DATA7 */
346 /* DW0: 0x44000700, DW1: 0x00003000 */
347 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
348 PAD_CFG_NF(GPP_V8
, UP_20K
, DEEP
, NF1
),
350 /* GPP_V9 - EMMC_RCLK */
351 /* DW0: 0x44000700, DW1: 0x00001000 */
352 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
353 PAD_CFG_NF(GPP_V9
, DN_20K
, DEEP
, NF1
),
355 /* GPP_V10 - EMMC_CLK */
356 /* DW0: 0x44000700, DW1: 0x00001000 */
357 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
358 PAD_CFG_NF(GPP_V10
, DN_20K
, DEEP
, NF1
),
360 /* GPP_V11 - EMMC_RST_N */
361 /* DW0: 0x44000700, DW1: 0x00003000 */
362 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
363 PAD_CFG_NF(GPP_V11
, UP_20K
, DEEP
, NF1
),
366 /* DW0: 0x44000300, DW1: 0x00000000 */
367 /* DW0: PAD_TRIG(OFF) - IGNORED */
368 PAD_NC(GPP_V12
, NONE
),
371 /* DW0: 0x44000300, DW1: 0x00000000 */
372 /* DW0: PAD_TRIG(OFF) - IGNORED */
373 PAD_NC(GPP_V13
, NONE
),
376 /* DW0: 0x44000300, DW1: 0x00000000 */
377 /* DW0: PAD_TRIG(OFF) - IGNORED */
378 PAD_NC(GPP_V14
, NONE
),
381 /* DW0: 0x44000300, DW1: 0x00000000 */
382 /* DW0: PAD_TRIG(OFF) - IGNORED */
383 PAD_NC(GPP_V15
, NONE
),
385 /* ------- GPIO Group GPP_H ------- */
388 /* DW0: 0x44000200, DW1: 0x00000000 */
389 PAD_NC(GPP_H0
, NONE
),
392 /* DW0: 0x44000300, DW1: 0x00000000 */
393 /* DW0: PAD_TRIG(OFF) - IGNORED */
394 PAD_NC(GPP_H1
, NONE
),
397 /* DW0: 0x44000200, DW1: 0x00000000 */
398 PAD_NC(GPP_H2
, NONE
),
401 /* DW0: 0x44000300, DW1: 0x00000000 */
402 /* DW0: PAD_TRIG(OFF) - IGNORED */
403 PAD_NC(GPP_H3
, NONE
),
406 /* DW0: 0x44000300, DW1: 0x00000000 */
407 /* DW0: PAD_TRIG(OFF) - IGNORED */
408 PAD_NC(GPP_H4
, NONE
),
411 /* DW0: 0x44000300, DW1: 0x00000000 */
412 /* DW0: PAD_TRIG(OFF) - IGNORED */
413 PAD_NC(GPP_H5
, NONE
),
416 /* DW0: 0x44000300, DW1: 0x00000000 */
417 /* DW0: PAD_TRIG(OFF) - IGNORED */
418 PAD_NC(GPP_H6
, NONE
),
421 /* DW0: 0x44000300, DW1: 0x00000000 */
422 /* DW0: PAD_TRIG(OFF) - IGNORED */
423 PAD_NC(GPP_H7
, NONE
),
426 /* DW0: 0x44000300, DW1: 0x00000000 */
427 /* DW0: PAD_TRIG(OFF) - IGNORED */
428 PAD_NC(GPP_H8
, NONE
),
431 /* DW0: 0x44000300, DW1: 0x00000000 */
432 /* DW0: PAD_TRIG(OFF) - IGNORED */
433 PAD_NC(GPP_H9
, NONE
),
436 /* DW0: 0x44000300, DW1: 0x00000000 */
437 /* DW0: PAD_TRIG(OFF) - IGNORED */
438 PAD_CFG_GPIO_HI_Z(GPP_H10
, NONE
, DEEP
, TxLASTRxE
, SAME
),
441 /* DW0: 0x44000300, DW1: 0x00000000 */
442 /* DW0: PAD_TRIG(OFF) - IGNORED */
443 PAD_CFG_GPIO_HI_Z(GPP_H11
, NONE
, DEEP
, TxLASTRxE
, SAME
),
446 /* DW0: 0x44000300, DW1: 0x00000000 */
447 /* DW0: PAD_TRIG(OFF) - IGNORED */
448 PAD_NC(GPP_H12
, NONE
),
451 /* DW0: 0x44000300, DW1: 0x00000000 */
452 /* DW0: PAD_TRIG(OFF) - IGNORED */
453 PAD_NC(GPP_H13
, NONE
),
456 /* DW0: 0x44000300, DW1: 0x00000000 */
457 /* DW0: PAD_TRIG(OFF) - IGNORED */
458 PAD_NC(GPP_H14
, NONE
),
461 /* DW0: 0x44000300, DW1: 0x00000000 */
462 /* DW0: PAD_TRIG(OFF) - IGNORED */
463 PAD_NC(GPP_H15
, NONE
),
465 /* GPP_H16 - DDI2_DDC_SCL */
466 /* DW0: 0x44000b02, DW1: 0x00000000 */
467 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
468 PAD_CFG_NF(GPP_H16
, NONE
, DEEP
, NF2
),
471 /* DW0: 0x44000300, DW1: 0x00000000 */
472 /* DW0: PAD_TRIG(OFF) - IGNORED */
473 PAD_NC(GPP_H17
, NONE
),
475 /* GPP_H18 - PMC_CPU_C10_GATE_N */
476 /* DW0: 0x44000700, DW1: 0x00000000 */
477 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
478 PAD_NC(GPP_H18
, NONE
),
480 /* GPP_H19 - DDI2_DDC_SDA */
481 /* DW0: 0x44000b02, DW1: 0x00000000 */
482 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
483 PAD_CFG_NF(GPP_H19
, NONE
, DEEP
, NF2
),
485 /* GPP_H20 - DDI2_HPD */
486 /* DW0: 0x44000b02, DW1: 0x00000000 */
487 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
488 PAD_CFG_NF(GPP_H20
, NONE
, DEEP
, NF2
),
491 /* DW0: 0x44000300, DW1: 0x00000000 */
492 /* DW0: PAD_TRIG(OFF) - IGNORED */
493 PAD_NC(GPP_H21
, NONE
),
496 /* DW0: 0x44000300, DW1: 0x00000000 */
497 /* DW0: PAD_TRIG(OFF) - IGNORED */
498 PAD_NC(GPP_H22
, NONE
),
501 /* DW0: 0x44000300, DW1: 0x00000000 */
502 /* DW0: PAD_TRIG(OFF) - IGNORED */
503 PAD_NC(GPP_H23
, NONE
),
505 /* ------- GPIO Group GPP_D ------- */
508 /* DW0: 0x44000300, DW1: 0x00000000 */
509 /* DW0: PAD_TRIG(OFF) - IGNORED */
510 PAD_NC(GPP_D0
, NONE
),
513 /* DW0: 0x44000300, DW1: 0x00000000 */
514 /* DW0: PAD_TRIG(OFF) - IGNORED */
515 PAD_NC(GPP_D1
, NONE
),
518 /* DW0: 0x44000300, DW1: 0x00000000 */
519 /* DW0: PAD_TRIG(OFF) - IGNORED */
520 PAD_NC(GPP_D2
, NONE
),
523 /* DW0: 0x44000300, DW1: 0x00000000 */
524 /* DW0: PAD_TRIG(OFF) - IGNORED */
525 PAD_NC(GPP_D3
, NONE
),
528 /* DW0: 0x44000300, DW1: 0x00000000 */
529 /* DW0: PAD_TRIG(OFF) - IGNORED */
530 PAD_NC(GPP_D4
, NONE
),
533 /* DW0: 0x44000300, DW1: 0x00000000 */
534 /* DW0: PAD_TRIG(OFF) - IGNORED */
535 PAD_NC(GPP_D5
, NONE
),
538 /* DW0: 0x44000300, DW1: 0x00000000 */
539 /* DW0: PAD_TRIG(OFF) - IGNORED */
540 PAD_NC(GPP_D6
, NONE
),
543 /* DW0: 0x44000300, DW1: 0x00000000 */
544 /* DW0: PAD_TRIG(OFF) - IGNORED */
545 PAD_NC(GPP_D7
, NONE
),
548 /* DW0: 0x44000300, DW1: 0x00000000 */
549 /* DW0: PAD_TRIG(OFF) - IGNORED */
550 PAD_NC(GPP_D8
, NONE
),
553 /* DW0: 0x44000300, DW1: 0x00000000 */
554 /* DW0: PAD_TRIG(OFF) - IGNORED */
555 PAD_NC(GPP_D9
, NONE
),
558 /* DW0: 0x44000300, DW1: 0x00000000 */
559 /* DW0: PAD_TRIG(OFF) - IGNORED */
560 PAD_NC(GPP_D10
, NONE
),
563 /* DW0: 0x44000300, DW1: 0x00000000 */
564 /* DW0: PAD_TRIG(OFF) - IGNORED */
565 PAD_NC(GPP_D11
, NONE
),
568 /* DW0: 0x44000300, DW1: 0x00000000 */
569 /* DW0: PAD_TRIG(OFF) - IGNORED */
570 PAD_NC(GPP_D12
, NONE
),
573 /* DW0: 0x44000300, DW1: 0x00000000 */
574 /* DW0: PAD_TRIG(OFF) - IGNORED */
575 PAD_NC(GPP_D13
, NONE
),
578 /* DW0: 0x44000300, DW1: 0x00000000 */
579 /* DW0: PAD_TRIG(OFF) - IGNORED */
580 PAD_NC(GPP_D14
, NONE
),
583 /* DW0: 0x44000300, DW1: 0x00000000 */
584 /* DW0: PAD_TRIG(OFF) - IGNORED */
585 PAD_NC(GPP_D15
, NONE
),
588 /* DW0: 0x44000300, DW1: 0x00000000 */
589 /* DW0: PAD_TRIG(OFF) - IGNORED */
590 PAD_NC(GPP_D16
, NONE
),
593 /* DW0: 0x44000300, DW1: 0x00000000 */
594 /* DW0: PAD_TRIG(OFF) - IGNORED */
595 PAD_NC(GPP_D17
, NONE
),
598 /* DW0: 0x44000300, DW1: 0x00000000 */
599 /* DW0: PAD_TRIG(OFF) - IGNORED */
600 PAD_NC(GPP_D18
, NONE
),
603 /* DW0: 0x44000300, DW1: 0x00000000 */
604 /* DW0: PAD_TRIG(OFF) - IGNORED */
605 PAD_NC(GPP_D19
, NONE
),
607 /* GPIO_RSVD_3 - n/a */
608 /* DW0: 0x40000700, DW1: 0x00000000 */
609 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
610 PAD_CFG_NF(GPIO_RSVD_3
, NONE
, DEEP
, NF1
),
612 /* ------- GPIO Group GPP_U ------- */
615 /* DW0: 0x44000300, DW1: 0x00000000 */
616 /* DW0: PAD_TRIG(OFF) - IGNORED */
617 PAD_NC(GPP_U0
, NONE
),
620 /* DW0: 0x44000300, DW1: 0x00000000 */
621 /* DW0: PAD_TRIG(OFF) - IGNORED */
622 PAD_NC(GPP_U1
, NONE
),
625 /* DW0: 0x44000300, DW1: 0x00000000 */
626 /* DW0: PAD_TRIG(OFF) - IGNORED */
627 PAD_NC(GPP_U2
, NONE
),
630 /* DW0: 0x44000300, DW1: 0x00000000 */
631 /* DW0: PAD_TRIG(OFF) - IGNORED */
632 PAD_NC(GPP_U3
, NONE
),
635 /* DW0: 0x44000300, DW1: 0x00000000 */
636 /* DW0: PAD_TRIG(OFF) - IGNORED */
637 PAD_NC(GPP_U4
, NONE
),
640 /* DW0: 0x44000300, DW1: 0x00000000 */
641 /* DW0: PAD_TRIG(OFF) - IGNORED */
642 PAD_NC(GPP_U5
, NONE
),
645 /* DW0: 0x44000300, DW1: 0x00000000 */
646 /* DW0: PAD_TRIG(OFF) - IGNORED */
647 PAD_NC(GPP_U6
, NONE
),
650 /* DW0: 0x44000300, DW1: 0x00000000 */
651 /* DW0: PAD_TRIG(OFF) - IGNORED */
652 PAD_NC(GPP_U7
, NONE
),
655 /* DW0: 0x44000300, DW1: 0x00000000 */
656 /* DW0: PAD_TRIG(OFF) - IGNORED */
657 PAD_NC(GPP_U8
, NONE
),
660 /* DW0: 0x44000300, DW1: 0x00000000 */
661 /* DW0: PAD_TRIG(OFF) - IGNORED */
662 PAD_NC(GPP_U9
, NONE
),
665 /* DW0: 0x44000300, DW1: 0x00000000 */
666 /* DW0: PAD_TRIG(OFF) - IGNORED */
667 PAD_NC(GPP_U10
, NONE
),
670 /* DW0: 0x44000300, DW1: 0x00000000 */
671 /* DW0: PAD_TRIG(OFF) - IGNORED */
672 PAD_NC(GPP_U11
, NONE
),
674 /* GPP_U12 - ISI_CHX_OKNOK_0 */
675 /* DW0: 0x44000700, DW1: 0x00001000 */
676 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
677 PAD_NC(GPP_U12
, NONE
),
679 /* GPP_U13 - ISI_CHX_OKNOK_1 */
680 /* DW0: 0x44000700, DW1: 0x00001000 */
681 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
682 PAD_NC(GPP_U13
, NONE
),
685 /* DW0: 0x44000300, DW1: 0x00000000 */
686 /* DW0: PAD_TRIG(OFF) - IGNORED */
687 PAD_NC(GPP_U14
, NONE
),
690 /* DW0: 0x44000300, DW1: 0x00000000 */
691 /* DW0: PAD_TRIG(OFF) - IGNORED */
692 PAD_NC(GPP_U15
, NONE
),
694 /* GPP_U16 - ISI_OKNOK_0 */
695 /* DW0: 0x44600702, DW1: 0x00000000 */
696 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
697 PAD_NC(GPP_U16
, NONE
),
699 /* GPP_U17 - ISI_OKNOK_1 */
700 /* DW0: 0x44600702, DW1: 0x00000000 */
701 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
702 PAD_NC(GPP_U17
, NONE
),
704 /* GPP_U18 - ISI_ALERT_N */
705 /* DW0: 0x44600702, DW1: 0x00000000 */
706 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
707 PAD_NC(GPP_U18
, NONE
),
710 /* DW0: 0x44000300, DW1: 0x00000000 */
711 /* DW0: PAD_TRIG(OFF) - IGNORED */
712 PAD_NC(GPP_U19
, NONE
),
715 /* GPIO_RSVD_4 - n/a */
716 /* DW0: 0x40000700, DW1: 0x00000000 */
717 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
718 PAD_CFG_NF(GPIO_RSVD_4
, NONE
, DEEP
, NF1
),
720 /* GPIO_RSVD_5 - n/a */
721 /* DW0: 0x40000700, DW1: 0x00000000 */
722 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
723 PAD_CFG_NF(GPIO_RSVD_5
, NONE
, DEEP
, NF1
),
725 /* GPIO_RSVD_6 - n/a */
726 /* DW0: 0x40000700, DW1: 0x00000000 */
727 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
728 PAD_CFG_NF(GPIO_RSVD_6
, NONE
, DEEP
, NF1
),
730 /* GPIO_RSVD_7 - n/a */
731 /* DW0: 0x40000700, DW1: 0x00000000 */
732 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
733 PAD_CFG_NF(GPIO_RSVD_7
, NONE
, DEEP
, NF1
),
735 /* ------- GPIO Group GPP_VGPIO ------- */
738 /* DW0: 0x40000000, DW1: 0x00000000 */
739 PAD_CFG_GPIO_BIDIRECT(VGPIO_0
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
742 /* DW0: 0x44000100, DW1: 0x00000000 */
743 PAD_CFG_GPI_TRIG_OWN(VGPIO_4
, NONE
, DEEP
, OFF
, ACPI
),
746 /* DW0: 0x40000003, DW1: 0x00000000 */
747 /* DW0: (1 << 1) - IGNORED */
748 PAD_CFG_GPIO_BIDIRECT(VGPIO_5
, 1, NONE
, DEEP
, LEVEL
, ACPI
),
751 /* DW0: 0x40000000, DW1: 0x00000000 */
752 PAD_CFG_GPIO_BIDIRECT(VGPIO_6
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
755 /* DW0: 0x40000000, DW1: 0x00000000 */
756 PAD_CFG_GPIO_BIDIRECT(VGPIO_7
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
759 /* DW0: 0x40000000, DW1: 0x00000000 */
760 PAD_CFG_GPIO_BIDIRECT(VGPIO_8
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
763 /* DW0: 0x40000000, DW1: 0x00000000 */
764 PAD_CFG_GPIO_BIDIRECT(VGPIO_9
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
766 /* VGPIO_10 - GPIO */
767 /* DW0: 0x40000000, DW1: 0x00000000 */
768 PAD_CFG_GPIO_BIDIRECT(VGPIO_10
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
770 /* VGPIO_11 - GPIO */
771 /* DW0: 0x40000000, DW1: 0x00000000 */
772 PAD_CFG_GPIO_BIDIRECT(VGPIO_11
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
774 /* VGPIO_12 - GPIO */
775 /* DW0: 0x40000000, DW1: 0x00000000 */
776 PAD_CFG_GPIO_BIDIRECT(VGPIO_12
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
778 /* VGPIO_13 - GPIO */
779 /* DW0: 0x40000000, DW1: 0x00000000 */
780 PAD_CFG_GPIO_BIDIRECT(VGPIO_13
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
782 /* VGPIO_18 - GPIO */
783 /* DW0: 0x40000000, DW1: 0x00000000 */
784 PAD_CFG_GPIO_BIDIRECT(VGPIO_18
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
786 /* VGPIO_19 - GPIO */
787 /* DW0: 0x40000000, DW1: 0x00000000 */
788 PAD_CFG_GPIO_BIDIRECT(VGPIO_19
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
790 /* VGPIO_20 - GPIO */
791 /* DW0: 0x40000000, DW1: 0x00000000 */
792 PAD_CFG_GPIO_BIDIRECT(VGPIO_20
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
794 /* VGPIO_21 - GPIO */
795 /* DW0: 0x40000000, DW1: 0x00000000 */
796 PAD_CFG_GPIO_BIDIRECT(VGPIO_21
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
798 /* VGPIO_22 - GPIO */
799 /* DW0: 0x40000000, DW1: 0x00000000 */
800 PAD_CFG_GPIO_BIDIRECT(VGPIO_22
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
802 /* VGPIO_23 - GPIO */
803 /* DW0: 0x40000000, DW1: 0x00000000 */
804 PAD_CFG_GPIO_BIDIRECT(VGPIO_23
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
806 /* VGPIO_24 - GPIO */
807 /* DW0: 0x40000000, DW1: 0x00000000 */
808 PAD_CFG_GPIO_BIDIRECT(VGPIO_24
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
810 /* VGPIO_25 - GPIO */
811 /* DW0: 0x40000000, DW1: 0x00000000 */
812 PAD_CFG_GPIO_BIDIRECT(VGPIO_25
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
814 /* VGPIO_30 - GPIO */
815 /* DW0: 0x40000000, DW1: 0x00000000 */
816 PAD_CFG_GPIO_BIDIRECT(VGPIO_30
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
818 /* VGPIO_31 - GPIO */
819 /* DW0: 0x40000000, DW1: 0x00000000 */
820 PAD_CFG_GPIO_BIDIRECT(VGPIO_31
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
822 /* VGPIO_32 - GPIO */
823 /* DW0: 0x40000000, DW1: 0x00000000 */
824 PAD_CFG_GPIO_BIDIRECT(VGPIO_32
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
826 /* VGPIO_33 - GPIO */
827 /* DW0: 0x40000000, DW1: 0x00000000 */
828 PAD_CFG_GPIO_BIDIRECT(VGPIO_33
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
830 /* VGPIO_34 - GPIO */
831 /* DW0: 0x40000000, DW1: 0x00000000 */
832 PAD_CFG_GPIO_BIDIRECT(VGPIO_34
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
834 /* VGPIO_35 - GPIO */
835 /* DW0: 0x40000000, DW1: 0x00000000 */
836 PAD_CFG_GPIO_BIDIRECT(VGPIO_35
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
838 /* VGPIO_36 - GPIO */
839 /* DW0: 0x40000000, DW1: 0x00000000 */
840 PAD_CFG_GPIO_BIDIRECT(VGPIO_36
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
842 /* VGPIO_37 - GPIO */
843 /* DW0: 0x40000000, DW1: 0x00000000 */
844 PAD_CFG_GPIO_BIDIRECT(VGPIO_37
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
846 /* VGPIO_39 - GPIO */
847 /* DW0: 0x44000000, DW1: 0x00000000 */
848 PAD_CFG_GPIO_BIDIRECT(VGPIO_39
, 0, NONE
, DEEP
, OFF
, ACPI
),
850 /* ------- GPIO Community 2 ------- */
852 /* ------- GPIO Group GPD ------- */
855 /* DW0: 0x04000300, DW1: 0x00000000 */
856 /* DW0: PAD_TRIG(OFF) - IGNORED */
857 PAD_CFG_GPIO_HI_Z(GPD0
, NONE
, PWROK
, TxLASTRxE
, SAME
),
859 /* GPD1 - PMC_ACPRESENT */
860 /* DW0: 0x04000702, DW1: 0x00003c00 */
861 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
862 PAD_CFG_NF(GPD1
, NATIVE
, PWROK
, NF1
),
865 /* DW0: 0x04000702, DW1: 0x00003c00 */
866 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
867 PAD_CFG_NF(GPD2
, NATIVE
, PWROK
, NF1
),
869 /* GPD3 - PMC_PWRBTN_N */
870 /* DW0: 0x04000702, DW1: 0x00003000 */
871 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
872 PAD_CFG_NF(GPD3
, UP_20K
, PWROK
, NF1
),
874 /* GPD4 - PMC_SLP_S3_N */
875 /* DW0: 0x04000600, DW1: 0x00000000 */
876 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
877 PAD_CFG_NF(GPD4
, NONE
, PWROK
, NF1
),
879 /* GPD5 - PMC_SLP_S4_N */
880 /* DW0: 0x04000600, DW1: 0x00000000 */
881 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
882 PAD_CFG_NF(GPD5
, NONE
, PWROK
, NF1
),
885 /* DW0: 0x04000600, DW1: 0x00000000 */
886 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
887 PAD_CFG_NF(GPD7
, NONE
, PWROK
, NF1
),
890 /* DW0: 0x04000200, DW1: 0x00000000 */
891 PAD_CFG_GPO(GPD8
, 0, PWROK
),
894 /* DW0: 0x04000700, DW1: 0x00000000 */
895 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
896 PAD_CFG_NF(GPD9
, NONE
, PWROK
, NF1
),
899 /* DW0: 0x04000200, DW1: 0x00000000 */
900 PAD_CFG_GPO(GPD10
, 0, PWROK
),
903 /* DW0: 0x04000600, DW1: 0x00000000 */
904 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
905 PAD_CFG_NF(GPD11
, NONE
, PWROK
, NF1
),
907 /* GPIO_RSVD_8 - GPIO */
908 /* DW0: 0x04000200, DW1: 0x00000000 */
909 PAD_CFG_GPO(GPIO_RSVD_8
, 0, PWROK
),
911 /* GPIO_RSVD_9 - n/a */
912 /* DW0: 0x00000700, DW1: 0x00000000 */
913 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
914 PAD_CFG_NF(GPIO_RSVD_9
, NONE
, PWROK
, NF1
),
916 /* GPIO_RSVD_10 - n/a */
917 /* DW0: 0x00000700, DW1: 0x00000000 */
918 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
919 PAD_CFG_NF(GPIO_RSVD_10
, NONE
, PWROK
, NF1
),
921 /* GPIO_RSVD_11 - n/a */
922 /* DW0: 0x00000700, DW1: 0x00000000 */
923 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
924 PAD_CFG_NF(GPIO_RSVD_11
, NONE
, PWROK
, NF1
),
926 /* GPIO_RSVD_12 - n/a */
927 /* DW0: 0x00000702, DW1: 0x00000000 */
928 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
929 PAD_CFG_NF(GPIO_RSVD_12
, NONE
, PWROK
, NF1
),
931 /* ------- GPIO Community 3 ------- */
933 /* ------- GPIO Group GPP_S ------- */
935 /* GPIO_RSVD_13 - n/a */
936 /* DW0: 0x40000700, DW1: 0x00003c00 */
937 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
938 PAD_CFG_NF(GPIO_RSVD_13
, NATIVE
, DEEP
, NF1
),
940 /* GPIO_RSVD_14 - n/a */
941 /* DW0: 0x40000700, DW1: 0x00003c00 */
942 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
943 PAD_CFG_NF(GPIO_RSVD_14
, NATIVE
, DEEP
, NF1
),
945 /* GPIO_RSVD_15 - n/a */
946 /* DW0: 0x40000700, DW1: 0x00000000 */
947 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
948 PAD_CFG_NF(GPIO_RSVD_15
, NONE
, DEEP
, NF1
),
950 /* GPIO_RSVD_16 - n/a */
951 /* DW0: 0x40000700, DW1: 0x00000000 */
952 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
953 PAD_CFG_NF(GPIO_RSVD_16
, NONE
, DEEP
, NF1
),
955 /* GPIO_RSVD_17 - GPIO */
956 /* DW0: 0x40000300, DW1: 0x00000000 */
957 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_17
, NONE
, DEEP
, TxLASTRxE
, SAME
),
959 /* GPIO_RSVD_18 - n/a */
960 /* DW0: 0x40000700, DW1: 0x00000000 */
961 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
962 PAD_CFG_NF(GPIO_RSVD_18
, NONE
, DEEP
, NF1
),
964 /* GPIO_RSVD_19 - n/a */
965 /* DW0: 0x40000702, DW1: 0x00000000 */
966 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
967 PAD_CFG_NF(GPIO_RSVD_19
, NONE
, DEEP
, NF1
),
969 /* GPIO_RSVD_20 - n/a */
970 /* DW0: 0x40000700, DW1: 0x00000000 */
971 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
972 PAD_CFG_NF(GPIO_RSVD_20
, NONE
, DEEP
, NF1
),
974 /* GPIO_RSVD_21 - n/a */
975 /* DW0: 0x40000700, DW1: 0x00000000 */
976 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
977 PAD_CFG_NF(GPIO_RSVD_21
, NONE
, DEEP
, NF1
),
979 /* GPIO_RSVD_22 - n/a */
980 /* DW0: 0x40000700, DW1: 0x0003d000 */
981 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
982 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_RSVD_22
, DN_20K
, DEEP
, NF1
),
984 /* GPIO_RSVD_23 - n/a */
985 /* DW0: 0x40000700, DW1: 0x0003d000 */
986 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
987 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_RSVD_23
, DN_20K
, DEEP
, NF1
),
989 /* GPIO_RSVD_24 - n/a */
990 /* DW0: 0x40000700, DW1: 0x00000000 */
991 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
992 PAD_CFG_NF(GPIO_RSVD_24
, NONE
, DEEP
, NF1
),
994 /* GPIO_RSVD_25 - n/a */
995 /* DW0: 0x40000700, DW1: 0x00000000 */
996 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
997 PAD_CFG_NF(GPIO_RSVD_25
, NONE
, DEEP
, NF1
),
999 /* GPIO_RSVD_26 - n/a */
1000 /* DW0: 0x40000700, DW1: 0x00000000 */
1001 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1002 PAD_CFG_NF(GPIO_RSVD_26
, NONE
, DEEP
, NF1
),
1004 /* GPIO_RSVD_27 - GPIO */
1005 /* DW0: 0x40000300, DW1: 0x00000000 */
1006 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_27
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1008 /* GPIO_RSVD_28 - n/a */
1009 /* DW0: 0x40000702, DW1: 0x00000000 */
1010 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1011 PAD_CFG_NF(GPIO_RSVD_28
, NONE
, DEEP
, NF1
),
1013 /* GPIO_RSVD_29 - n/a */
1014 /* DW0: 0x40000702, DW1: 0x00000000 */
1015 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1016 PAD_CFG_NF(GPIO_RSVD_29
, NONE
, DEEP
, NF1
),
1019 /* DW0: 0x40000700, DW1: 0x00001000 */
1020 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1021 PAD_CFG_NF(GPP_S0
, DN_20K
, DEEP
, NF1
),
1024 /* DW0: 0x40000700, DW1: 0x00001000 */
1025 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1026 PAD_CFG_NF(GPP_S1
, DN_20K
, DEEP
, NF1
),
1028 /* ------- GPIO Group GPP_A ------- */
1031 /* DW0: 0x44000300, DW1: 0x00000000 */
1032 /* DW0: PAD_TRIG(OFF) - IGNORED */
1033 PAD_CFG_GPIO_HI_Z(GPP_A0
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1036 /* DW0: 0x44000300, DW1: 0x00000000 */
1037 /* DW0: PAD_TRIG(OFF) - IGNORED */
1038 PAD_CFG_GPIO_HI_Z(GPP_A1
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1041 /* DW0: 0x44000300, DW1: 0x00000000 */
1042 /* DW0: PAD_TRIG(OFF) - IGNORED */
1043 PAD_CFG_GPIO_HI_Z(GPP_A2
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1046 /* DW0: 0x44000300, DW1: 0x00000000 */
1047 /* DW0: PAD_TRIG(OFF) - IGNORED */
1048 PAD_CFG_GPIO_HI_Z(GPP_A3
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1051 /* DW0: 0x44000300, DW1: 0x00000000 */
1052 /* DW0: PAD_TRIG(OFF) - IGNORED */
1053 PAD_NC(GPP_A4
, NONE
),
1056 /* DW0: 0x44000300, DW1: 0x00000000 */
1057 /* DW0: PAD_TRIG(OFF) - IGNORED */
1058 PAD_NC(GPP_A5
, NONE
),
1061 /* DW0: 0x44000300, DW1: 0x00000000 */
1062 /* DW0: PAD_TRIG(OFF) - IGNORED */
1063 PAD_NC(GPP_A6
, NONE
),
1066 /* DW0: 0x44000300, DW1: 0x00000000 */
1067 /* DW0: PAD_TRIG(OFF) - IGNORED */
1068 PAD_NC(GPP_A7
, NONE
),
1071 /* DW0: 0x44000300, DW1: 0x00000000 */
1072 /* DW0: PAD_TRIG(OFF) - IGNORED */
1073 PAD_NC(GPP_A8
, NONE
),
1076 /* DW0: 0x44000300, DW1: 0x00000000 */
1077 /* DW0: PAD_TRIG(OFF) - IGNORED */
1078 PAD_NC(GPP_A9
, NONE
),
1080 /* GPP_A10 - GPIO */
1081 /* DW0: 0x44000300, DW1: 0x00000000 */
1082 /* DW0: PAD_TRIG(OFF) - IGNORED */
1083 PAD_NC(GPP_A10
, NONE
),
1085 /* GPP_A11 - GPIO */
1086 /* DW0: 0x44000300, DW1: 0x00000000 */
1087 /* DW0: PAD_TRIG(OFF) - IGNORED */
1088 PAD_NC(GPP_A11
, NONE
),
1090 /* GPP_A12 - GPIO */
1091 /* DW0: 0x44000300, DW1: 0x00000000 */
1092 /* DW0: PAD_TRIG(OFF) - IGNORED */
1093 PAD_NC(GPP_A12
, NONE
),
1095 /* GPP_A13 - GPIO */
1096 /* DW0: 0x44000300, DW1: 0x00000000 */
1097 /* DW0: PAD_TRIG(OFF) - IGNORED */
1098 PAD_NC(GPP_A13
, NONE
),
1100 /* GPP_A14 - GPIO */
1101 /* DW0: 0x44000300, DW1: 0x00000000 */
1102 /* DW0: PAD_TRIG(OFF) - IGNORED */
1103 PAD_NC(GPP_A14
, NONE
),
1105 /* GPP_A15 - GPIO */
1106 /* DW0: 0x44000300, DW1: 0x00000000 */
1107 /* DW0: PAD_TRIG(OFF) - IGNORED */
1108 PAD_NC(GPP_A15
, NONE
),
1110 /* GPP_A16 - GPIO */
1111 /* DW0: 0x44000300, DW1: 0x00000000 */
1112 /* DW0: PAD_TRIG(OFF) - IGNORED */
1113 PAD_NC(GPP_A16
, NONE
),
1115 /* GPP_A17 - GPIO */
1116 /* DW0: 0x44000300, DW1: 0x00000000 */
1117 /* DW0: PAD_TRIG(OFF) - IGNORED */
1118 PAD_NC(GPP_A17
, NONE
),
1120 /* GPP_A18 - GPIO */
1121 /* DW0: 0x44000300, DW1: 0x00000000 */
1122 /* DW0: PAD_TRIG(OFF) - IGNORED */
1123 PAD_NC(GPP_A18
, NONE
),
1125 /* GPP_A19 - GPIO */
1126 /* DW0: 0x44000300, DW1: 0x00000000 */
1127 /* DW0: PAD_TRIG(OFF) - IGNORED */
1128 PAD_NC(GPP_A19
, NONE
),
1130 /* GPP_A20 - GPIO */
1131 /* DW0: 0x44000300, DW1: 0x00000000 */
1132 /* DW0: PAD_TRIG(OFF) - IGNORED */
1133 PAD_NC(GPP_A20
, NONE
),
1135 /* GPP_A21 - GPIO */
1136 /* DW0: 0x44000300, DW1: 0x00000000 */
1137 /* DW0: PAD_TRIG(OFF) - IGNORED */
1138 PAD_NC(GPP_A21
, NONE
),
1140 /* GPP_A22 - GPIO */
1141 /* DW0: 0x44000300, DW1: 0x00000000 */
1142 /* DW0: PAD_TRIG(OFF) - IGNORED */
1143 PAD_NC(GPP_A22
, NONE
),
1145 /* GPP_A23 - GPIO */
1146 /* DW0: 0x44000300, DW1: 0x00000000 */
1147 /* DW0: PAD_TRIG(OFF) - IGNORED */
1148 PAD_NC(GPP_A23
, NONE
),
1150 /* ------- GPIO Group GPP_VGPIO_USB ------- */
1152 /* VGPIO_USB_0 - n/a */
1153 /* DW0: 0x40000400, DW1: 0x00000000 */
1154 PAD_CFG_NF(VGPIO_USB_0
, NONE
, DEEP
, NF1
),
1156 /* VGPIO_USB_1 - n/a */
1157 /* DW0: 0x40000400, DW1: 0x00000000 */
1158 PAD_CFG_NF(VGPIO_USB_1
, NONE
, DEEP
, NF1
),
1160 /* VGPIO_USB_2 - n/a */
1161 /* DW0: 0x40000400, DW1: 0x00000000 */
1162 PAD_CFG_NF(VGPIO_USB_2
, NONE
, DEEP
, NF1
),
1164 /* VGPIO_USB_3 - n/a */
1165 /* DW0: 0x40000400, DW1: 0x00000000 */
1166 PAD_CFG_NF(VGPIO_USB_3
, NONE
, DEEP
, NF1
),
1168 /* ------- GPIO Community 4 ------- */
1170 /* ------- GPIO Group GPP_C ------- */
1172 /* GPP_C0 - SMB_CLK */
1173 /* DW0: 0x44000702, DW1: 0x00000000 */
1174 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1175 PAD_CFG_NF(GPP_C0
, NONE
, DEEP
, NF1
),
1177 /* GPP_C1 - SMB_DATA */
1178 /* DW0: 0x44000702, DW1: 0x00000000 */
1179 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1180 PAD_CFG_NF(GPP_C1
, NONE
, DEEP
, NF1
),
1182 /* GPP_C2 - SMB_ALERT_N */
1183 /* DW0: 0x44000a02, DW1: 0x00000000 */
1184 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1) - IGNORED */
1185 PAD_CFG_NF(GPP_C2
, NONE
, DEEP
, NF2
),
1188 /* DW0: 0x44000300, DW1: 0x00000000 */
1189 /* DW0: PAD_TRIG(OFF) - IGNORED */
1190 PAD_NC(GPP_C3
, NONE
),
1193 /* DW0: 0x44000300, DW1: 0x00000000 */
1194 /* DW0: PAD_TRIG(OFF) - IGNORED */
1195 PAD_NC(GPP_C4
, NONE
),
1198 /* DW0: 0x44000200, DW1: 0x00000000 */
1199 PAD_NC(GPP_C5
, NONE
),
1202 /* DW0: 0x44000300, DW1: 0x00000000 */
1203 /* DW0: PAD_TRIG(OFF) - IGNORED */
1204 PAD_NC(GPP_C6
, NONE
),
1207 /* DW0: 0x44000300, DW1: 0x00000000 */
1208 /* DW0: PAD_TRIG(OFF) - IGNORED */
1209 PAD_NC(GPP_C7
, NONE
),
1211 /* GPP_C8 - DNX_FORCE_RELOAD */
1212 /* DW0: 0x44000b00, DW1: 0x00001000 */
1213 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1214 PAD_NC(GPP_C8
, NONE
),
1217 /* DW0: 0x44000300, DW1: 0x00000000 */
1218 /* DW0: PAD_TRIG(OFF) - IGNORED */
1219 PAD_NC(GPP_C9
, NONE
),
1221 /* GPP_C10 - GPIO */
1222 /* DW0: 0x44000300, DW1: 0x00000000 */
1223 /* DW0: PAD_TRIG(OFF) - IGNORED */
1224 PAD_NC(GPP_C10
, NONE
),
1226 /* GPP_C11 - GPIO */
1227 /* DW0: 0x44000300, DW1: 0x00000000 */
1228 /* DW0: PAD_TRIG(OFF) - IGNORED */
1229 PAD_NC(GPP_C11
, NONE
),
1231 /* GPP_C12 - GPIO */
1232 /* DW0: 0x44000300, DW1: 0x00000000 */
1233 /* DW0: PAD_TRIG(OFF) - IGNORED */
1234 PAD_NC(GPP_C12
, NONE
),
1236 /* GPP_C13 - GPIO */
1237 /* DW0: 0x44000300, DW1: 0x00000000 */
1238 /* DW0: PAD_TRIG(OFF) - IGNORED */
1239 PAD_NC(GPP_C13
, NONE
),
1241 /* GPP_C14 - GPIO */
1242 /* DW0: 0x44000300, DW1: 0x00000000 */
1243 /* DW0: PAD_TRIG(OFF) - IGNORED */
1244 PAD_NC(GPP_C14
, NONE
),
1246 /* GPP_C15 - GPIO */
1247 /* DW0: 0x44000300, DW1: 0x00000000 */
1248 /* DW0: PAD_TRIG(OFF) - IGNORED */
1249 PAD_NC(GPP_C15
, NONE
),
1251 /* GPP_C16 - GPIO */
1252 /* DW0: 0x44000300, DW1: 0x00000000 */
1253 /* DW0: PAD_TRIG(OFF) - IGNORED */
1254 PAD_NC(GPP_C16
, NONE
),
1256 /* GPP_C17 - GPIO */
1257 /* DW0: 0x44000300, DW1: 0x00000000 */
1258 /* DW0: PAD_TRIG(OFF) - IGNORED */
1259 PAD_NC(GPP_C17
, NONE
),
1261 /* GPP_C18 - SML_DATA0 */
1262 /* DW0: 0x04000f02, DW1: 0x00000000 */
1263 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1264 PAD_NC(GPP_C18
, NONE
),
1266 /* GPP_C19 - SML_CLK0 */
1267 /* DW0: 0x04000f02, DW1: 0x00000000 */
1268 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1269 PAD_NC(GPP_C19
, NONE
),
1271 /* GPP_C20 - SIO_UART2_RXD */
1272 /* DW0: 0x44001302, DW1: 0x00000000 */
1273 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1274 PAD_NC(GPP_C20
, NONE
),
1276 /* GPP_C21 - SIO_UART2_TXD */
1277 /* DW0: 0x44001300, DW1: 0x00000000 */
1278 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1279 PAD_NC(GPP_C21
, NONE
),
1281 /* GPP_C22 - SIO_UART2_RTS_N */
1282 /* DW0: 0x44001300, DW1: 0x00000000 */
1283 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1284 PAD_NC(GPP_C22
, NONE
),
1286 /* GPP_C23 - SIO_UART2_CTS_N */
1287 /* DW0: 0x44001302, DW1: 0x00000000 */
1288 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1289 PAD_NC(GPP_C23
, NONE
),
1291 /* ------- GPIO Group GPP_F ------- */
1294 /* DW0: 0x44000700, DW1: 0x00000000 */
1295 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1296 PAD_NC(GPP_F0
, NONE
),
1299 /* DW0: 0x44000700, DW1: 0x00003000 */
1300 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1301 PAD_NC(GPP_F1
, NONE
),
1304 /* DW0: 0x44000700, DW1: 0x00000000 */
1305 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1306 PAD_NC(GPP_F2
, NONE
),
1309 /* DW0: 0x44000700, DW1: 0x00003000 */
1310 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1311 PAD_NC(GPP_F3
, NONE
),
1314 /* DW0: 0x44000700, DW1: 0x00000000 */
1315 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1316 PAD_NC(GPP_F4
, NONE
),
1319 /* DW0: 0x44000700, DW1: 0x00000000 */
1320 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1321 PAD_NC(GPP_F5
, NONE
),
1324 /* DW0: 0x44000300, DW1: 0x00000000 */
1325 /* DW0: PAD_TRIG(OFF) - IGNORED */
1326 PAD_NC(GPP_F6
, NONE
),
1329 /* DW0: 0x44000200, DW1: 0x00000000 */
1330 PAD_NC(GPP_F7
, NONE
),
1332 /* GPP_F8 - ISI_TRACEDATA_0 */
1333 /* DW0: 0x44001700, DW1: 0x00000000 */
1334 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1335 PAD_NC(GPP_F8
, NONE
),
1337 /* GPP_F9 - BOOT_PWR_EN */
1338 /* DW0: 0x44000700, DW1: 0x00000000 */
1339 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1340 PAD_NC(GPP_F9
, NONE
),
1342 /* GPP_F10 - GPIO */
1343 /* DW0: 0x44000200, DW1: 0x00000000 */
1344 PAD_NC(GPP_F10
, NONE
),
1346 /* GPP_F11 - ISI_TRACECLK */
1347 /* DW0: 0x44001700, DW1: 0x00000000 */
1348 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1349 PAD_NC(GPP_F11
, NONE
),
1351 /* GPP_F12 - ISI_TRACESWO */
1352 /* DW0: 0x44001700, DW1: 0x00000000 */
1353 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1354 PAD_NC(GPP_F12
, NONE
),
1356 /* GPP_F13 - ISI_SWDIO */
1357 /* DW0: 0x44001702, DW1: 0x00000000 */
1358 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1359 PAD_NC(GPP_F13
, NONE
),
1361 /* GPP_F14 - ISI_TRACEDATA_1 */
1362 /* DW0: 0x44001700, DW1: 0x00000000 */
1363 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1364 PAD_NC(GPP_F14
, NONE
),
1366 /* GPP_F15 - ISI_TRACEDATA_2 */
1367 /* DW0: 0x44001700, DW1: 0x00000000 */
1368 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1369 PAD_NC(GPP_F15
, NONE
),
1371 /* GPP_F16 - ISI_SWCLK */
1372 /* DW0: 0x44001702, DW1: 0x00000000 */
1373 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1374 PAD_NC(GPP_F16
, NONE
),
1376 /* GPP_F17 - ISI_TRACEDATA_3 */
1377 /* DW0: 0x44001700, DW1: 0x00000000 */
1378 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1379 PAD_NC(GPP_F17
, NONE
),
1381 /* GPP_F18 - GPIO */
1382 /* DW0: 0x44000300, DW1: 0x00000000 */
1383 /* DW0: PAD_TRIG(OFF) - IGNORED */
1384 PAD_NC(GPP_F18
, NONE
),
1386 /* GPP_F19 - GPIO */
1387 /* DW0: 0x44000300, DW1: 0x00000000 */
1388 /* DW0: PAD_TRIG(OFF) - IGNORED */
1389 PAD_NC(GPP_F19
, NONE
),
1391 /* GPP_F20 - GPIO */
1392 /* DW0: 0x44000300, DW1: 0x00000000 */
1393 /* DW0: PAD_TRIG(OFF) - IGNORED */
1394 PAD_NC(GPP_F20
, NONE
),
1396 /* GPP_F21 - GPIO */
1397 /* DW0: 0x44000300, DW1: 0x00000000 */
1398 /* DW0: PAD_TRIG(OFF) - IGNORED */
1399 PAD_NC(GPP_F21
, NONE
),
1401 /* GPP_F22 - GPIO */
1402 /* DW0: 0x44000300, DW1: 0x00000000 */
1403 /* DW0: PAD_TRIG(OFF) - IGNORED */
1404 PAD_NC(GPP_F22
, NONE
),
1406 /* GPP_F23 - GPIO */
1407 /* DW0: 0x44000300, DW1: 0x00000000 */
1408 /* DW0: PAD_TRIG(OFF) - IGNORED */
1409 PAD_NC(GPP_F23
, NONE
),
1411 /* GPIO_RSVD_30 - n/a */
1412 /* DW0: 0x40000f00, DW1: 0x00000000 */
1413 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1414 PAD_CFG_NF(GPIO_RSVD_30
, NONE
, DEEP
, NF3
),
1416 /* GPIO_RSVD_31 - n/a */
1417 /* DW0: 0x40000700, DW1: 0x00000000 */
1418 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1419 PAD_CFG_NF(GPIO_RSVD_31
, NONE
, DEEP
, NF1
),
1421 /* GPIO_RSVD_32 - n/a */
1422 /* DW0: 0x40000700, DW1: 0x00000000 */
1423 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1424 PAD_CFG_NF(GPIO_RSVD_32
, NONE
, DEEP
, NF1
),
1426 /* GPIO_RSVD_33 - n/a */
1427 /* DW0: 0x40000700, DW1: 0x00000000 */
1428 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1429 PAD_CFG_NF(GPIO_RSVD_33
, NONE
, DEEP
, NF1
),
1431 /* GPIO_RSVD_34 - n/a */
1432 /* DW0: 0x40000702, DW1: 0x00000000 */
1433 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1434 PAD_CFG_NF(GPIO_RSVD_34
, NONE
, DEEP
, NF1
),
1436 /* GPIO_RSVD_35 - n/a */
1437 /* DW0: 0x40000702, DW1: 0x00000000 */
1438 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1439 PAD_CFG_NF(GPIO_RSVD_35
, NONE
, DEEP
, NF1
),
1441 /* GPIO_RSVD_36 - GPIO */
1442 /* DW0: 0x40000300, DW1: 0x00000000 */
1443 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_36
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1445 /* ------- GPIO Group GPP_E ------- */
1447 /* GPP_E0 - SATA_LED_N */
1448 /* DW0: 0x84000700, DW1: 0x00000000 */
1449 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1450 PAD_CFG_NF(GPP_E0
, NONE
, PLTRST
, NF1
),
1453 /* DW0: 0x44000300, DW1: 0x00000000 */
1454 /* DW0: PAD_TRIG(OFF) - IGNORED */
1455 PAD_NC(GPP_E1
, NONE
),
1458 /* DW0: 0x44000300, DW1: 0x00000000 */
1459 /* DW0: PAD_TRIG(OFF) - IGNORED */
1460 PAD_NC(GPP_E2
, NONE
),
1462 /* GPP_E3 - DDI1_HPD */
1463 /* DW0: 0x44000700, DW1: 0x00000000 */
1464 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1465 PAD_CFG_NF(GPP_E3
, NONE
, DEEP
, NF1
),
1468 /* DW0: 0x44000300, DW1: 0x00000000 */
1469 /* DW0: PAD_TRIG(OFF) - IGNORED */
1470 PAD_NC(GPP_E4
, NONE
),
1472 /* GPP_E5 - DDI1_DDC_SDA */
1473 /* DW0: 0x44000702, DW1: 0x00000000 */
1474 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1475 PAD_CFG_NF(GPP_E5
, NONE
, DEEP
, NF1
),
1478 /* DW0: 0x44000200, DW1: 0x00000000 */
1479 PAD_NC(GPP_E6
, NONE
),
1481 /* GPP_E7 - DDI1_DDC_SCL */
1482 /* DW0: 0x44000700, DW1: 0x00000000 */
1483 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1484 PAD_CFG_NF(GPP_E7
, NONE
, DEEP
, NF1
),
1486 /* GPP_E8 - SATA_1_DEVSLP */
1487 /* DW0: 0x04000b00, DW1: 0x00000000 */
1488 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1489 PAD_NC(GPP_E8
, NONE
),
1492 /* DW0: 0x44000300, DW1: 0x00000000 */
1493 /* DW0: PAD_TRIG(OFF) - IGNORED */
1494 PAD_NC(GPP_E9
, NONE
),
1496 /* GPP_E10 - GPIO */
1497 /* DW0: 0x44000300, DW1: 0x00000000 */
1498 /* DW0: PAD_TRIG(OFF) - IGNORED */
1499 PAD_NC(GPP_E10
, NONE
),
1501 /* GPP_E11 - GPIO */
1502 /* DW0: 0x44000300, DW1: 0x00000000 */
1503 /* DW0: PAD_TRIG(OFF) - IGNORED */
1504 PAD_NC(GPP_E11
, NONE
),
1506 /* GPP_E12 - GPIO */
1507 /* DW0: 0x44000300, DW1: 0x00000000 */
1508 /* DW0: PAD_TRIG(OFF) - IGNORED */
1509 PAD_NC(GPP_E12
, NONE
),
1511 /* GPP_E13 - GPIO */
1512 /* DW0: 0x44000300, DW1: 0x00000000 */
1513 /* DW0: PAD_TRIG(OFF) - IGNORED */
1514 PAD_NC(GPP_E13
, NONE
),
1516 /* GPP_E14 - DDI0_HPD */
1517 /* DW0: 0x44000702, DW1: 0x00000000 */
1518 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1519 PAD_CFG_NF(GPP_E14
, NONE
, DEEP
, NF1
),
1521 /* GPP_E15 - RSVD */
1522 /* DW0: 0x44000b00, DW1: 0x00000000 */
1523 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1524 PAD_NC(GPP_E15
, NONE
),
1526 /* GPP_E16 - RSVD */
1527 /* DW0: 0x44000b00, DW1: 0x00000000 */
1528 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1529 PAD_NC(GPP_E16
, NONE
),
1531 /* GPP_E17 - GPIO */
1532 /* DW0: 0x44000300, DW1: 0x00000000 */
1533 /* DW0: PAD_TRIG(OFF) - IGNORED */
1534 PAD_NC(GPP_E17
, NONE
),
1536 /* GPP_E18 - DDI0_DDC_SDA */
1537 /* DW0: 0x44000702, DW1: 0x00003c00 */
1538 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1539 PAD_CFG_NF(GPP_E18
, NATIVE
, DEEP
, NF1
),
1541 /* GPP_E19 - DDI0_DDC_SCL */
1542 /* DW0: 0x44000600, DW1: 0x00003c00 */
1543 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
1544 PAD_CFG_NF(GPP_E19
, NATIVE
, DEEP
, NF1
),
1546 /* GPP_E20 - GPIO */
1547 /* DW0: 0x44000300, DW1: 0x00000000 */
1548 /* DW0: PAD_TRIG(OFF) - IGNORED */
1549 PAD_NC(GPP_E20
, NONE
),
1551 /* GPP_E21 - GPIO */
1552 /* DW0: 0x44000300, DW1: 0x00000000 */
1553 /* DW0: PAD_TRIG(OFF) - IGNORED */
1554 PAD_NC(GPP_E21
, NONE
),
1556 /* GPP_E22 - GPIO */
1557 /* DW0: 0x44000300, DW1: 0x00000000 */
1558 /* DW0: PAD_TRIG(OFF) - IGNORED */
1559 PAD_NC(GPP_E22
, NONE
),
1561 /* GPP_E23 - GPIO */
1562 /* DW0: 0x44000200, DW1: 0x00000000 */
1563 PAD_NC(GPP_E23
, NONE
),
1565 /* ------- GPIO Community 5 ------- */
1567 /* ------- GPIO Group GPP_R ------- */
1569 /* GPP_R0 - HDA_BCLK */
1570 /* DW0: 0x44000700, DW1: 0x00000000 */
1571 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1572 PAD_CFG_NF(GPP_R0
, NONE
, DEEP
, NF1
),
1574 /* GPP_R1 - HDA_SYNC */
1575 /* DW0: 0x44000700, DW1: 0x00003c00 */
1576 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1577 PAD_CFG_NF(GPP_R1
, NATIVE
, DEEP
, NF1
),
1579 /* GPP_R2 - HDA_SDO */
1580 /* DW0: 0x44000600, DW1: 0x00003c00 */
1581 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
1582 PAD_CFG_NF(GPP_R2
, NATIVE
, DEEP
, NF1
),
1584 /* GPP_R3 - HDA_SDI0 */
1585 /* DW0: 0x44000700, DW1: 0x00003c00 */
1586 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1587 PAD_CFG_NF(GPP_R3
, NATIVE
, DEEP
, NF1
),
1589 /* GPP_R4 - HDA_RST_N */
1590 /* DW0: 0x44000700, DW1: 0x00000000 */
1591 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1592 PAD_CFG_NF(GPP_R4
, NONE
, DEEP
, NF1
),
1595 /* DW0: 0x44000300, DW1: 0x00000000 */
1596 /* DW0: PAD_TRIG(OFF) - IGNORED */
1597 PAD_NC(GPP_R5
, NONE
),
1600 /* DW0: 0x44000300, DW1: 0x00000000 */
1601 /* DW0: PAD_TRIG(OFF) - IGNORED */
1602 PAD_NC(GPP_R6
, NONE
),
1605 /* DW0: 0x44000300, DW1: 0x00000000 */
1606 /* DW0: PAD_TRIG(OFF) - IGNORED */
1607 PAD_NC(GPP_R7
, NONE
),
1611 #endif /* CFG_GPIO_H */