src/mainboard/system76/cml-u/devicetree.cb

   1 chip soc/intel/cannonlake
   2         register "common_soc_config" = "{
   3                 /* Touchpad */
   4                 .i2c[0] = {
   5                         .speed = I2C_SPEED_FAST,
   6                         .rise_time_ns = 80,
   7                         .fall_time_ns = 110,
   8                 },
   9         }"
  10
  11 # CPU (soc/intel/cannonlake/cpu.c)
  12         # Power limit
  13         register "power_limits_config" = "{
  14                 .tdp_pl1_override = 20,
  15                 .tdp_pl2_override = 30,
  16         }"
  17
  18         # Enable Enhanced Intel SpeedStep
  19         register "eist_enable" = "1"
  20
  21 # FSP Memory (soc/intel/cannonlake/romstage/fsp_params.c)
  22         register "SaGv" = "SaGv_Enabled"
  23         register "enable_c6dram" = "1"
  24
  25 # FSP Silicon (soc/intel/cannonlake/fsp_params.c)
  26         # Serial I/O
  27         register "SerialIoDevMode" = "{
  28                 [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad
  29                 [PchSerialIoIndexUART2] = PchSerialIoSkipInit, // LPSS UART
  30         }"
  31
  32         # Misc
  33         register "AcousticNoiseMitigation" = "1"
  34
  35         # Power
  36         register "PchPmSlpS3MinAssert" = "3"    # 50ms
  37         register "PchPmSlpS4MinAssert" = "1"    # 1s
  38         register "PchPmSlpSusMinAssert" = "2"   # 500ms
  39         register "PchPmSlpAMinAssert" = "4"     # 2s
  40
  41         # Thermal
  42         register "tcc_offset" = "12"
  43
  44         # Serial IRQ Continuous
  45         register "serirq_mode" = "SERIRQ_CONTINUOUS"
  46
  47 # PM Util (soc/intel/cannonlake/pmutil.c)
  48         # GPE configuration
  49         # Note that GPE events called out in ASL code rely on this
  50         # route. i.e. If this route changes then the affected GPE
  51         # offset bits also need to be changed.
  52         register "gpe0_dw0" = "PMC_GPP_C"
  53         register "gpe0_dw1" = "PMC_GPP_D"
  54         register "gpe0_dw2" = "PMC_GPP_E"
  55
  56 # Actual device tree
  57         device cpu_cluster 0 on end
  58
  59         device domain 0 on
  60                 device pci 00.0 on  end # Host Bridge
  61                 device pci 02.0 on      # Integrated Graphics Device
  62                         register "gfx" = "GMA_DEFAULT_PANEL(0)"
  63                 end
  64                 device pci 04.0 on      # SA Thermal device
  65                         register "Device4Enable" = "1"
  66                 end
  67                 device pci 12.0 on  end # Thermal Subsystem
  68                 device pci 12.5 off end # UFS SCS
  69                 device pci 12.6 off end # GSPI #2
  70                 device pci 13.0 off end # Integrated Sensor Hub
  71                 device pci 14.1 off end # USB xDCI (OTG)
  72                 device pci 14.3 on      # CNVi wifi
  73                         chip drivers/wifi/generic
  74                                 register "wake" = "GPE0_PME_B0"
  75                                 device generic 0 on end
  76                         end
  77                 end
  78                 device pci 14.5 off end # SDCard
  79                 device pci 15.1 off end # I2C #1
  80                 device pci 15.2 off end # I2C #2
  81                 device pci 15.3 off end # I2C #3
  82                 device pci 16.0 on  end # Management Engine Interface 1
  83                 device pci 16.1 off end # Management Engine Interface 2
  84                 device pci 16.2 off end # Management Engine IDE-R
  85                 device pci 16.3 off end # Management Engine KT Redirection
  86                 device pci 16.4 off end # Management Engine Interface 3
  87                 device pci 16.5 off end # Management Engine Interface 4
  88                 device pci 19.0 off end # I2C #4
  89                 device pci 19.1 off end # I2C #5
  90                 device pci 19.2 on  end # UART #2
  91                 device pci 1a.0 off end # eMMC
  92                 device pci 1c.0 off end # PCI Express Port 1
  93                 device pci 1c.1 off end # PCI Express Port 2
  94                 device pci 1c.2 off end # PCI Express Port 3
  95                 device pci 1c.3 off end # PCI Express Port 4
  96                 device pci 1c.4 off end # PCI Express Port 5
  97                 device pci 1c.5 off end # PCI Express Port 6
  98                 device pci 1c.6 off end # PCI Express Port 7
  99                 device pci 1c.7 off end # PCI Express Port 8
 100                 device pci 1d.0 off end # PCI Express Port 9
 101                 device pci 1d.1 off end # PCI Express Port 10
 102                 device pci 1d.2 off end # PCI Express Port 11
 103                 device pci 1d.3 off end # PCI Express Port 12
 104                 device pci 1d.4 off end # PCI Express Port 13
 105                 device pci 1d.5 off end # PCI Express Port 14
 106                 device pci 1d.6 off end # PCI Express Port 15
 107                 device pci 1d.7 off end # PCI Express Port 16
 108                 device pci 1e.0 off end # UART #0
 109                 device pci 1e.1 off end # UART #1
 110                 device pci 1e.2 off end # GSPI #0
 111                 device pci 1e.3 off end # GSPI #1
 112                 device pci 1f.0 on      # LPC Interface
 113                         register "gen1_dec" = "0x00040069"
 114                         register "gen2_dec" = "0x00fc0e01"
 115                         register "gen3_dec" = "0x00fc0f01"
 116                         chip drivers/pc80/tpm
 117                                 device pnp 0c31.0 on end
 118                         end
 119                 end
 120                 device pci 1f.1 off end # P2SB
 121                 device pci 1f.2 hidden end # Power Management Controller
 122                 device pci 1f.3 on      # Intel HDA
 123                         register "PchHdaAudioLinkHda" = "1"
 124                 end
 125                 device pci 1f.4 on  end # SMBus
 126                 device pci 1f.5 on  end # PCH SPI
 127                 device pci 1f.6 off end # GbE
 128         end
 129 end