1 /* SPDX-License-Identifier: GPL-2.0-only */
5 #ifndef CFG_GPIO_EARLY_H
6 #define CFG_GPIO_EARLY_H
8 static const struct pad_config early_gpio_table
[] = {
9 /* ------- GPIO Group South-West ------- */
11 /* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
12 PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ
, UP_20K
, DEEP
, NF1
),
14 /* LPC_CLKOUT0 - LPC_CLKOUT0 */
15 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0
, NONE
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
17 /* LPC_CLKOUT1 - LPC_CLKOUT1 */
18 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1
, NONE
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
20 /* LPC_AD0 - LPC_AD0 */
21 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
23 /* LPC_AD1 - LPC_AD1 */
24 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
26 /* LPC_AD2 - LPC_AD2 */
27 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
29 /* LPC_AD3 - LPC_AD3 */
30 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
32 /* LPC_CLKRUNB - LPC_CLKRUNB */
33 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
35 /* LPC_FRAMEB - LPC_FRAMEB */
36 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
38 /* ------- GPIO Group North ------- */
40 /* GPIO_38 - LPSS_UART0_RXD */
41 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
43 /* GPIO_39 - LPSS_UART0_TXD */
44 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39
, UP_20K
, DEEP
, NF1
, TxLASTRxE
, DISPUPD
),
46 /* GPIO_42 - LPSS_UART1_RXD */
47 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
49 /* GPIO_43 - LPSS_UART1_TXD */
50 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43
, UP_20K
, DEEP
, NF1
, HIZCRx0
, DISPUPD
),
53 #endif /* CFG_GPIO_EARLY_H */