src/soc/intel/tigerlake/espi.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Tiger Lake Processor PCH Datasheet
   5  * Document number: 575857
   6  * Chapter number: 2
   7  */
   8
   9 #include <device/device.h>
  10 #include <device/pci.h>
  11 #include <pc80/isa-dma.h>
  12 #include <pc80/i8259.h>
  13 #include <device/pci_ops.h>
  14 #include <arch/ioapic.h>
  15 #include <intelblocks/itss.h>
  16 #include <intelblocks/lpc_lib.h>
  17 #include <soc/espi.h>
  18 #include <soc/iomap.h>
  19 #include <soc/irq.h>
  20 #include <soc/pci_devs.h>
  21 #include <soc/pcr_ids.h>
  22 #include <soc/soc_chip.h>
  23
  24 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
  25 {
  26         const config_t *config = config_of_soc();
  27
  28         gen_io_dec[0] = config->gen1_dec;
  29         gen_io_dec[1] = config->gen2_dec;
  30         gen_io_dec[2] = config->gen3_dec;
  31         gen_io_dec[3] = config->gen4_dec;
  32 }
  33
  34 #if ENV_RAMSTAGE
  35 void lpc_soc_init(struct device *dev)
  36 {
  37         /* Legacy initialization */
  38         isa_dma_init();
  39         pch_misc_init();
  40
  41         /* Enable CLKRUN_EN for power gating ESPI */
  42         lpc_enable_pci_clk_cntl();
  43
  44         /* Set ESPI Serial IRQ mode */
  45         if (CONFIG(SERIRQ_CONTINUOUS_MODE))
  46                 lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
  47         else
  48                 lpc_set_serirq_mode(SERIRQ_QUIET);
  49
  50         /* Interrupt configuration */
  51         pch_enable_ioapic();
  52         pch_pirq_init();
  53         setup_i8259();
  54         i8259_configure_irq_trigger(9, 1);
  55 }
  56
  57 #endif