src/drivers/amd/agesa/cache_as_ram.S

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /******************************************************************************
   4  * AMD Generic Encapsulated Software Architecture
   5  *
   6  * $Workfile:: cache_as_ram.S
   7  *
   8  * Description: cache_as_ram.S - AGESA Module Entry Point for GCC compiler
   9  *
  10  ******************************************************************************
  11  */
  12
  13 #include <cpu/x86/lapic_def.h>
  14 #include <cpu/x86/post_code.h>
  15 #include <amdblocks/post_codes.h>
  16
  17 .section .init
  18
  19 .code32
  20
  21 .global bootblock_pre_c_entry
  22
  23 _cache_as_ram_setup:
  24
  25 #include "gcccar.inc"
  26
  27 /*
  28  * on entry:
  29  *   mm0: BIST (ignored)
  30  *   mm2_mm1: timestamp
  31  */
  32 bootblock_pre_c_entry:
  33
  34         post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY)
  35
  36         AMD_ENABLE_STACK
  37
  38         /*
  39          * Set up bootblock stack on BSP.
  40          * AMD_ENABLE_STACK macro sets up a stack for BSP at BSP_STACK_BASE_ADDR
  41          * which is 0x30000 (_car_region_end), but for C bootblock the stack
  42          * begins at _ecar_stack (see arch/x86/car.ld)
  43          */
  44         mov     $LAPIC_BASE_MSR, %ecx
  45         rdmsr
  46         test    $LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR, %eax
  47         jz      ap_entry
  48
  49         mov     $_ecar_stack, %esp
  50
  51         /* Align the stack and keep aligned for call to bootblock_c_entry() */
  52         and     $0xfffffff0, %esp
  53         sub     $8, %esp
  54
  55         movd    %mm2, %eax
  56         pushl   %eax            /* tsc[63:32] */
  57         movd    %mm1, %eax
  58         pushl   %eax            /* tsc[31:0] */
  59
  60         /* Copy .data section content to Cache-As-Ram */
  61 #include <cpu/x86/copy_data_section.inc>
  62
  63         post_code(POSTCODE_BOOTBLOCK_PRE_C_DONE)
  64
  65         call    bootblock_c_entry
  66
  67         /* Never reached. */
  68
  69 stop:
  70         post_code(POSTCODE_DEAD_CODE)
  71         hlt
  72         jmp     stop
  73
  74 ap_entry:
  75         /* Align the stack for call to ap_bootblock_c_entry() */
  76         and     $0xfffffff0, %esp
  77         call    ap_bootblock_c_entry
  78
  79         /* Never reached. */
  80         jmp     stop
  81
  82 _cache_as_ram_setup_end: