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mb/google/brya: Create rull variant
[coreboot2.git] / src / include / espi.h
blob244478394e8fe43888128e658cfbb2e1a50c0dce
1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #ifndef __ESPI_H__
4 #define __ESPI_H__
5
6 #include <types.h>
7
8 /* ESPI Slave Registers (Document # 327432-004 Revision 1.0 Chapter 7) */
9
10 #define ESPI_SLAVE_DEVICE_ID 0x04
11 #define ESPI_SLAVE_VERSION_ID_SHIFT 0
12 #define ESPI_SLAVE_VERSION_ID_MASK 0xf
13
14 #define ESPI_SLAVE_GENERAL_CFG 0x08
15 #define ESPI_SLAVE_CRC_ENABLE (1 << 31)
16 #define ESPI_SLAVE_CRC_DISABLE (0 << 31)
17 #define ESPI_SLAVE_RESP_MOD_ENABLE (1 << 30)
18 #define ESPI_SLAVE_RESP_MOD_DISABLE (0 << 30)
19 #define ESPI_SLAVE_ALERT_MODE_PIN (1 << 28)
20 #define ESPI_SLAVE_ALERT_MODE_IO1 (0 << 28)
21 #define ESPI_SLAVE_IO_MODE_SEL_SHIFT 26
22 #define ESPI_SLAVE_IO_MODE_SEL_MASK (0x3 << ESPI_SLAVE_IO_MODE_SEL_SHIFT)
23 #define ESPI_SLAVE_IO_MODE_SEL_VAL(x) ((x) << ESPI_SLAVE_IO_MODE_SEL_SHIFT)
24 #define ESPI_SLAVE_IO_MODE_SEL_SINGLE ESPI_SLAVE_IO_MODE_SEL_VAL(0)
25 #define ESPI_SLAVE_IO_MODE_SEL_DUAL ESPI_SLAVE_IO_MODE_SEL_VAL(1)
26 #define ESPI_SLAVE_IO_MODE_SEL_QUAD ESPI_SLAVE_IO_MODE_SEL_VAL(2)
27 #define ESPI_SLAVE_IO_MODE_SUPP_SHIFT 24
28 #define ESPI_SLAVE_IO_MODE_SUPP_MASK (0x3 << ESPI_SLAVE_IO_MODE_SUPP_SHIFT)
29 #define ESPI_SLAVE_IO_MODE_SUPP_VAL(x) ((x) << ESPI_SLAVE_IO_MODE_SUPP_SHIFT)
30 #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_ONLY ESPI_SLAVE_IO_MODE_SUPP_VAL(0)
31 #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL ESPI_SLAVE_IO_MODE_SUPP_VAL(1)
32 #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_QUAD ESPI_SLAVE_IO_MODE_SUPP_VAL(2)
33 #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD ESPI_SLAVE_IO_MODE_SUPP_VAL(3)
34 #define ESPI_SLAVE_OPEN_DRAIN_ALERT_SEL (1 << 23)
35 #define ESPI_SLAVE_PUSH_PULL_ALERT_SEL (0 << 23)
36 #define ESPI_SLAVE_OP_FREQ_SEL_SHIFT 20
37 #define ESPI_SLAVE_OP_FREQ_SEL_MASK (0x7 << ESPI_SLAVE_OP_FREQ_SEL_SHIFT)
38 #define ESPI_SLAVE_OP_FREQ_SEL_VAL(x) ((x) << ESPI_SLAVE_OP_FREQ_SEL_SHIFT)
39 #define ESPI_SLAVE_OP_FREQ_SEL_20_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(0)
40 #define ESPI_SLAVE_OP_FREQ_SEL_25_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(1)
41 #define ESPI_SLAVE_OP_FREQ_SEL_33_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(2)
42 #define ESPI_SLAVE_OP_FREQ_SEL_50_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(3)
43 #define ESPI_SLAVE_OP_FREQ_SEL_66_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(4)
44 #define ESPI_SLAVE_OPEN_DRAIN_ALERT_SUPP (1 << 19)
45 #define ESPI_SLAVE_OP_FREQ_SUPP_SHIFT 16
46 #define ESPI_SLAVE_OP_FREQ_SUPP_MASK (0x7 << ESPI_SLAVE_OP_FREQ_SUPP_SHIFT)
47 #define ESPI_SLAVE_OP_FREQ_SUPP_VAL(x) ((x) << ESPI_SLAVE_OP_FREQ_SUPP_SHIFT)
48 #define ESPI_SLAVE_OP_FREQ_SUPP_20_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(0)
49 #define ESPI_SLAVE_OP_FREQ_SUPP_25_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(1)
50 #define ESPI_SLAVE_OP_FREQ_SUPP_33_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(2)
51 #define ESPI_SLAVE_OP_FREQ_SUPP_50_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(3)
52 #define ESPI_SLAVE_OP_FREQ_SUPP_66_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(4)
53 #define ESPI_SLAVE_MAX_WAIT_SHIFT 12
54 #define ESPI_SLAVE_MAX_WAIT_MASK (0xf << ESPI_SLAVE_MAX_WAIT_SHIFT)
55 #define ESPI_SLAVE_MAX_WAIT_STATE(x) \
56 (((x) << ESPI_SLAVE_MAX_WAIT_SHIFT) & ESPI_MAX_WAIT_MASK)
57 #define ESPI_SLAVE_FLASH_CH_SUPP (1 << 3)
58 #define ESPI_SLAVE_OOB_CH_SUPP (1 << 2)
59 #define ESPI_SLAVE_VW_CH_SUPP (1 << 1)
60 #define ESPI_SLAVE_PERIPH_CH_SUPP (1 << 0)
61
62 #define ESPI_SLAVE_PERIPH_CFG 0x10
63 #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT 12
64 #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_MASK \
65 (0x7 << ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT)
66 #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(x) \
67 ((x) << ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT)
68 #define ESPI_SLAVE_PERIPH_MAX_READ_64B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(1)
69 #define ESPI_SLAVE_PERIPH_MAX_READ_128B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(2)
70 #define ESPI_SLAVE_PERIPH_MAX_READ_256B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(3)
71 #define ESPI_SLAVE_PERIPH_MAX_READ_512B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(4)
72 #define ESPI_SLAVE_PERIPH_MAX_READ_1024B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(5)
73 #define ESPI_SLAVE_PERIPH_MAX_READ_2048B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(6)
74 #define ESPI_SLAVE_PERIPH_MAX_READ_4096B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(7)
75 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT 8
76 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_MASK \
77 (0x7 << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT)
78 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(x) \
79 ((x) << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT)
80 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_64B \
81 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(1)
82 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_128B \
83 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(2)
84 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_256B \
85 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(3)
86 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT 4
87 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_MASK \
88 (0x7 << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
89 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \
90 ((x) << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
91 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_64B \
92 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(1)
93 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_128B \
94 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(2)
95 #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_256B \
96 ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(3)
97 #define ESPI_SLAVE_PERIPH_BUS_MASTER_ENABLE (1 << 2)
98
99 #define ESPI_SLAVE_VW_CFG 0x20
100 #define ESPI_SLAVE_VW_COUNT_SEL_SHIFT 16
101 #define ESPI_SLAVE_VW_COUNT_SEL_MASK (0x3f << ESPI_SLAVE_VW_COUNT_SEL_SHIFT)
102 /* 0-based field. Value of 0 indicates 1 virtual wire selected. */
103 #define ESPI_SLAVE_VW_COUNT_SEL_VAL(x) \
104 ((x) << ESPI_SLAVE_VW_COUNT_SEL_SHIFT)
105 #define ESPI_SLAVE_VW_COUNT_SUPP_SHIFT 8
106 #define ESPI_SLAVE_VW_COUNT_SUPP_MASK \
107 (0x3f << ESPI_SLAVE_VW_COUNT_SUPP_SHIFT)
108
109 #define ESPI_SLAVE_OOB_CFG 0x30
110 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT 8
111 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_MASK \
112 (0x7 << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT)
113 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(x) \
114 ((x) << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT)
115 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_64B \
116 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(1)
117 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_128B \
118 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(2)
119 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_256B \
120 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(3)
121 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT 4
122 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_MASK \
123 (0x7 << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
124 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \
125 ((x) << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
126 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_64B \
127 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(1)
128 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_128B \
129 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(2)
130 #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_256B \
131 ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(3)
132
133 #define ESPI_SLAVE_FLASH_CFG 0x40
134 #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT 12
135 #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_MASK \
136 (0x7 << ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT)
137 #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(x) \
138 ((x) << ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT)
139 #define ESPI_SLAVE_FLASH_MAX_READ_64B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(1)
140 #define ESPI_SLAVE_FLASH_MAX_READ_128B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(2)
141 #define ESPI_SLAVE_FLASH_MAX_READ_256B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(3)
142 #define ESPI_SLAVE_FLASH_MAX_READ_512B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(4)
143 #define ESPI_SLAVE_FLASH_MAX_READ_1024B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(5)
144 #define ESPI_SLAVE_FLASH_MAX_READ_2048B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(6)
145 #define ESPI_SLAVE_FLASH_MAX_READ_4096B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(7)
146 #define ESPI_SLAVE_FLASH_SHARING_MODE_MAF (1 << 11)
147 #define ESPI_SLAVE_FLASH_SHARING_MODE_SAF (0 << 11)
148 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT 8
149 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_MASK \
150 (0x7 << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT)
151 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(x) \
152 ((x) << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT)
153 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_64B \
154 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(1)
155 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_128B \
156 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(2)
157 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_256B \
158 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(3)
159 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT 5
160 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_MASK \
161 (0x7 << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
162 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \
163 ((x) << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT)
164 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_64B \
165 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(1)
166 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_128B \
167 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(2)
168 #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_256B \
169 ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(3)
170 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT 2
171 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_MASK \
172 (0x7 << ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT)
173 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(x) \
174 ((x) << ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT)
175 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_4K \
176 ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(1)
177 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_64K \
178 ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(2)
179 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_4K_64K \
180 ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(3)
181 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_128K \
182 ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(4)
183 #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_256K \
184 ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(5)
185
186 /*
187 * All channels -- peripheral, OOB, VW and flash use the same bits for channel ready and channel
188 * enable.
189 */
190 #define ESPI_SLAVE_CHANNEL_READY (1 << 1)
191 #define ESPI_SLAVE_CHANNEL_ENABLE (1 << 0)
192
193 /* ESPI Slave Registers (Document # 327432-004 Revision 1.0 Chapter 5) */
194 #define ESPI_VW_INDEX_INTERRUPT_EVENT_0 0 /* Interrupt lines 0 - 127 */
195 #define ESPI_VW_INDEX_INTERRUPT_EVENT_1 1 /* Interrupt lines 128-255 */
196 #define ESPI_VW_INTERRUPT_LEVEL_HIGH (1 << 7)
197 #define ESPI_VW_INTERRUPT_LEVEL_LOW (0 << 7)
198
199 #define ESPI_VW_INDEX_SYSTEM_EVENT_2 2
200 #define ESPI_VW_SLP_S5 2
201 #define ESPI_VW_SLP_S4 1
202 #define ESPI_VW_SLP_S3 0
203 #define ESPI_VW_INDEX_SYSTEM_EVENT_3 3
204 #define ESPI_VW_OOB_RST_WARN 2
205 #define ESPI_VW_PLTRST 1
206 #define ESPI_VW_SUS_STAT 0
207 #define ESPI_VW_INDEX_SYSTEM_EVENT_4 4
208 #define ESPI_VW_PME 3
209 #define ESPI_VW_WAKE 2
210 #define ESPI_VW_OOB_RST_ACK 0
211 #define ESPI_VW_INDEX_SYSTEM_EVENT_5 5
212 #define ESPI_VW_SLAVE_BOOT_LOAD_STATUS 3
213 #define ESPI_VW_ERROR_NON_FATAL 2
214 #define ESPI_VW_ERROR_FATAL 1
215 #define ESPI_VW_SLV_BOOT_LOAD_DONE 0
216 #define ESPI_VW_INDEX_SYSTEM_EVENT_6 6
217 #define ESPI_VW_HOST_RST_ACK 3
218 #define ESPI_VW_RCIN 2
219 #define ESPI_VW_SMI 1
220 #define ESPI_VW_SCI 0
221 #define ESPI_VW_INDEX_SYSTEM_EVENT_7 7
222 #define ESPI_VW_NMIOUT 2
223 #define ESPI_VW_SMIOUT 1
224 #define ESPI_VW_HOST_RST_WARN 0
225
226 #define ESPI_VW_VALID(x) (1 << ((x) + 4))
227 #define ESPI_VW_VALUE(x, v) ((v) << (x))
228 #define ESPI_VW_SIGNAL_HIGH(x) (ESPI_VW_VALID(x) | ESPI_VW_VALUE(1, x))
229 #define ESPI_VW_SIGNAL_LOW(x) (ESPI_VW_VALID(x) | ESPI_VW_VALUE(0, x))
230
231 #if CONFIG(ESPI_DEBUG)
232 void espi_show_slave_general_configuration(uint32_t config);
233 void espi_show_slave_peripheral_channel_configuration(uint32_t config);
234 #else
235 static inline void espi_show_slave_general_configuration(uint32_t config) {}
236 static inline void espi_show_slave_peripheral_channel_configuration(uint32_t config) {}
237 #endif
238
239 static inline bool espi_slave_supports_quad_io(uint32_t gen_caps)
240 {
241 uint32_t mode = gen_caps & ESPI_SLAVE_IO_MODE_SUPP_MASK;
242 return (mode == ESPI_SLAVE_IO_MODE_SUPP_SINGLE_QUAD) ||
243 (mode == ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD);
244 }
245
246 static inline bool espi_slave_supports_dual_io(uint32_t gen_caps)
247 {
248 uint32_t mode = gen_caps & ESPI_SLAVE_IO_MODE_SUPP_MASK;
249 return (mode == ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL) ||
250 (mode == ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD);
251 }
252
253 static inline bool espi_slave_supports_66_mhz(uint32_t gen_caps)
254 {
255 uint32_t freq = gen_caps & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
256 return freq == ESPI_SLAVE_OP_FREQ_SUPP_66_MHZ;
257 }
258
259 static inline bool espi_slave_supports_50_mhz(uint32_t gen_caps)
260 {
261 uint32_t freq = gen_caps & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
262 return freq == ESPI_SLAVE_OP_FREQ_SUPP_50_MHZ;
263 }
264
265 static inline bool espi_slave_supports_33_mhz(uint32_t gen_caps)
266 {
267 uint32_t freq = gen_caps & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
268 return freq == ESPI_SLAVE_OP_FREQ_SUPP_33_MHZ;
269 }
270
271 static inline bool espi_slave_supports_25_mhz(uint32_t gen_caps)
272 {
273 uint32_t freq = gen_caps & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
274 return freq == ESPI_SLAVE_OP_FREQ_SUPP_25_MHZ;
275 }
276
277 static inline bool espi_slave_supports_20_mhz(uint32_t gen_caps)
278 {
279 uint32_t freq = gen_caps & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
280 return freq == ESPI_SLAVE_OP_FREQ_SUPP_20_MHZ;
281 }
282
283 static inline int espi_slave_max_speed_mhz_supported(uint32_t gen_caps)
284 {
285 if (espi_slave_supports_66_mhz(gen_caps))
286 return 66;
287 else if (espi_slave_supports_50_mhz(gen_caps))
288 return 50;
289 else if (espi_slave_supports_33_mhz(gen_caps))
290 return 33;
291 else if (espi_slave_supports_25_mhz(gen_caps))
292 return 25;
293 else if (espi_slave_supports_20_mhz(gen_caps))
294 return 20;
295 return 0;
296 }
297
298 static inline bool espi_slave_supports_vw_channel(uint32_t gen_caps)
299 {
300 return !!(gen_caps & ESPI_SLAVE_VW_CH_SUPP);
301 }
302
303 static inline bool espi_slave_supports_periph_channel(uint32_t gen_caps)
304 {
305 return !!(gen_caps & ESPI_SLAVE_PERIPH_CH_SUPP);
306 }
307
308 static inline bool espi_slave_supports_oob_channel(uint32_t gen_caps)
309 {
310 return !!(gen_caps & ESPI_SLAVE_OOB_CH_SUPP);
311 }
312
313 static inline bool espi_slave_supports_flash_channel(uint32_t gen_caps)
314 {
315 return !!(gen_caps & ESPI_SLAVE_FLASH_CH_SUPP);
316 }
317
318 static inline bool espi_slave_is_channel_ready(uint32_t config)
319 {
320 return !!(config & ESPI_SLAVE_CHANNEL_READY);
321 }
322
323 static inline uint32_t espi_slave_get_vw_count_supp(uint32_t vw_caps)
324 {
325 return (vw_caps & ESPI_SLAVE_VW_COUNT_SUPP_MASK) >> ESPI_SLAVE_VW_COUNT_SUPP_SHIFT;
326 }
327
328 #endif /* __ESPI_H__ */
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