mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / facebook / fbg1701 / hda_verb.c
blobeae4d034311aac2e59f092e77dcad5dc874d1765
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* coreboot specific header */
7 0x10EC0298, /* Codec Vendor - Device ID: Realtek ALC298 */
8 0x152D1165, /* Subsystem ID Quanta */
9 0x0000000E, /* Number of jacks */
11 /* HDA Codec Subsystem ID Verb Table */
12 AZALIA_SUBVENDOR(0, 0x152D1165),
14 /* Pin Widget Verb Table */
16 /* Widget node 1 (NID 0x01) */
17 0x0017FF00,
18 0x0017FF00,
19 0x0017FF00,
20 0x0017FF00,
22 /* Pin Complex (NID 0x12) DMIC */
23 AZALIA_PIN_CFG(0, 0x12, 0x90A60130),
25 /* Pin Complex (NID 0x13) DMIC */
26 AZALIA_PIN_CFG(0, 0x13, 0x411111F0),
28 /* Pin Complex (NID 0x14) SPEAKER-OUT (Port-D) */
29 AZALIA_PIN_CFG(0, 0x14, 0x90180110),
31 /* Pin Complex (NID 0x17) I2S-OUT */
32 AZALIA_PIN_CFG(0, 0x17, 0x01011120),
34 /* Pin Complex (NID 0x18) MIC1 (Port-B) */
35 AZALIA_PIN_CFG(0, 0x18, 0x411111F0),
37 /* Pin Complex (NID 0x19) I2S-IN */
38 AZALIA_PIN_CFG(0, 0x19, 0x90870140),
40 /* Pin Complex (NID 0x1A) LINE1 (Port-C) */
41 AZALIA_PIN_CFG(0, 0x1A, 0x411111F0),
43 /* Pin Complex (NID 0x1D) PC-BEEP */
44 AZALIA_PIN_CFG(0, 0x1D, 0x40400001),
46 /* Pin Complex (NID 0x1E) SPDIF-OUT */
47 AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
49 /* Pin Complex (NID 0x1F) SPDIF-IN */
50 AZALIA_PIN_CFG(0, 0x1F, 0x411111F0),
52 /* Pin Complex (NID 0x21) HP-OUT (Port-A) */
53 AZALIA_PIN_CFG(0, 0x21, 0x411111F0),
55 /* POST I2S bypass output SRC */
56 0x0205002D,
57 0x0204C020,
58 0x0205002D,
59 0x0204C020,
63 const u32 pc_beep_verbs[0] = {};
65 AZALIA_ARRAY_SIZES;