mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / google / fizz / dsdt.asl
blobef2c54a61ad1a796475f8a434061b101e3361efe
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <variant/ec.h>
4 #include <variant/gpio.h>
6 #include <acpi/acpi.h>
7 DefinitionBlock(
8         "dsdt.aml",
9         "DSDT",
10         ACPI_DSDT_REV_2,
11         OEM_ID,
12         ACPI_TABLE_CREATOR,
13         0x20110725
16         #include <acpi/dsdt_top.asl>
17         #include <soc/intel/common/block/acpi/acpi/platform.asl>
18         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
19         #include <cpu/intel/common/acpi/cpu.asl>
21         Scope (\_SB)
22         {
23                 Device (PCI0)
24                 {
25                         #include <soc/intel/skylake/acpi/systemagent.asl>
26                         #include <soc/intel/skylake/acpi/pch.asl>
27                 }
28         }
30         #include <southbridge/intel/common/acpi/sleepstates.asl>
32         /* ChromeOS Embedded Controller */
33         Scope (\_SB.PCI0.LPCB)
34         {
35                 /* ACPI code for EC SuperIO functions */
36                 #include <ec/google/chromeec/acpi/superio.asl>
37                 /* ACPI code for EC functions */
38                 #include <ec/google/chromeec/acpi/ec.asl>
39         }
41         Scope (\_SB)
42         {
43                 /* Dynamic Platform Thermal Framework */
44                 #include <variant/acpi/dptf.asl>
45         }