mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / google / kahlee / dsdt.asl
blob8a88848034ff46293345d6486c85c9a58921bc41
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <variant/ec.h>
5 /* DefinitionBlock Statement */
6 #include <acpi/acpi.h>
7 DefinitionBlock (
8         "dsdt.aml",
9         "DSDT",
10         ACPI_DSDT_REV_2,
11         OEM_ID,
12         ACPI_TABLE_CREATOR,
13         0x00010001      /* OEM Revision */
14         )
15 {       /* Start of ASL file */
16         #include <acpi/dsdt_top.asl>
17         #include <globalnvs.asl>
19         Name(LIDS, 0)
21         /* Globals for the platform */
22         #include <variant/acpi/mainboard.asl>
24         /* PCI IRQ mapping for the Southbridge */
25         #include <pcie.asl>
27         /* Power state notification */
28         #include <pnot.asl>
30         /* Contains the supported sleep states for this chipset */
31         #include <soc/amd/common/acpi/sleepstates.asl>
33         /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
34         #include <variant/acpi/sleep.asl>
36         /* Contains _SWS methods */
37         #include <soc/amd/common/acpi/acpi_wake_source.asl>
39         /* System Bus */
40         Scope(\_SB) { /* Start \_SB scope */
41                 /* global utility methods expected within the \_SB scope */
42                 #include <arch/x86/acpi/globutil.asl>
44                 /* IRQ Routing mapping for this platform (in \_SB scope) */
45                 #include <variant/acpi/routing.asl>
47                 /* Describe the SOC */
48                 #include <soc.asl>
50         } /* End \_SB scope */
52         /* Thermal handler */
53         #include <variant/acpi/thermal.asl>
55         /* ChromeOS Embedded Controller */
56         Scope (\_SB.PCI0.LPCB)
57         {
58                 /* ACPI code for EC SuperIO functions */
59                 #include <ec/google/chromeec/acpi/superio.asl>
60                 /* ACPI code for EC functions */
61                 #include <ec/google/chromeec/acpi/ec.asl>
62         }
64         /* Define the General Purpose Events for the platform */
65         #include <variant/acpi/gpe.asl>
67 /* End of ASL file */