src/mainboard/google/kahlee/ec.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi.h>
   4 #include <console/console.h>
   5 #include <ec/google/chromeec/ec.h>
   6 #include <amdblocks/lpc.h>
   7 #include <soc/southbridge.h>
   8 #include <variant/ec.h>
   9
  10 static void ramstage_ec_init(void)
  11 {
  12         const struct google_chromeec_event_info info = {
  13                 .log_events = MAINBOARD_EC_LOG_EVENTS,
  14                 .sci_events = MAINBOARD_EC_SCI_EVENTS,
  15                 .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
  16                 .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
  17         };
  18
  19         printk(BIOS_DEBUG, "mainboard: EC init\n");
  20
  21         google_chromeec_events_init(&info, acpi_is_wakeup_s3());
  22 }
  23
  24 static void early_ec_init(void)
  25 {
  26         uint16_t ec_ioport_base;
  27         size_t ec_ioport_size;
  28         int status;
  29
  30         /*
  31          * Set up LPC decoding for the ChromeEC I/O port ranges:
  32          * - Ports 62/66, 60/64, and 200->208
  33          *  -- set by hudson_lpc_decode() in pre
  34          * - ChromeEC specific communication I/O ports.
  35          */
  36         google_chromeec_ioport_range(&ec_ioport_base, &ec_ioport_size);
  37         printk(BIOS_DEBUG,
  38                 "LPC Setup google_chromeec_ioport_range: %04x, %08zx\n",
  39                 ec_ioport_base, ec_ioport_size);
  40         status = lpc_set_wideio_range(ec_ioport_base, ec_ioport_size);
  41         if (status == WIDEIO_RANGE_ERROR)
  42                 printk(BIOS_ERR, "Failed to assign a range\n");
  43         else
  44                 printk(BIOS_DEBUG, "Range assigned to wide IO %d\n", status);
  45 }
  46
  47 void mainboard_ec_init(void)
  48 {
  49         if (ENV_RAMSTAGE)
  50                 ramstage_ec_init();
  51         else
  52                 early_ec_init();
  53 }