src/mainboard/google/rex/variants/deku/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <types.h>
   6 #include <soc/gpio.h>
   7 #include <vendorcode/google/chromeos/chromeos.h>
   8
   9 /* Pad configuration in ramstage */
  10 static const struct pad_config gpio_table[] = {
  11         /* GPP_A00 : [] ==> ESPI_SOC_D0_R */
  12         PAD_CFG_NF_IOSSTATE(GPP_A00, UP_20K, DEEP, NF1, IGNORE),
  13         /* GPP_A01 : [] ==> ESPI_SOC_D1_R */
  14         PAD_CFG_NF_IOSSTATE(GPP_A01, UP_20K, DEEP, NF1, IGNORE),
  15         /* GPP_A02 : [] ==> ESPI_SOC_D2_R */
  16         PAD_CFG_NF_IOSSTATE(GPP_A02, UP_20K, DEEP, NF1, IGNORE),
  17         /* GPP_A03 : [] ==> ESPI_SOC_D3_R */
  18         PAD_CFG_NF_IOSSTATE(GPP_A03, UP_20K, DEEP, NF1, IGNORE),
  19         /* GPP_A04 : [] ==> ESPI_SOC_CS_L */
  20         PAD_CFG_NF_IOSSTATE(GPP_A04, UP_20K, DEEP, NF1, IGNORE),
  21         /* GPP_A05 : [] ==> ESPI_SOC_CLK_R */
  22         PAD_CFG_NF_IOSSTATE(GPP_A05, UP_20K, DEEP, NF1, IGNORE),
  23         /* GPP_A06 : [] ==> ESPI_SOC_RST_L */
  24         PAD_CFG_NF_IOSSTATE(GPP_A06, UP_20K, DEEP, NF1, IGNORE),
  25         /* GPP_A11 : [] ==> LAN0_ISOLATE_R_ODL */
  26         PAD_CFG_GPO(GPP_A11, 1, DEEP),
  27         /* GPP_A12 : [] ==> LAN1_ISOLATE_R_ODL */
  28         PAD_CFG_GPO(GPP_A12, 1, DEEP),
  29         /* GPP_A13 : net NC is not present in the given design */
  30         PAD_NC(GPP_A13, NONE),
  31         /* GPP_A14 : net NC is not present in the given design */
  32         PAD_NC(GPP_A14, NONE),
  33         /* GPP_A15 : net NC is not present in the given design */
  34         PAD_NC(GPP_A15, NONE),
  35         /* GPP_A16 : [] ==> ESPI_SOC_ALERT_L */
  36          PAD_CFG_NF_IOSSTATE(GPP_A16, UP_20K, DEEP, NF1, IGNORE),
  37         /* GPP_A17 : [] ==> EC_SOC_INT_ODL */
  38         PAD_CFG_GPI_APIC_LOCK(GPP_A17, NONE, LEVEL, INVERT, LOCK_CONFIG),
  39         /* GPP_A18 : net NC is not present in the given design */
  40         PAD_NC(GPP_A18, NONE),
  41         /* GPP_A21 : [] ==> SOC_GPP_A21 */
  42         PAD_NC(GPP_A21, NONE),
  43
  44         /* GPP_B00 : net NC is not present in the given design */
  45         PAD_NC(GPP_B00, NONE),
  46         /* GPP_B01 : [] ==> BT_DISABLE_L */
  47         PAD_CFG_GPO(GPP_B01, 1, DEEP),
  48         /* GPP_B02 : net NC is not present in the given design */
  49         PAD_NC(GPP_B02, NONE),
  50         /* GPP_B03 : net NC is not present in the given design */
  51         PAD_NC(GPP_B03, NONE),
  52         /* GPP_B04 : [GPP_B04_STRAP] ==> Component NC */
  53         PAD_NC(GPP_B04, NONE),
  54         /* GPP_B05 : net NC is not present in the given design */
  55         PAD_NC(GPP_B05, NONE),
  56         /* GPP_B06 : net NC is not present in the given design */
  57         PAD_NC(GPP_B06, NONE),
  58         /* GPP_B07 : net NC is not present in the given design */
  59         PAD_NC(GPP_B07, NONE),
  60         /* GPP_B08 : [] ==> PWM_BUZZER */
  61         PAD_CFG_GPO(GPP_B08, 0, DEEP),
  62         /* GPP_B09 : net NC is not present in the given design */
  63         PAD_NC(GPP_B09, NONE),
  64         /* GPP_B10 : [] ==> WIFI_DISABLE_L */
  65         PAD_CFG_GPO(GPP_B10, 1, DEEP),
  66         /* GPP_B11 : net NC is not present in the given design */
  67         PAD_NC(GPP_B11, NONE),
  68         /* GPP_B12 : [] ==> SLP_S0_R_L */
  69         PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
  70         /* GPP_B13 : [] ==> PLT_PCIE_RST_L */
  71         PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
  72         /* GPP_B14 : [GPP_B14_STRAP] ==> Component NC */
  73         PAD_NC(GPP_B14, NONE),
  74         /* GPP_B15 : [] ==> USB_A_OC_ODL */
  75         PAD_CFG_NF_LOCK(GPP_B15, NONE, NF1, LOCK_CONFIG),
  76         /* GPP_B16 : net NC is not present in the given design */
  77         PAD_NC(GPP_B16, NONE),
  78         /* GPP_B17 : net NC is not present in the given design */
  79         PAD_NC(GPP_B17, NONE),
  80         /* GPP_B18 : [] ==> SOC_I2C_TPM_SDA */
  81         PAD_CFG_NF_LOCK(GPP_B18, NONE, NF2, LOCK_CONFIG),
  82         /* GPP_B19 : [] ==> SOC_I2C_TPM_SCL */
  83         PAD_CFG_NF_LOCK(GPP_B19, NONE, NF2, LOCK_CONFIG),
  84         /* GPP_B20 : net NC is not present in the given design */
  85         PAD_NC(GPP_B20, NONE),
  86         /* GPP_B21 : net NC is not present in the given design */
  87         PAD_NC(GPP_B21, NONE),
  88         /* GPP_B22 : [] ==> USB_C_FORCE_PWR */
  89         PAD_CFG_GPO(GPP_B22, 0, DEEP),
  90         /* GPP_B23 : net NC is not present in the given design */
  91         PAD_NC(GPP_B23, NONE),
  92
  93         /* GPP_C00 : net NC is not present in the given design */
  94         PAD_NC(GPP_C00, NONE),
  95         /* GPP_C01 : net NC is not present in the given design */
  96         PAD_NC(GPP_C01, NONE),
  97         /* GPP_C02 : [GPP_C02_STRAP] ==> Component NC */
  98         PAD_NC(GPP_C02, NONE),
  99         /* GPP_C03 : net NC is not present in the given design */
 100         PAD_NC(GPP_C03, NONE),
 101         /* GPP_C04 : net NC is not present in the given design */
 102         PAD_NC(GPP_C04, NONE),
 103         /* GPP_C05 : [GPP_C05_STRAP] ==> Component NC */
 104         PAD_NC(GPP_C05, NONE),
 105         /* GPP_C06 : net NC is not present in the given design */
 106         PAD_NC(GPP_C06, NONE),
 107         /* GPP_C07 : net NC is not present in the given design */
 108         PAD_NC(GPP_C07, NONE),
 109         /* GPP_C08 : [] ==> SOCHOT_ODL */
 110         PAD_CFG_NF(GPP_C08, NONE, DEEP, NF2),
 111         /* GPP_C09 : [] ==> MISC_SYNC_OD */
 112         PAD_CFG_GPI(GPP_C09, NONE, DEEP),
 113         /* GPP_C10 : net NC is not present in the given design*/
 114         PAD_NC(GPP_C10, NONE),
 115         /* GPP_C11 : [] ==> LAN1_PCIE_CLKREQ_ODL */
 116         PAD_CFG_NF(GPP_C11, NONE, DEEP, NF1),
 117         /* GPP_C12 : net NC is not present in the given design */
 118         PAD_NC(GPP_C12, NONE),
 119         /* GPP_C13 : [] ==> LAN0_PERST_L */
 120         PAD_CFG_GPO_LOCK(GPP_C13, 1, LOCK_CONFIG),
 121         /* GPP_C15 : [GPP_C15_STRAP] ==> Component NC */
 122         PAD_NC(GPP_C15, NONE),
 123         /* GPP_C16 : [] ==> USB_C0_LSX_TX */
 124         PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
 125         /* GPP_C17 : [] ==> USB_C0_LSX_RX */
 126         PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
 127         /* GPP_C18 : [] ==> USB_C2_LSX_TX */
 128         PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
 129         /* GPP_C19 : [] ==> USB_C2_LSX_RX */
 130         PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
 131         /* GPP_C20 : [] ==> USB_C1_LSX_TX */
 132         PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
 133         /* GPP_C21 : [] ==> USB_C1_LSX_RX */
 134         PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
 135         /* GPP_C22 : [] ==> USB_C3_LSX_TX */
 136         PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
 137         /* GPP_C23 : [] ==> USB_C3_LSX_RX */
 138         PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
 139
 140         /* GPP_D00 : net NC is not present in the given design */
 141         PAD_NC(GPP_D00, NONE),
 142         /* GPP_D01 : [] ==> LAN1_PCIE_WAKE_ODL */
 143         PAD_CFG_GPI_SCI_LOW(GPP_D01, NONE, DEEP, EDGE_SINGLE),
 144         /* GPP_D02 : [] ==> LAN1_PERST_L */
 145         PAD_CFG_GPO_LOCK(GPP_D02, 1, LOCK_CONFIG),
 146         /* GPP_D03 : net NC is not present in the given design */
 147         PAD_NC(GPP_D03, NONE),
 148         /* GPP_D04 : net NC is not present in the given design */
 149         PAD_NC(GPP_D04, NONE),
 150         /* GPP_D05 : [] ==> UART_DBG_TX_ISH_RX */
 151         PAD_NC(GPP_D05, NONE),
 152         /* GPP_D06 : [] ==> UART_ISH_TX_DBG_RX */
 153         PAD_NC(GPP_D06, NONE),
 154         /* GPP_D07 : [] ==> SOC_GPP_D07 */
 155         PAD_NC(GPP_D07, NONE),
 156         /* GPP_D08 : net NC is not present in the given design */
 157         PAD_NC(GPP_D08, NONE),
 158         /* GPP_D09 : net NC is not present in the given design */
 159         PAD_NC(GPP_D09, NONE),
 160         /* GPP_D10 : net NC is not present in the given design */
 161         PAD_NC(GPP_D10, NONE),
 162         /* GPP_D11 : net NC is not present in the given design */
 163         PAD_NC(GPP_D11, NONE),
 164         /* GPP_D12 : [GPP_D12_STRAP] ==> Component NC */
 165         PAD_NC(GPP_D12, NONE),
 166         /* GPP_D13 : net NC is not present in the given design */
 167         PAD_NC(GPP_D13, NONE),
 168         /* GPP_D14 : net NC is not present in the given design */
 169         PAD_NC(GPP_D14, NONE),
 170         /* GPP_D15 : net NC is not present in the given design */
 171         PAD_NC(GPP_D15, NONE),
 172         /* GPP_D16 : net NC is not present in the given design */
 173         PAD_NC(GPP_D16, NONE),
 174         /* GPP_D17 : net NC is not present in the given design */
 175         PAD_NC(GPP_D17, NONE),
 176         /* GPP_D18 : net NC is not present in the given design */
 177         PAD_NC(GPP_D18, NONE),
 178         /* GPP_D19 : [] ==> SSD_PCIE_CLKREQ_ODL */
 179          PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
 180         /* GPP_D20 : [] ==> LAN0_PCIE_CLKREQ_ODL */
 181         PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
 182         /* GPP_D21 : [] ==> WLAN_PCIE_CLKREQ_ODL */
 183         PAD_CFG_NF(GPP_D21, NONE, DEEP, NF2),
 184         /* GPP_D22 : [] ==> SOC_DBG_BPKI3C_SDA */
 185         PAD_NC(GPP_D22, NONE),
 186         /* GPP_D23 : [] ==> SOC_DBG_BPKI3C_SCL */
 187         PAD_NC(GPP_D23, NONE),
 188
 189         /* GPP_E00 : net NC is not present in the given design */
 190         PAD_NC(GPP_E00, NONE),
 191         /* GPP_E01 : [] ==> MEM_STRAP_2 */
 192         PAD_CFG_GPI_LOCK(GPP_E01, NONE, LOCK_CONFIG),
 193         /* GPP_E02 : [] ==> MEM_STRAP_1 */
 194         PAD_CFG_GPI_LOCK(GPP_E02, NONE, LOCK_CONFIG),
 195         /* GPP_E03 : [] ==> GSC_SOC_INT_ODL */
 196         PAD_CFG_GPI_APIC_LOCK(GPP_E03, NONE, LEVEL, INVERT, LOCK_CONFIG),
 197         /* GPP_E04 : [] ==> LAN0_PCIE_WAKE_ODL */
 198         PAD_CFG_GPI_SCI_LOW(GPP_E04, NONE, DEEP, EDGE_SINGLE),
 199         /* GPP_E05 : [] ==> WLAN_PCIE_WAKE_ODL */
 200         PAD_CFG_GPI_IRQ_WAKE(GPP_E05, NONE, PLTRST, LEVEL, INVERT),
 201         /* GPP_E06 : GPP_E06_STRAP ==> Component NC */
 202         PAD_NC(GPP_E06, NONE),
 203         /* GPP_E07 : net NC is not present in the given design */
 204         PAD_NC(GPP_E07, NONE),
 205         /* GPP_E08 : [] ==> USB_C0_AUX_DC_N */
 206         PAD_CFG_NF(GPP_E08, NONE, DEEP, NF6),
 207         /* GPP_E09 : [] ==> USB_C_OC_ODL */
 208         PAD_CFG_NF_LOCK(GPP_E09, NONE, NF1, LOCK_CONFIG),
 209         /* GPP_E10 : net NC is not present in the given design */
 210         PAD_NC(GPP_E10, NONE),
 211         /* GPP_E11 : [] ==> MEM_STRAP_0 */
 212         PAD_CFG_GPI_LOCK(GPP_E11, NONE, LOCK_CONFIG),
 213         /* GPP_E12 : [] ==> MEM_STRAP_3 */
 214         PAD_CFG_GPI_LOCK(GPP_E12, NONE, LOCK_CONFIG),
 215         /* GPP_E13 : [] ==> MEM_CH_SEL */
 216         PAD_CFG_GPI_LOCK(GPP_E13, NONE, LOCK_CONFIG),
 217         /* GPP_E14 : net NC is not present in the given design */
 218         PAD_NC(GPP_E14, NONE),
 219         /* GPP_E15 : [] ==> SOC_GPP_E15 */
 220         PAD_NC(GPP_E15, NONE),
 221         /* GPP_E16 : [] ==> GPP_E16_ISH_GP10 */
 222         PAD_NC(GPP_E16, NONE),
 223         /* GPP_E17 : net NC is not present in the given design */
 224         PAD_NC(GPP_E17, NONE),
 225         /* GPP_E22 : [] ==> USB_C0_AUX_DC_P */
 226         PAD_CFG_NF(GPP_E22, NONE, DEEP, NF6),
 227
 228         /* GPP_F00 : [] ==> CNV_BRI_DT_R */
 229         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F00, NONE, DEEP, NF1),
 230         /* GPP_F01 : [] ==> WLAN_CNVI_BRI_RSP */
 231         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F01, UP_20K, DEEP, NF1),
 232         /* GPP_F02 : [] ==> CNV_RGI_DT_R */
 233         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F02, NONE, DEEP, NF1),
 234         /* GPP_F03 : [] ==> WLAN_CNVI_RGI_RSP */
 235         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F03, UP_20K, DEEP, NF1),
 236         /* GPP_F04 : [] ==> WLAN_CNVI_RF_RST_L */
 237         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F04, NONE, DEEP, NF1),
 238         /* GPP_F05 : [] ==> WLAN_CNVI_CLKREQ0 */
 239         PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F05, NONE, DEEP, NF3),
 240         /* GPP_F06 : [] ==> WLAN_COEX3 */
 241         PAD_CFG_NF(GPP_F06, NONE, DEEP, NF1),
 242         /* GPP_F07 : net NC is not present in the given design */
 243         PAD_NC(GPP_F07, NONE),
 244         /* GPP_F08 : [] ==> WLAN_PERST_L */
 245         PAD_CFG_GPO(GPP_F08, 1, DEEP),
 246         /* GPP_F09 : net NC is not present in the given design */
 247         PAD_NC(GPP_F09, NONE),
 248         /* GPP_F10 : net NC is not present in the given design */
 249         PAD_NC(GPP_F10, NONE),
 250         /* GPP_F11 : [] ==> AV_GPIO_P0 */
 251         PAD_CFG_GPO(GPP_F11, 0, DEEP),
 252         /* GPP_F12 : [] ==> AV_GPIO_P1 */
 253         PAD_CFG_GPO(GPP_F12, 0, DEEP),
 254         /* GPP_F13 : [] ==> AV_GPIO_P2 */
 255         PAD_CFG_GPO(GPP_F13, 0, DEEP),
 256         /* GPP_F14 : [] ==> AV_GPIO_P3 */
 257         PAD_CFG_GPO(GPP_F14, 0, DEEP),
 258         /* GPP_F15 : [] ==> AV_GPIO_P4 */
 259         PAD_CFG_GPO(GPP_F15, 0, DEEP),
 260         /* GPP_F16 : [] ==> AV_GPIO_P5 */
 261         PAD_CFG_GPO(GPP_F16, 0, DEEP),
 262         /* GPP_F17 : [] ==> AV_GPIO_P6 */
 263         PAD_CFG_GPO(GPP_F17, 0, DEEP),
 264         /* GPP_F18 : [] ==> AV_GPIO_P7 */
 265         PAD_CFG_GPO(GPP_F18, 0, DEEP),
 266         /* GPP_F19 : [GPP_F19_STRAP] ==> Component NC */
 267         PAD_NC(GPP_F19, NONE),
 268         /* GPP_F20 : [GPP_F20_STRAP] ==> Component NC */
 269         PAD_NC(GPP_F20, NONE),
 270         /* GPP_F21 : [GPP_F21_STRAP] ==> Component NC */
 271         PAD_NC(GPP_F21, NONE),
 272         /* GPP_F22 : [] ==> GPP_F22_ISH_GP8A */
 273         PAD_NC(GPP_F22, NONE),
 274         /* GPP_F23 : [] ==> GPP_F23_ISH_GP9A */
 275         PAD_NC(GPP_F23, NONE),
 276
 277         /* GPP_H00 : GPP_H00_STRAP ==> Component NC */
 278         PAD_NC(GPP_H00, NONE),
 279         /* GPP_H01 : GPP_H01_STRAP ==> Component NC */
 280         PAD_NC(GPP_H01, NONE),
 281         /* GPP_H02 : GPP_H02_STRAP ==> Component NC */
 282         PAD_NC(GPP_H02, NONE),
 283         /* GPP_H04 : [] ==> WLAN_COEX1 */
 284         PAD_CFG_NF(GPP_H04, NONE, DEEP, NF2),
 285         /* GPP_H05 : [] ==> WLAN_COEX2 */
 286         PAD_CFG_NF(GPP_H05, NONE, DEEP, NF2),
 287         /* GPP_H06 : net NC is not present in the given design */
 288         PAD_NC(GPP_H06, NONE),
 289         /* GPP_H07 : net NC is not present in the given design */
 290         PAD_NC(GPP_H07, NONE),
 291         /* GPP_H08 : [] ==> UART_DBG_TX_SOC_RX_R */
 292         PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
 293         /* GPP_H09 : [] ==> UART_SOC_TX_DBG_RX_R */
 294         PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1),
 295         /* GPP_H10 : [] ==> SOC_WP_OD */
 296         PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG),
 297         /* GPP_H11 : net NC is not present in the given design */
 298         PAD_NC(GPP_H11, NONE),
 299         /* GPP_H13 : [] ==> CPU_C10_GATE_L */
 300         PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
 301         /* GPP_H14 : [] ==> SLP_S0_GATE_R */
 302         PAD_CFG_GPO(GPP_H14, 1, PLTRST),
 303         /* GPP_H15 : net NC is not present in the given design */
 304         PAD_NC(GPP_H15, NONE),
 305         /* GPP_H16 : net NC is not present in the given design */
 306         PAD_NC(GPP_H16, NONE),
 307         /* GPP_H17 : net NC is not present in the given design */
 308         PAD_NC(GPP_H17, NONE),
 309         /* GPP_H19 : net NC is not present in the given design */
 310         PAD_NC(GPP_H19, NONE),
 311         /* GPP_H20 : net NC is not present in the given design */
 312         PAD_NC(GPP_H20, NONE),
 313         /* GPP_H21 : net NC is not present in the given design */
 314         PAD_NC(GPP_H21, NONE),
 315         /* GPP_H22 : net NC is not present in the given design */
 316         PAD_NC(GPP_H22, NONE),
 317
 318         /* GPP_S00 : net NC is not present in the given design */
 319         PAD_NC(GPP_S00, NONE),
 320         /* GPP_S01 : net NC is not present in the given design */
 321         PAD_NC(GPP_S01, NONE),
 322         /* GPP_S02 : net NC is not present in the given design */
 323         PAD_NC(GPP_S02, NONE),
 324         /* GPP_S03 : net NC is not present in the given design */
 325         PAD_NC(GPP_S03, NONE),
 326         /* GPP_S04 : net NC is not present in the given design */
 327         PAD_NC(GPP_S04, NONE),
 328         /* GPP_S05 : net NC is not present in the given design */
 329         PAD_NC(GPP_S05, NONE),
 330         /* GPP_S06 : net NC is not present in the given design */
 331         PAD_NC(GPP_S06, NONE),
 332         /* GPP_S07 : net NC is not present in the given design */
 333         PAD_NC(GPP_S07, NONE),
 334
 335         /* GPP_V00 : [] ==> BATLOW_L */
 336         PAD_CFG_NF(GPP_V00, NONE, DEEP, NF1),
 337         /* GPP_V01 : [] ==> ACPRESENT */
 338         PAD_CFG_NF(GPP_V01, NONE, DEEP, NF1),
 339         /* GPP_V02 : [] ==> EC_SOC_WAKE_ODL */
 340         PAD_CFG_NF(GPP_V02, NONE, DEEP, NF1),
 341         /* GPP_V03 : [] ==> EC_SOC_PWR_BTN_ODL */
 342         PAD_CFG_NF(GPP_V03, NONE, DEEP, NF1),
 343         /* GPP_V04 : [] ==> SLP_S3_L */
 344         PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1),
 345         /* GPP_V05 : [] ==> SLP_S4_L */
 346         PAD_CFG_NF(GPP_V05, NONE, DEEP, NF1),
 347         /* GPP_V06 : [] ==> SLP_A_L */
 348         PAD_CFG_NF(GPP_V06, NONE, DEEP, NF1),
 349         /* GPP_V08 : [] ==> SOC_SUSCLK */
 350         PAD_CFG_NF(GPP_V08, NONE, DEEP, NF1),
 351         /* GPP_V09 : [] ==> SLP_WLAN_L */
 352         PAD_CFG_NF(GPP_V09, NONE, DEEP, NF1),
 353         /* GPP_V10 : [] ==> SLP_S5_L */
 354         PAD_CFG_NF(GPP_V10, NONE, DEEP, NF1),
 355         /* GPP_V11 : [] ==> EC_SOC_REC_SWITCH_ODL */
 356         PAD_CFG_GPI_LOCK(GPP_V11, NONE, LOCK_CONFIG),
 357         /* GPP_V12 : [] ==> SLP_LAN_L */
 358         PAD_CFG_NF(GPP_V12, NONE, DEEP, NF1),
 359         /* GPP_V14 : [] ==> SOC_WAKE_L */
 360         PAD_CFG_NF(GPP_V14, NONE, DEEP, NF1),
 361         /* GPP_V22 : net NC is not present in the given design */
 362         PAD_NC(GPP_V22, NONE),
 363         /* GPP_V23 : net NC is not present in the given design */
 364         PAD_NC(GPP_V23, NONE),
 365 };
 366
 367 /* Early pad configuration in bootblock */
 368 static const struct pad_config early_gpio_table[] = {
 369         /* GPP_A20 : [] ==> SSD_PERST_L */
 370         PAD_CFG_GPO(GPP_A20, 0, DEEP),
 371
 372         /* GPP_B18 : [] ==> SOC_I2C_TPM_SDA */
 373         PAD_CFG_NF(GPP_B18, NONE, DEEP, NF2),
 374         /* GPP_B19 : [] ==> SOC_I2C_TPM_SCL */
 375         PAD_CFG_NF(GPP_B19, NONE, DEEP, NF2),
 376
 377         /* GPP_C13 : [] ==> LAN0_PERST_L */
 378         PAD_CFG_GPO(GPP_C13, 0, DEEP),
 379
 380         /* GPP_D02 : [] ==> LAN1_PERST_L */
 381         PAD_CFG_GPO(GPP_D02, 0, DEEP),
 382
 383         /* GPP_E03 : [] ==> GSC_SOC_INT_ODL */
 384         PAD_CFG_GPI_APIC(GPP_E03, NONE, PLTRST, LEVEL, INVERT),
 385         /* GPP_E13 :  [] ==> MEM_CH_SEL */
 386         PAD_CFG_GPI(GPP_E13, NONE, DEEP),
 387
 388         /* GPP_H08 : [] ==> UART_DBG_TX_SOC_RX_R */
 389         PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
 390         /* GPP_H09 : [] ==> UART_SOC_TX_DBG_RX_R */
 391         PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1),
 392         /* GPP_H10 : [] ==> SOC_WP_OD */
 393         PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG),
 394
 395         /* GPP_A19 : [] ==> EN_PP3300_SSD */
 396         PAD_CFG_GPO(GPP_A19, 1, DEEP),
 397 };
 398
 399 static const struct pad_config romstage_gpio_table[] = {
 400         /* GPP_C13 : [] ==> LAN0_PERST_L */
 401         PAD_CFG_GPO(GPP_C13, 0, DEEP),
 402
 403         /* GPP_D02 : [] ==> LAN1_PERST_L */
 404         PAD_CFG_GPO(GPP_D02, 0, DEEP),
 405
 406         /* GPP_A20 : [] ==> SSD_PERST_L */
 407         PAD_CFG_GPO(GPP_A20, 1, DEEP),
 408 };
 409
 410 const struct pad_config *variant_gpio_table(size_t *num)
 411 {
 412         *num = ARRAY_SIZE(gpio_table);
 413         return gpio_table;
 414 }
 415
 416 const struct pad_config *variant_early_gpio_table(size_t *num)
 417 {
 418         *num = ARRAY_SIZE(early_gpio_table);
 419         return early_gpio_table;
 420 }
 421
 422 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 423 {
 424         *num = ARRAY_SIZE(romstage_gpio_table);
 425         return romstage_gpio_table;
 426 }
 427
 428 static const struct cros_gpio cros_gpios[] = {
 429         CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
 430         CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
 431 };
 432
 433 DECLARE_CROS_GPIOS(cros_gpios);