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mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / google / rex / variants / karis / overridetree.cb
blob01447cf4a4f6eacecf1c205dd0cbc6c12eb014d5
1 fw_config
2 field DB_USB 0 1
3 option DB_USB_UNKNOWN 0
4 option DB_USB4_ANX7452 1
5 end
6 field STYLUS 2
7 option STYLUS_ABSENT 0
8 option STYLUS_PRESENT 1
9 end
10 field AUDIO 3 5
11 option ALC5650_NO_AMP_I2S 0
12 end
13 field FAN 6 7
14 option ABSENT 0
15 option PRESENT 1
16 end
17 field MIPI_CAM 8 9
18 option UF_CAM_HI556 0
19 end
20 field FP_MCU 10 11
21 option FP_ABSENT 0
22 option FP_MCU_NUVOTON 1
23 option FP_MCU_ELAN 2
24 end
25 field KB_TYPE 12
26 option KB_TYPE_DEFAULT 0
27 option KB_TYPE_CA 1
28 end
29 field WIFI_TYPE 13
30 option WIFI_CNVI 0
31 option WIFI_PCIE 1
32 end
33 field PANEL_PWRSEQ_EC_CONTROL 14
34 option DISABLE 0
35 option ENABLE 1
36 end
37 end
38
39 chip soc/intel/meteorlake
40
41 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
42 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
43 register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0
44 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
45
46 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0
47
48 register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C0
49 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C1
50
51 # Enable eDP in Port A
52 register "ddi_port_A_config" = "1"
53 # Enable HDMI in Port B
54 register "ddi_port_B_config" = "0"
55
56 # Enable Display Port Configuration
57 register "ddi_ports_config" = "{
58 [DDI_PORT_A] = DDI_ENABLE_HPD,
59 [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
60 [DDI_PORT_1] = DDI_ENABLE_HPD,
61 [DDI_PORT_2] = DDI_ENABLE_HPD,
62 [DDI_PORT_3] = DDI_ENABLE_HPD,
63 [DDI_PORT_4] = DDI_ENABLE_HPD,
64 }"
65
66 register "serial_io_gspi_mode" = "{
67 [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
68 [PchSerialIoIndexGSPI1] = PchSerialIoPci,
69 [PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
70 }"
71
72 register "serial_io_i2c_mode" = "{
73 [PchSerialIoIndexI2C0] = PchSerialIoPci,
74 [PchSerialIoIndexI2C1] = PchSerialIoPci,
75 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
76 [PchSerialIoIndexI2C3] = PchSerialIoPci,
77 [PchSerialIoIndexI2C4] = PchSerialIoPci,
78 [PchSerialIoIndexI2C5] = PchSerialIoPci,
79 }"
80
81 # Intel Common SoC Config
82 #+-------------------+---------------------------+
83 #| Field | Value |
84 #+-------------------+---------------------------+
85 #| I2C0 | Audio and WFC |
86 #| I2C1 | Touchscreen |
87 #| I2C3 | Touchpad |
88 #| I2C4 | cr50 TPM. Early init is |
89 #| | required to set up a BAR |
90 #| | for TPM communication |
91 #| I2C5 | UFC, SAR1, SAR2, HPS |
92 #+-------------------+---------------------------+
93 register "common_soc_config" = "{
94 .i2c[0] = {
95 .speed = I2C_SPEED_FAST,
96 .rise_time_ns = 400,
97 .fall_time_ns = 350,
98 .data_hold_time_ns = 50,
99 },
100 .i2c[1] = {
101 .speed = I2C_SPEED_FAST,
102 .rise_time_ns = 600,
103 .fall_time_ns = 400,
104 .data_hold_time_ns = 50,
105 },
106 .i2c[3] = {
107 .speed = I2C_SPEED_FAST,
108 .rise_time_ns = 600,
109 .fall_time_ns = 400,
110 .data_hold_time_ns = 50,
111 },
112 .i2c[4] = {
113 .early_init = 1,
114 .speed = I2C_SPEED_FAST,
115 .rise_time_ns = 550,
116 .fall_time_ns = 400,
117 .data_hold_time_ns = 50,
118 },
119 .i2c[5] = {
120 .speed = I2C_SPEED_FAST,
121 .rise_time_ns = 900,
122 .fall_time_ns = 400,
123 .data_hold_time_ns = 50,
124 },
125 }"
126
127 device domain 0 on
128 device ref igpu on
129 chip drivers/gfx/generic
130 register "device_count" = "6"
131 # DDIA for eDP
132 register "device[0].name" = ""LCD0""
133 register "device[0].type" = "panel"
134 # DDIB for HDMI
135 register "device[1].name" = ""DD01""
136 # TCP0 (DP-1) for port C0
137 register "device[2].name" = ""DD02""
138 register "device[2].use_pld" = "true"
139 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
140 # TCP1 (DP-2) unused
141 register "device[3].name" = ""DD03""
142 # TCP2 (DP-3) for port C1
143 register "device[4].name" = ""DD04""
144 register "device[4].use_pld" = "true"
145 register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
146 # TCP3 (DP-4) unused
147 register "device[5].name" = ""DD05""
148 device generic 0 on end
149 end
150 end # Integrated Graphics Device
151 device ref dtt on
152 chip drivers/intel/dptf
153 ## sensor information
154 register "options.tsr[0].desc" = ""DDR_SOC""
155 register "options.tsr[1].desc" = ""Ambient""
156 register "options.tsr[2].desc" = ""Charger""
157
158 ## Active Policy
159 # FIXME: below values are initial reference values only
160 register "policies.active" = "{
161 [0] = {
162 .target = DPTF_TEMP_SENSOR_0,
163 .thresholds = {
164 TEMP_PCT(75, 90),
165 TEMP_PCT(70, 80),
166 TEMP_PCT(65, 70),
167 TEMP_PCT(60, 60),
168 TEMP_PCT(55, 50),
169 TEMP_PCT(50, 40),
170 TEMP_PCT(45, 30),
171 }
172 },
173 [1] = {
174 .target = DPTF_TEMP_SENSOR_1,
175 .thresholds = {
176 TEMP_PCT(75, 90),
177 TEMP_PCT(70, 80),
178 TEMP_PCT(65, 70),
179 TEMP_PCT(60, 60),
180 TEMP_PCT(55, 50),
181 TEMP_PCT(50, 40),
182 TEMP_PCT(45, 30),
183 }
184 },
185 [2] = {
186 .target = DPTF_TEMP_SENSOR_2,
187 .thresholds = {
188 TEMP_PCT(75, 90),
189 TEMP_PCT(70, 80),
190 TEMP_PCT(65, 70),
191 TEMP_PCT(60, 50),
192 }
193 }
194 }"
195
196 ## Passive Policy
197 # TODO: below values are initial reference values only
198 register "policies.passive" = "{
199 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
200 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
201 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
202 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
203 }"
204
205 ## Critical Policy
206 # TODO: below values are initial reference values only
207 register "policies.critical" = "{
208 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
209 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
210 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
211 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
212 }"
213
214 ## Power Limits Control
215 register "controls.power_limits" = "{
216 .pl1 = {
217 .min_power = 15000,
218 .max_power = 15000,
219 .time_window_min = 28 * MSECS_PER_SEC,
220 .time_window_max = 32 * MSECS_PER_SEC,
221 .granularity = 200,
222 },
223 .pl2 = {
224 .min_power = 57000,
225 .max_power = 57000,
226 .time_window_min = 28 * MSECS_PER_SEC,
227 .time_window_max = 32 * MSECS_PER_SEC,
228 .granularity = 1000,
229 }
230 }"
231
232 ## Charger Performance Control (Control, mA)
233 register "controls.charger_perf" = "{
234 [0] = { 255, 3000 },
235 [1] = { 24, 1500 },
236 [2] = { 16, 1000 },
237 [3] = { 8, 500 }
238 }"
239
240 ## Fan Performance Control (Percent, Speed, Noise, Power)
241 register "controls.fan_perf" = "{
242 [0] = { 90, 6700, 220, 2200, },
243 [1] = { 80, 5800, 180, 1800, },
244 [2] = { 70, 5000, 145, 1450, },
245 [3] = { 60, 4900, 115, 1150, },
246 [4] = { 50, 3838, 90, 900, },
247 [5] = { 40, 2904, 55, 550, },
248 [6] = { 30, 2337, 30, 300, },
249 [7] = { 20, 1608, 15, 150, },
250 [8] = { 10, 800, 10, 100, },
251 [9] = { 0, 0, 0, 50, }
252 }"
253
254 ## Fan options
255 register "options.fan.fine_grained_control" = "1"
256 register "options.fan.step_size" = "2"
257
258 device generic 0 alias dptf_policy on end
259 end
260 end
261 device ref pcie_rp10 on
262 # Enable SSD Card PCIE 10 using clk 8
263 register "pcie_rp[PCIE_RP(10)]" = "{
264 .clk_src = 8,
265 .clk_req = 8,
266 .flags = PCIE_RP_LTR | PCIE_RP_AER,
267 }"
268 chip soc/intel/common/block/pcie/rtd3
269 register "is_storage" = "true"
270 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A19)"
271 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A20)"
272 register "srcclk_pin" = "8"
273 device generic 0 on end
274 end
275 end # PCIE10 SSD card
276 device ref tbt_pcie_rp0 on end
277 device ref tbt_pcie_rp2 on end
278 device ref tcss_xhci on
279 chip drivers/usb/acpi
280 device ref tcss_root_hub on
281 chip drivers/usb/acpi
282 register "desc" = ""USB3 Type-C Port C0 (MLB)""
283 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
284 register "use_custom_pld" = "true"
285 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
286 device ref tcss_usb3_port0 on end
287 end
288 chip drivers/usb/acpi
289 register "desc" = ""USB3 Type-C Port C1 (MLB)""
290 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
291 register "use_custom_pld" = "true"
292 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
293 device ref tcss_usb3_port2 on end
294 end
295 end
296 end
297 end
298 device ref tcss_dma0 on
299 chip drivers/intel/usb4/retimer
300 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
301 use tcss_usb3_port0 as dfp[0].typec_port
302 device generic 0 on end
303 end
304 end
305 device ref tcss_dma1 on
306 chip drivers/intel/usb4/retimer
307 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
308 use tcss_usb3_port2 as dfp[0].typec_port
309 device generic 0 on end
310 end
311 end
312 device ref xhci on
313 chip drivers/usb/acpi
314 device ref xhci_root_hub on
315 chip drivers/usb/acpi
316 register "desc" = ""USB2 Type-C Port C1 (MLB)""
317 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
318 register "use_custom_pld" = "true"
319 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
320 device ref usb2_port1 on end
321 end
322 chip drivers/usb/acpi
323 register "desc" = ""USB2 Type-C Port C0 (MLB)""
324 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
325 register "use_custom_pld" = "true"
326 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
327 device ref usb2_port2 on end
328 end
329 chip drivers/usb/acpi
330 register "desc" = ""USB2 Type-A Port A0 (DB)""
331 register "type" = "UPC_TYPE_A"
332 register "use_custom_pld" = "true"
333 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
334 device ref usb2_port9 on end
335 end
336 chip drivers/usb/acpi
337 register "desc" = ""USB2 Bluetooth""
338 register "type" = "UPC_TYPE_INTERNAL"
339 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B01)"
340 device ref usb2_port10 on end
341 end
342 chip drivers/usb/acpi
343 register "desc" = ""USB3 Type-A Port A0 (DB)""
344 register "type" = "UPC_TYPE_USB3_A"
345 register "use_custom_pld" = "true"
346 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
347 device ref usb3_port1 on end
348 end
349 end
350 end
351 end
352 device ref cnvi_wifi on
353 chip drivers/wifi/generic
354 register "wake" = "GPE0_PME_B0"
355 register "add_acpi_dma_property" = "true"
356 register "enable_cnvi_ddr_rfim" = "true"
357 device generic 0 on
358 probe WIFI_TYPE WIFI_CNVI
359 end
360 end
361 end
362 device ref ipu on
363 chip drivers/intel/mipi_camera
364 register "acpi_uid" = "0x50000"
365 register "acpi_name" = ""IPU0""
366 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
367
368 register "cio2_num_ports" = "1"
369 register "cio2_lanes_used" = "{2}" # 2 CSI Camera lanes are used
370 register "cio2_lane_endpoint[0]" = ""^I2C5.CAM0""
371 register "cio2_prt[0]" = "4"
372 device generic 0 on
373 probe MIPI_CAM UF_CAM_HI556
374 end
375 end
376 end
377 device ref i2c0 on
378 chip drivers/i2c/generic
379 register "hid" = ""10EC5650""
380 register "name" = ""RT58""
381 register "desc" = ""Realtek RT5650""
382 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_B06)"
383 register "property_count" = "1"
384 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
385 register "property_list[0].name" = ""realtek,jd-mode""
386 register "property_list[0].integer" = "2"
387 device i2c 1a on
388 probe AUDIO ALC5650_NO_AMP_I2S
389 end
390 end
391 end #I2C0
392 device ref i2c1 on
393 chip drivers/i2c/hid
394 register "generic.hid" = ""ELAN9004""
395 register "generic.desc" = ""ELAN Touchscreen""
396 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C07_IRQ)"
397 register "generic.detect" = "1"
398 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C01)"
399 register "generic.reset_delay_ms" = "150"
400 register "generic.reset_off_delay_ms" = "1"
401 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C00)"
402 register "generic.enable_delay_ms" = "6"
403 register "generic.enable_off_delay_ms" = "30"
404 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
405 register "generic.stop_off_delay_ms" = "1"
406 register "generic.has_power_resource" = "1"
407 register "hid_desc_reg_offset" = "0x01"
408 device i2c 0x10 on end
409 end
410 chip drivers/generic/gpio_keys
411 register "name" = ""PENH""
412 # GPP_E04 is the IRQ source, and GPP_E09 is the wake source
413 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_E04)"
414 register "key.wake_gpe" = "GPE0_DW1_09"
415 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
416 register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
417 register "key.dev_name" = ""EJCT""
418 register "key.linux_code" = "SW_PEN_INSERTED"
419 register "key.linux_input_type" = "EV_SW"
420 register "key.label" = ""pen_eject""
421 device generic 0 on
422 probe STYLUS STYLUS_PRESENT
423 end
424 end
425 end
426 device ref i2c3 on
427 chip drivers/i2c/generic
428 register "hid" = ""ELAN0000""
429 register "desc" = ""ELAN Touchpad""
430 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B00_IRQ)"
431 register "wake" = "GPE0_DW0_00"
432 register "detect" = "1"
433 device i2c 15 on end
434 end
435 chip drivers/i2c/hid
436 register "generic.hid" = ""PIXA2305""
437 register "generic.desc" = ""PIXA Touchpad""
438 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B00_IRQ)"
439 register "generic.wake" = "GPE0_DW0_00"
440 register "generic.detect" = "1"
441 register "hid_desc_reg_offset" = "0x20"
442 device i2c 68 on end
443 end
444 end
445 device ref i2c4 on
446 chip drivers/i2c/tpm
447 register "hid" = ""GOOG0005""
448 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E03_IRQ)"
449 device i2c 50 on end
450 end
451 end
452 device ref i2c5 on
453 chip drivers/intel/mipi_camera
454 register "acpi_hid" = ""INT3537""
455 register "acpi_uid" = "0"
456 register "acpi_name" = ""CAM0""
457 register "chip_name" = ""Hi-556 Camera""
458 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
459 register "has_power_resource" = "1"
460
461 register "ssdb.lanes_used" = "2"
462 register "ssdb.link_used" = "1"
463 register "num_freq_entries" = "1"
464 register "link_freq[0]" = "437 * MHz"
465 register "remote_name" = ""IPU0""
466 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
467
468 #Controls
469 register "gpio_panel.gpio[0].gpio_num" = "GPP_A11" #EN_UCAM_SENR_PWR
470 register "gpio_panel.gpio[1].gpio_num" = "GPP_B09" #EN_FCAM_PWR
471 register "gpio_panel.gpio[2].gpio_num" = "GPP_V23" #UCAM_RST_L
472 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
473 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
474
475 #_ON
476 register "on_seq.ops_cnt" = "5"
477 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
478 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
479 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
480 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
481 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
482
483 #_OFF
484 register "off_seq.ops_cnt" = "4"
485 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
486 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
487 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
488 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
489 device i2c 20 on
490 probe MIPI_CAM UF_CAM_HI556
491 end
492 end
493 chip drivers/intel/mipi_camera
494 register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
495 register "acpi_uid" = "1"
496 register "acpi_name" = ""NVM0""
497 register "chip_name" = ""ST M24C64X""
498 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
499
500 register "nvm_size" = "0x2000"
501 register "nvm_pagesize" = "1"
502 register "nvm_readonly" = "1"
503 register "nvm_width" = "0x10"
504 register "nvm_compat" = ""atmel,24c64""
505
506 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"
507
508 register "has_power_resource" = "1"
509
510 #Controls
511 register "gpio_panel.gpio[0].gpio_num" = "GPP_B09" #EN_FCAM_PWR
512
513 #_ON
514 register "on_seq.ops_cnt" = "1"
515 register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
516
517 #_OFF
518 register "off_seq.ops_cnt" = "1"
519 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
520
521 device i2c 50 on
522 probe MIPI_CAM UF_CAM_HI556
523 end
524 end
525 end #I2C5
526 device ref pcie_rp5 on
527 probe WIFI_TYPE WIFI_PCIE
528 # Enable WLAN Card PCIE 5 using clk 5
529 register "pcie_rp[PCH_RP(5)]" = "{
530 .clk_src = 5,
531 .clk_req = 5,
532 .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
533 }"
534 chip drivers/wifi/generic
535 register "wake" = "GPE0_DW2_09"
536 register "add_acpi_dma_property" = "true"
537 use usb2_port10 as bluetooth_companion
538 device pci 00.0 on
539 probe WIFI_TYPE WIFI_PCIE
540 end
541 end
542 chip soc/intel/common/block/pcie/rtd3
543 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E22)"
544 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F08)"
545 register "srcclk_pin" = "5"
546 device generic 0 on
547 probe WIFI_TYPE WIFI_PCIE
548 end
549 end
550 end #PCIE5 WLAN card
551 device ref gspi1 on
552 chip drivers/spi/acpi
553 register "name" = ""CRFP""
554 register "hid" = "ACPI_DT_NAMESPACE_HID"
555 register "uid" = "1"
556 register "compat_string" = ""google,cros-ec-spi""
557 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E10_IRQ)"
558 register "wake" = "GPE0_DW1_10"
559 register "has_power_resource" = "1"
560 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C23)"
561 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
562 register "enable_delay_ms" = "3"
563 device spi 0 on
564 probe FP_MCU FP_MCU_NUVOTON
565 end
566 end # FPMCU
567 end
568 device ref soc_espi on
569 chip ec/google/chromeec
570 use conn0 as mux_conn[0]
571 use conn1 as mux_conn[1]
572 device pnp 0c09.0 on end
573 end
574 end
575 device ref pmc hidden
576 chip drivers/intel/pmc_mux
577 device generic 0 on
578 chip drivers/intel/pmc_mux/conn
579 use usb2_port2 as usb2_port
580 use tcss_usb3_port0 as usb3_port
581 device generic 0 alias conn0 on end
582 end
583 chip drivers/intel/pmc_mux/conn
584 use usb2_port1 as usb2_port
585 use tcss_usb3_port2 as usb3_port
586 device generic 1 alias conn1 on end
587 end
588 end
589 end
590 end
591 device ref hda on end
592 end
593 end
coreboot repo mirror