src/mainboard/google/storm/mmu.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <arch/cache.h>
   4 #include <soc/soc_services.h>
   5 #include <symbols.h>
   6 #include "mmu.h"
   7
   8 /* convenient shorthand (in MB) */
   9 #define RPM_START           ((uintptr_t)_rpm / KiB)
  10 #define RPM_END             ((uintptr_t)_erpm / KiB)
  11 #define RPM_SIZE            (RPM_END - RPM_START)
  12 #define SRAM_START          ((uintptr_t)_sram / KiB)
  13 #define SRAM_END            ((uintptr_t)_esram / KiB)
  14 #define DRAM_START          ((uintptr_t)_dram / MiB)
  15 #define DRAM_SIZE           (CONFIG_DRAM_SIZE_MB)
  16 #define DRAM_END            (DRAM_START + DRAM_SIZE)
  17
  18 /* DMA memory for drivers */
  19 #define DMA_START            ((uintptr_t)_dma_coherent / MiB)
  20 #define DMA_SIZE             (REGION_SIZE(dma_coherent) / MiB)
  21
  22 void setup_dram_mappings(enum dram_state dram)
  23 {
  24         if (dram == DRAM_INITIALIZED) {
  25                 mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
  26                 /* Map DMA memory */
  27                 mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
  28                 if (ENV_CREATES_CBMEM)
  29                         /* Mark cbmem backing store as ready. */
  30                         ipq_cbmem_backing_store_ready();
  31         } else {
  32                 mmu_disable_range(DRAM_START, DRAM_SIZE);
  33                 /* Map DMA memory */
  34                 mmu_disable_range(DMA_START, DMA_SIZE);
  35         }
  36 }
  37
  38 void setup_mmu(enum dram_state dram)
  39 {
  40         dcache_mmu_disable();
  41
  42         /* start with mapping everything as strongly ordered. */
  43         mmu_config_range(0, 4096, DCACHE_OFF);
  44
  45         /* Map Device memory. */
  46         mmu_config_range_kb(RPM_START, RPM_SIZE, DCACHE_OFF);
  47
  48         mmu_config_range_kb(SRAM_START, SRAM_END - SRAM_START,
  49                 DCACHE_WRITEBACK);
  50
  51         /* Map DRAM memory */
  52         setup_dram_mappings(dram);
  53
  54         mmu_disable_range(DRAM_END, 4096 - DRAM_END);
  55
  56         /* disable Page 0 for trapping NULL pointer references. */
  57         mmu_disable_range_kb(0, 1);
  58
  59         mmu_init();
  60
  61         dcache_mmu_enable();
  62 }