src/mainboard/lenovo/l520/devicetree.cb

   1 chip northbridge/intel/sandybridge
   2         register "gfx" = "GMA_STATIC_DISPLAYS(0)"
   3         register "gpu_cpu_backlight" = "0x00000000"
   4         register "gpu_dp_b_hotplug" = "0"
   5         register "gpu_dp_c_hotplug" = "0"
   6         register "gpu_dp_d_hotplug" = "0"
   7         register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
   8         register "gpu_panel_power_backlight_off_delay" = "0"
   9         register "gpu_panel_power_backlight_on_delay" = "0"
  10         register "gpu_panel_power_cycle_delay" = "0"
  11         register "gpu_panel_power_down_delay" = "0"
  12         register "gpu_panel_power_up_delay" = "0"
  13         register "gpu_pch_backlight" = "0x00000000"
  14         register "spd_addresses" = "{0x50, 0, 0x52, 0}"
  15         chip cpu/intel/model_206ax
  16                 # Values obtained from vendor BIOS
  17                 register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
  18                 register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
  19                 register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
  20                 register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
  21                 device cpu_cluster 0 on end
  22         end
  23         device domain 0 on
  24                 subsystemid 0x17aa 0x21dd inherit
  25
  26                 device ref host_bridge on end # Host bridge
  27                 device ref peg10 on end # PCIe Bridge for discrete graphics
  28                 device ref igd on end # Internal graphics VGA controller
  29
  30                 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
  31                         register "docking_supported" = "1"
  32                         register "gen1_dec" = "0x007c1611"
  33                         register "gen2_dec" = "0x00040069"
  34                         register "gen3_dec" = "0x000c0701"
  35                         register "gen4_dec" = "0x00000000"
  36                         register "gpi13_routing" = "2"
  37                         register "gpi6_routing" = "2"
  38                         register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 1, 0, 0, 0 }"
  39                         register "pcie_port_coalesce" = "true"
  40                         register "sata_interface_speed_support" = "0x3"
  41                         register "sata_port_map" = "0x3b"
  42
  43                         register "spi_uvscc" = "0"
  44                         register "spi_lvscc" = "0x2005"
  45
  46                         register "usb_port_config" = "{
  47                                 { 1, 0, -1 },
  48                                 { 1, 0, -1 },
  49                                 { 1, 0, -1 },
  50                                 { 1, 0, -1 },
  51                                 { 1, 0, -1 },
  52                                 { 1, 0, -1 },
  53                                 { 1, 0, -1 },
  54                                 { 1, 0, -1 },
  55                                 { 1, 0, -1 },
  56                                 { 1, 0, -1 },
  57                                 { 1, 0, -1 },
  58                                 { 1, 0, -1 },
  59                                 { 1, 0, -1 },
  60                                 { 1, 0, -1 }
  61                         }"
  62
  63                         device ref mei1 on end # Management Engine Interface 1
  64                         device ref mei2 off end # Management Engine Interface 2
  65                         device ref me_ide_r off end # Management Engine IDE-R
  66                         device ref me_kt off end # Management Engine KT
  67                         device ref gbe off end # Intel Gigabit Ethernet
  68                         device ref ehci2 on end # USB2 EHCI #2
  69                         device ref hda on end # High Definition Audio controller
  70                         device ref pcie_rp1 on end # PCIe Port #1
  71                         device ref pcie_rp2 on end # PCIe Port #2
  72                         device ref pcie_rp3 on end # PCIe Port #3
  73                         device ref pcie_rp4 on end # PCIe Port #4
  74                         device ref pcie_rp5 on end # PCIe Port #5
  75                         device ref pcie_rp6 on end # PCIe Port #6
  76                         device ref pcie_rp7 off end # PCIe Port #7
  77                         device ref pcie_rp8 off end # PCIe Port #8
  78                         device ref ehci1 on end # USB2 EHCI #1
  79                         device ref pci_bridge off end # PCI bridge
  80                         device ref lpc on # LPC bridge PCI-LPC bridge
  81                                 chip ec/lenovo/pmh7
  82                                         register "backlight_enable" = "true"
  83                                         register "dock_event_enable" = "true"
  84                                         device pnp ff.1 on end # dummy
  85                                 end
  86                                 chip ec/lenovo/h8
  87                                         register "config0" = "0xa7"
  88                                         register "config1" = "0x09"
  89                                         register "config2" = "0xa0"
  90                                         register "config3" = "0xc2"
  91
  92                                         register "beepmask0" = "0x00"
  93                                         register "beepmask1" = "0x86"
  94                                         register "has_power_management_beeps" = "0"
  95                                         register "event2_enable" = "0xff"
  96                                         register "event3_enable" = "0xff"
  97                                         register "event4_enable" = "0xff"
  98                                         register "event5_enable" = "0xff"
  99                                         register "event6_enable" = "0xff"
 100                                         register "event7_enable" = "0xff"
 101                                         register "event8_enable" = "0xff"
 102                                         register "event9_enable" = "0xff"
 103                                         register "eventa_enable" = "0xff"
 104                                         register "eventb_enable" = "0xff"
 105                                         register "eventc_enable" = "0xff"
 106                                         register "eventd_enable" = "0xff"
 107                                         register "evente_enable" = "0xff"
 108
 109                                         device pnp ff.2 on # dummy
 110                                                 io 0x60 = 0x62
 111                                                 io 0x62 = 0x66
 112                                                 io 0x64 = 0x1600
 113                                                 io 0x66 = 0x1604
 114                                         end
 115                                 end
 116                         end # LPC bridge
 117                         device ref sata1 on end # SATA Controller 1
 118                         device ref smbus on # SMBus
 119                                 chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
 120                                         device i2c 54 on end
 121                                         device i2c 55 on end
 122                                         device i2c 56 on end
 123                                         device i2c 57 on end
 124                                         device i2c 5c on end
 125                                         device i2c 5d on end
 126                                         device i2c 5e on end
 127                                         device i2c 5f on end
 128                                 end
 129                         end # SMBus
 130                         device ref sata2 off end # SATA Controller 2
 131                         device ref thermal off end # Thermal
 132                 end
 133         end
 134 end