mb/google/brya: Create rull variant
[coreboot2.git] / src / mainboard / lenovo / x220 / devicetree.cb
blobaaeecc824653cccfc66c773c6a353beecfcf2a22
1 chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
8 # Enable Panel as LVDS and configure power delays
9 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
10 register "gpu_panel_power_cycle_delay" = "5"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
15 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
18 register "spd_addresses" = "{0x50, 0, 0x51, 0}"
19 register "ec_present" = "1" # I have an embedded controller
20 register "max_mem_clock_mhz" = "666" # So DDR3 freq = 1333
22 chip cpu/intel/model_206ax
23 # Values obtained from vendor BIOS v1.46
24 # schematics say 33Amps for 17W TDP, 53Amps for 35W TDP
25 register "pp0_current_limit" = "98"
26 # schematics say 33Amps for GFX
27 register "pp1_current_limit" = "33"
28 register "pp0_psi[VR12_PSI1]" = "{VR12_2_PHASES, 20}"
29 register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
30 register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
31 register "pp1_psi[VR12_PSI1]" = "{VR12_2_PHASES, 20}"
32 register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
33 register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
34 device cpu_cluster 0 on end
35 end
36 device domain 0 on
37 subsystemid 0x17aa 0x21db inherit
39 device ref host_bridge on end
40 device ref peg10 off end
41 device ref igd on end
43 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
44 # GPI routing
45 # 0 No effect (default)
46 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
47 # 2 SCI (if corresponding GPIO_EN bit is also set)
48 register "alt_gp_smi_en" = "0x0000"
49 register "gpi1_routing" = "2"
50 register "gpi13_routing" = "2"
52 # Enable SATA ports 0 (HDD bay) & 1 (dock) & 2 (msata)
53 register "sata_port_map" = "0x7"
54 # Set max SATA speed to 6.0 Gb/s
55 register "sata_interface_speed_support" = "0x3"
57 register "gen1_dec" = "0x7c1601"
58 register "gen2_dec" = "0x0c15e1"
59 register "gen4_dec" = "0x0c06a1"
61 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
63 # Enable zero-based linear PCIe root port functions
64 register "pcie_port_coalesce" = "true"
66 register "spi_uvscc" = "0x2005"
67 register "spi_lvscc" = "0x2005"
69 device ref mei1 on end
70 device ref mei2 off end
71 device ref me_ide_r off end
72 device ref me_kt off end
73 device ref gbe on
74 subsystemid 0x17aa 0x21ce
75 end
76 device ref ehci2 on end
77 device ref hda on end
78 device ref pcie_rp1 off end
79 device ref pcie_rp2 on
80 smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthShort"
81 "WIFI" "SlotDataBusWidth1X"
82 end
83 device ref pcie_rp3 off end
84 device ref pcie_rp4 on
85 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
86 end
87 device ref pcie_rp5 on
88 chip drivers/ricoh/rce822
89 register "sdwppol" = "1"
90 register "disable_mask" = "0x87"
91 device pci 00.0 on end
92 end
93 end
94 device ref pcie_rp6 off end
95 device ref pcie_rp7 on end # Optional XHCI controller
96 device ref pcie_rp8 off end
97 device ref ehci1 on end
98 device ref pci_bridge off end
99 device ref lpc on
100 chip ec/lenovo/pmh7
101 device pnp ff.1 on end # dummy
102 register "backlight_enable" = "true"
103 register "dock_event_enable" = "true"
106 chip drivers/pc80/tpm
107 device pnp 0c31.0 on end
110 chip ec/lenovo/h8
111 device pnp ff.2 on # dummy
112 io 0x60 = 0x62
113 io 0x62 = 0x66
114 io 0x64 = 0x1600
115 io 0x66 = 0x1604
118 register "config0" = "0xa6"
119 register "config1" = "0x01"
120 register "config2" = "0xa0"
121 register "config3" = "0x60"
123 register "has_keyboard_backlight" = "0"
125 register "beepmask0" = "0x00"
126 register "beepmask1" = "0x86"
127 register "has_power_management_beeps" = "1"
128 register "event2_enable" = "0xff"
129 register "event3_enable" = "0xff"
130 register "event4_enable" = "0xd0"
131 register "event5_enable" = "0xfc"
132 register "event6_enable" = "0x00"
133 register "event7_enable" = "0x81"
134 register "event8_enable" = "0x7b"
135 register "event9_enable" = "0xff"
136 register "eventc_enable" = "0xff"
137 register "eventd_enable" = "0xff"
138 register "evente_enable" = "0x0d"
140 # BDC detection is broken on this board:
141 # BDC shorts pin14 and pin1
142 # BDC's connector pin14 is left floating
143 # BDC's connector pin1 is routed to SB GPIO 54
144 register "has_bdc_detection" = "0"
146 register "has_wwan_detection" = "1"
147 register "wwan_gpio_num" = "70"
148 register "wwan_gpio_lvl" = "0"
151 device ref sata1 on end
152 device ref smbus on
153 # eeprom, 8 virtual devices, same chip
154 chip drivers/i2c/at24rf08c
155 device i2c 54 on end
156 device i2c 55 on end
157 device i2c 56 on end
158 device i2c 57 on end
159 device i2c 5c on end
160 device i2c 5d on end
161 device i2c 5e on end
162 device i2c 5f on end
165 device ref sata2 off end
166 device ref thermal on end