1 /* SPDX-License-Identifier: GPL-2.0-only */
8 #ifndef PAD_CFG_GPIO_BIDIRECT
9 #define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
10 _PAD_CFG_STRUCT(pad, \
11 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
12 PAD_BUF(NO_DISABLE) | val, \
13 PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
16 /* PAD configuration was generated automatically using intelp2m utility */
17 static const struct pad_config gpio_table
[] = {
18 /* ------- GPIO Community 0 ------- */
20 /* ------- GPIO Group GPP_B ------- */
22 /* GPP_B0 - PMC_CORE_VID0 */
23 /* DW0: 0x44000700, DW1: 0x00000000 */
24 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
25 PAD_CFG_NF(GPP_B0
, NONE
, DEEP
, NF1
),
27 /* GPP_B1 - PMC_CORE_VID1 */
28 /* DW0: 0x44000700, DW1: 0x00000000 */
29 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
30 PAD_CFG_NF(GPP_B1
, NONE
, DEEP
, NF1
),
32 /* GPP_B2 - ESPI_ALERT2_N */
33 /* DW0: 0x44001302, DW1: 0x00003000 */
34 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
35 PAD_CFG_NF(GPP_B2
, UP_20K
, DEEP
, NF4
),
37 /* GPP_B3 - ESPI_ALERT0_N */
38 /* DW0: 0x44001302, DW1: 0x00003000 */
39 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
40 PAD_CFG_NF(GPP_B3
, UP_20K
, DEEP
, NF4
),
49 /* GPP_B10 - ESPI_ALERT3_N */
50 /* DW0: 0x44001302, DW1: 0x00003000 */
51 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
52 PAD_CFG_NF(GPP_B10
, UP_20K
, DEEP
, NF4
),
54 PAD_NC(GPP_B11
, NONE
),
56 /* GPP_B12 - PMC_SLP_S0_N */
57 /* DW0: 0x44000700, DW1: 0x00000000 */
58 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
59 PAD_CFG_NF(GPP_B12
, NONE
, DEEP
, NF1
),
61 /* GPP_B13 - PMC_PLTRST_N */
62 /* DW0: 0x44000700, DW1: 0x00000000 */
63 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
64 PAD_CFG_NF(GPP_B13
, NONE
, DEEP
, NF1
),
67 /* DW0: 0x84000700, DW1: 0x00000000 */
68 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
69 PAD_CFG_NF(GPP_B14
, NONE
, PLTRST
, NF1
),
71 PAD_NC(GPP_B15
, NONE
),
72 PAD_NC(GPP_B16
, NONE
),
73 PAD_NC(GPP_B17
, NONE
),
74 PAD_NC(GPP_B18
, NONE
),
75 PAD_NC(GPP_B19
, NONE
),
76 PAD_NC(GPP_B20
, NONE
),
77 PAD_NC(GPP_B21
, NONE
),
78 PAD_NC(GPP_B22
, NONE
),
79 PAD_NC(GPP_B23
, NONE
),
81 /* GPIO_RSVD_0 - n/a */
82 /* DW0: 0x40000700, DW1: 0x00000000 */
83 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
84 PAD_CFG_NF(GPIO_RSVD_0
, NONE
, DEEP
, NF1
),
86 /* GPIO_RSVD_1 - n/a */
87 /* DW0: 0x40000700, DW1: 0x00000000 */
88 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
89 PAD_CFG_NF(GPIO_RSVD_1
, NONE
, DEEP
, NF1
),
91 /* ------- GPIO Group GPP_T ------- */
94 /* DW0: 0x44000300, DW1: 0x00000000 */
95 /* DW0: PAD_TRIG(OFF) - IGNORED */
99 /* DW0: 0x44000300, DW1: 0x00000000 */
100 /* DW0: PAD_TRIG(OFF) - IGNORED */
101 PAD_NC(GPP_T1
, NONE
),
104 /* DW0: 0x44000300, DW1: 0x00000000 */
105 /* DW0: PAD_TRIG(OFF) - IGNORED */
106 PAD_NC(GPP_T2
, NONE
),
109 /* DW0: 0x44000300, DW1: 0x00000000 */
110 /* DW0: PAD_TRIG(OFF) - IGNORED */
111 PAD_NC(GPP_T3
, NONE
),
114 /* DW0: 0x44000300, DW1: 0x00000000 */
115 /* DW0: PAD_TRIG(OFF) - IGNORED */
116 PAD_NC(GPP_T4
, NONE
),
119 /* DW0: 0x44000300, DW1: 0x00000000 */
120 /* DW0: PAD_TRIG(OFF) - IGNORED */
121 PAD_NC(GPP_T5
, NONE
),
124 /* DW0: 0x44000300, DW1: 0x00000000 */
125 /* DW0: PAD_TRIG(OFF) - IGNORED */
126 PAD_NC(GPP_T6
, NONE
),
129 /* DW0: 0x44000300, DW1: 0x00000000 */
130 /* DW0: PAD_TRIG(OFF) - IGNORED */
131 PAD_NC(GPP_T7
, NONE
),
134 /* DW0: 0x44000300, DW1: 0x00000000 */
135 /* DW0: PAD_TRIG(OFF) - IGNORED */
136 PAD_NC(GPP_T8
, NONE
),
139 /* DW0: 0x44000300, DW1: 0x00000000 */
140 /* DW0: PAD_TRIG(OFF) - IGNORED */
141 PAD_NC(GPP_T9
, NONE
),
144 /* DW0: 0x44000300, DW1: 0x00000000 */
145 /* DW0: PAD_TRIG(OFF) - IGNORED */
146 PAD_NC(GPP_T10
, NONE
),
149 /* DW0: 0x44000300, DW1: 0x00000000 */
150 /* DW0: PAD_TRIG(OFF) - IGNORED */
151 PAD_NC(GPP_T11
, NONE
),
154 /* DW0: 0x44000300, DW1: 0x00000000 */
155 /* DW0: PAD_TRIG(OFF) - IGNORED */
156 PAD_NC(GPP_T12
, NONE
),
159 /* DW0: 0x44000300, DW1: 0x00000000 */
160 /* DW0: PAD_TRIG(OFF) - IGNORED */
161 PAD_NC(GPP_T13
, NONE
),
164 /* DW0: 0x44000300, DW1: 0x00000000 */
165 /* DW0: PAD_TRIG(OFF) - IGNORED */
166 PAD_NC(GPP_T14
, NONE
),
169 /* DW0: 0x44000300, DW1: 0x00000000 */
170 /* DW0: PAD_TRIG(OFF) - IGNORED */
171 PAD_NC(GPP_T15
, NONE
),
173 /* ------- GPIO Group GPP_G ------- */
176 /* DW0: 0x44000300, DW1: 0x00000000 */
177 /* DW0: PAD_TRIG(OFF) - IGNORED */
178 PAD_NC(GPP_G0
, NONE
),
181 /* DW0: 0x44000300, DW1: 0x00000000 */
182 /* DW0: PAD_TRIG(OFF) - IGNORED */
183 PAD_NC(GPP_G1
, NONE
),
186 /* DW0: 0x44000300, DW1: 0x00000000 */
187 /* DW0: PAD_TRIG(OFF) - IGNORED */
188 PAD_NC(GPP_G2
, NONE
),
191 /* DW0: 0x44000300, DW1: 0x00000000 */
192 /* DW0: PAD_TRIG(OFF) - IGNORED */
193 PAD_NC(GPP_G3
, NONE
),
196 /* DW0: 0x44000300, DW1: 0x00000000 */
197 /* DW0: PAD_TRIG(OFF) - IGNORED */
198 PAD_NC(GPP_G4
, NONE
),
201 /* DW0: 0x44000300, DW1: 0x00000000 */
202 /* DW0: PAD_TRIG(OFF) - IGNORED */
203 PAD_NC(GPP_G5
, NONE
),
206 /* DW0: 0x44000300, DW1: 0x00000000 */
207 /* DW0: PAD_TRIG(OFF) - IGNORED */
208 PAD_NC(GPP_G6
, NONE
),
211 /* DW0: 0x44000300, DW1: 0x00000000 */
212 /* DW0: PAD_TRIG(OFF) - IGNORED */
213 PAD_NC(GPP_G7
, NONE
),
216 /* DW0: 0x44000b00, DW1: 0x00000000 */
217 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
218 PAD_NC(GPP_G8
, NONE
),
221 /* DW0: 0x44000b00, DW1: 0x00000000 */
222 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
223 PAD_NC(GPP_G9
, NONE
),
226 /* DW0: 0x44000300, DW1: 0x00000000 */
227 /* DW0: PAD_TRIG(OFF) - IGNORED */
228 PAD_NC(GPP_G10
, NONE
),
231 /* DW0: 0x44000300, DW1: 0x00000000 */
232 /* DW0: PAD_TRIG(OFF) - IGNORED */
233 PAD_NC(GPP_G11
, NONE
),
236 /* DW0: 0x44000300, DW1: 0x00000000 */
237 /* DW0: PAD_TRIG(OFF) - IGNORED */
238 PAD_NC(GPP_G12
, NONE
),
241 /* DW0: 0x44000300, DW1: 0x00000000 */
242 /* DW0: PAD_TRIG(OFF) - IGNORED */
243 PAD_NC(GPP_G13
, NONE
),
246 /* DW0: 0x44000300, DW1: 0x00000000 */
247 /* DW0: PAD_TRIG(OFF) - IGNORED */
248 PAD_NC(GPP_G14
, NONE
),
250 /* GPP_G15 - ESPI_IO0 */
251 /* DW0: 0x44000700, DW1: 0x00003000 */
252 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
253 PAD_CFG_NF(GPP_G15
, UP_20K
, DEEP
, NF1
),
255 /* GPP_G16 - ESPI_IO1 */
256 /* DW0: 0x44000702, DW1: 0x00003000 */
257 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
258 PAD_CFG_NF(GPP_G16
, UP_20K
, DEEP
, NF1
),
260 /* GPP_G17 - ESPI_IO2 */
261 /* DW0: 0x44000700, DW1: 0x00003000 */
262 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
263 PAD_CFG_NF(GPP_G17
, UP_20K
, DEEP
, NF1
),
265 /* GPP_G18 - ESPI_IO3 */
266 /* DW0: 0x44000700, DW1: 0x00003000 */
267 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
268 PAD_CFG_NF(GPP_G18
, UP_20K
, DEEP
, NF1
),
271 /* DW0: 0x44000300, DW1: 0x00000000 */
272 /* DW0: PAD_TRIG(OFF) - IGNORED */
273 PAD_CFG_GPI_APIC_LOCK(GPP_G19
, NONE
, LEVEL
, INVERT
, LOCK_CONFIG
),
275 /* GPP_G20 - ESPI_CS0_N */
276 /* DW0: 0x44000700, DW1: 0x00003000 */
277 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
278 PAD_CFG_NF(GPP_G20
, UP_20K
, DEEP
, NF1
),
280 /* GPP_G21 - ESPI_CLK */
281 /* DW0: 0x44000700, DW1: 0x00001000 */
282 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
283 PAD_CFG_NF(GPP_G21
, DN_20K
, DEEP
, NF1
),
285 /* GPP_G22 - ESPI_RST0_N */
286 /* DW0: 0x44000700, DW1: 0x00000000 */
287 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
288 PAD_CFG_NF(GPP_G22
, NONE
, DEEP
, NF1
),
291 /* DW0: 0x44000300, DW1: 0x00000000 */
292 /* DW0: PAD_TRIG(OFF) - IGNORED */
293 PAD_NC(GPP_G23
, NONE
),
295 /* GPIO_RSVD_2 - n/a */
296 /* DW0: 0x40000700, DW1: 0x00000000 */
297 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
298 PAD_CFG_NF(GPIO_RSVD_2
, NONE
, DEEP
, NF1
),
300 /* ------- GPIO Community 1 ------- */
302 /* ------- GPIO Group GPP_V ------- */
304 /* GPP_V0 - EMMC_CMD */
305 /* DW0: 0x44000700, DW1: 0x00003000 */
306 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
307 PAD_CFG_NF(GPP_V0
, UP_20K
, DEEP
, NF1
),
309 /* GPP_V1 - EMMC_DATA0 */
310 /* DW0: 0x44000700, DW1: 0x00003000 */
311 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
312 PAD_CFG_NF(GPP_V1
, UP_20K
, DEEP
, NF1
),
314 /* GPP_V2 - EMMC_DATA1 */
315 /* DW0: 0x44000700, DW1: 0x00003000 */
316 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
317 PAD_CFG_NF(GPP_V2
, UP_20K
, DEEP
, NF1
),
319 /* GPP_V3 - EMMC_DATA2 */
320 /* DW0: 0x44000700, DW1: 0x00003000 */
321 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
322 PAD_CFG_NF(GPP_V3
, UP_20K
, DEEP
, NF1
),
324 /* GPP_V4 - EMMC_DATA3 */
325 /* DW0: 0x44000700, DW1: 0x00003000 */
326 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
327 PAD_CFG_NF(GPP_V4
, UP_20K
, DEEP
, NF1
),
329 /* GPP_V5 - EMMC_DATA4 */
330 /* DW0: 0x44000700, DW1: 0x00003000 */
331 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
332 PAD_CFG_NF(GPP_V5
, UP_20K
, DEEP
, NF1
),
334 /* GPP_V6 - EMMC_DATA5 */
335 /* DW0: 0x44000700, DW1: 0x00003000 */
336 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
337 PAD_CFG_NF(GPP_V6
, UP_20K
, DEEP
, NF1
),
339 /* GPP_V7 - EMMC_DATA6 */
340 /* DW0: 0x44000700, DW1: 0x00003000 */
341 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
342 PAD_CFG_NF(GPP_V7
, UP_20K
, DEEP
, NF1
),
344 /* GPP_V8 - EMMC_DATA7 */
345 /* DW0: 0x44000700, DW1: 0x00003000 */
346 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
347 PAD_CFG_NF(GPP_V8
, UP_20K
, DEEP
, NF1
),
349 /* GPP_V9 - EMMC_RCLK */
350 /* DW0: 0x44000700, DW1: 0x00001000 */
351 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
352 PAD_CFG_NF(GPP_V9
, DN_20K
, DEEP
, NF1
),
354 /* GPP_V10 - EMMC_CLK */
355 /* DW0: 0x44000700, DW1: 0x00001000 */
356 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
357 PAD_CFG_NF(GPP_V10
, DN_20K
, DEEP
, NF1
),
359 /* GPP_V11 - EMMC_RST_N */
360 /* DW0: 0x44000700, DW1: 0x00003000 */
361 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
362 PAD_CFG_NF(GPP_V11
, UP_20K
, DEEP
, NF1
),
365 /* DW0: 0x44000300, DW1: 0x00000000 */
366 /* DW0: PAD_TRIG(OFF) - IGNORED */
367 PAD_NC(GPP_V12
, NONE
),
370 /* DW0: 0x44000300, DW1: 0x00000000 */
371 /* DW0: PAD_TRIG(OFF) - IGNORED */
372 PAD_NC(GPP_V13
, NONE
),
375 /* DW0: 0x44000300, DW1: 0x00000000 */
376 /* DW0: PAD_TRIG(OFF) - IGNORED */
377 PAD_NC(GPP_V14
, NONE
),
380 /* DW0: 0x44000300, DW1: 0x00000000 */
381 /* DW0: PAD_TRIG(OFF) - IGNORED */
382 PAD_NC(GPP_V15
, NONE
),
384 /* ------- GPIO Group GPP_H ------- */
387 /* DW0: 0x44000200, DW1: 0x00000000 */
388 PAD_NC(GPP_H0
, NONE
),
391 /* DW0: 0x44000300, DW1: 0x00000000 */
392 /* DW0: PAD_TRIG(OFF) - IGNORED */
393 PAD_NC(GPP_H1
, NONE
),
396 /* DW0: 0x44000200, DW1: 0x00000000 */
397 PAD_NC(GPP_H2
, NONE
),
400 /* DW0: 0x44000300, DW1: 0x00000000 */
401 /* DW0: PAD_TRIG(OFF) - IGNORED */
402 PAD_NC(GPP_H3
, NONE
),
405 /* DW0: 0x44000300, DW1: 0x00000000 */
406 /* DW0: PAD_TRIG(OFF) - IGNORED */
407 PAD_NC(GPP_H4
, NONE
),
410 /* DW0: 0x44000300, DW1: 0x00000000 */
411 /* DW0: PAD_TRIG(OFF) - IGNORED */
412 PAD_NC(GPP_H5
, NONE
),
415 /* DW0: 0x44000300, DW1: 0x00000000 */
416 /* DW0: PAD_TRIG(OFF) - IGNORED */
417 PAD_NC(GPP_H6
, NONE
),
420 /* DW0: 0x44000300, DW1: 0x00000000 */
421 /* DW0: PAD_TRIG(OFF) - IGNORED */
422 PAD_NC(GPP_H7
, NONE
),
425 /* DW0: 0x44000300, DW1: 0x00000000 */
426 /* DW0: PAD_TRIG(OFF) - IGNORED */
427 PAD_NC(GPP_H8
, NONE
),
430 /* DW0: 0x44000300, DW1: 0x00000000 */
431 /* DW0: PAD_TRIG(OFF) - IGNORED */
432 PAD_NC(GPP_H9
, NONE
),
435 /* DW0: 0x44000300, DW1: 0x00000000 */
436 /* DW0: PAD_TRIG(OFF) - IGNORED */
437 PAD_CFG_GPIO_HI_Z(GPP_H10
, NONE
, DEEP
, TxLASTRxE
, SAME
),
440 /* DW0: 0x44000300, DW1: 0x00000000 */
441 /* DW0: PAD_TRIG(OFF) - IGNORED */
442 PAD_CFG_GPIO_HI_Z(GPP_H11
, NONE
, DEEP
, TxLASTRxE
, SAME
),
445 /* DW0: 0x44000300, DW1: 0x00000000 */
446 /* DW0: PAD_TRIG(OFF) - IGNORED */
447 PAD_NC(GPP_H12
, NONE
),
450 /* DW0: 0x44000300, DW1: 0x00000000 */
451 /* DW0: PAD_TRIG(OFF) - IGNORED */
452 PAD_NC(GPP_H13
, NONE
),
455 /* DW0: 0x44000300, DW1: 0x00000000 */
456 /* DW0: PAD_TRIG(OFF) - IGNORED */
457 PAD_NC(GPP_H14
, NONE
),
460 /* DW0: 0x44000300, DW1: 0x00000000 */
461 /* DW0: PAD_TRIG(OFF) - IGNORED */
462 PAD_NC(GPP_H15
, NONE
),
464 /* GPP_H16 - DDI2_DDC_SCL */
465 /* DW0: 0x44000b02, DW1: 0x00000000 */
466 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
467 PAD_CFG_NF(GPP_H16
, NONE
, DEEP
, NF2
),
470 /* DW0: 0x44000300, DW1: 0x00000000 */
471 /* DW0: PAD_TRIG(OFF) - IGNORED */
472 PAD_NC(GPP_H17
, NONE
),
474 /* GPP_H18 - PMC_CPU_C10_GATE_N */
475 /* DW0: 0x44000700, DW1: 0x00000000 */
476 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
477 PAD_NC(GPP_H18
, NONE
),
479 /* GPP_H19 - DDI2_DDC_SDA */
480 /* DW0: 0x44000b02, DW1: 0x00000000 */
481 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
482 PAD_CFG_NF(GPP_H19
, NONE
, DEEP
, NF2
),
484 /* GPP_H20 - DDI2_HPD */
485 /* DW0: 0x44000b02, DW1: 0x00000000 */
486 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
487 PAD_CFG_NF(GPP_H20
, NONE
, DEEP
, NF2
),
490 /* DW0: 0x44000300, DW1: 0x00000000 */
491 /* DW0: PAD_TRIG(OFF) - IGNORED */
492 PAD_NC(GPP_H21
, NONE
),
495 /* DW0: 0x44000300, DW1: 0x00000000 */
496 /* DW0: PAD_TRIG(OFF) - IGNORED */
497 PAD_NC(GPP_H22
, NONE
),
500 /* DW0: 0x44000300, DW1: 0x00000000 */
501 /* DW0: PAD_TRIG(OFF) - IGNORED */
502 PAD_NC(GPP_H23
, NONE
),
504 /* ------- GPIO Group GPP_D ------- */
507 /* DW0: 0x44000300, DW1: 0x00000000 */
508 /* DW0: PAD_TRIG(OFF) - IGNORED */
509 PAD_NC(GPP_D0
, NONE
),
512 /* DW0: 0x44000300, DW1: 0x00000000 */
513 /* DW0: PAD_TRIG(OFF) - IGNORED */
514 PAD_NC(GPP_D1
, NONE
),
517 /* DW0: 0x44000300, DW1: 0x00000000 */
518 /* DW0: PAD_TRIG(OFF) - IGNORED */
519 PAD_NC(GPP_D2
, NONE
),
522 /* DW0: 0x44000300, DW1: 0x00000000 */
523 /* DW0: PAD_TRIG(OFF) - IGNORED */
524 PAD_NC(GPP_D3
, NONE
),
527 /* DW0: 0x44000300, DW1: 0x00000000 */
528 /* DW0: PAD_TRIG(OFF) - IGNORED */
529 PAD_NC(GPP_D4
, NONE
),
532 /* DW0: 0x44000300, DW1: 0x00000000 */
533 /* DW0: PAD_TRIG(OFF) - IGNORED */
534 PAD_NC(GPP_D5
, NONE
),
537 /* DW0: 0x44000300, DW1: 0x00000000 */
538 /* DW0: PAD_TRIG(OFF) - IGNORED */
539 PAD_NC(GPP_D6
, NONE
),
542 /* DW0: 0x44000300, DW1: 0x00000000 */
543 /* DW0: PAD_TRIG(OFF) - IGNORED */
544 PAD_NC(GPP_D7
, NONE
),
547 /* DW0: 0x44000300, DW1: 0x00000000 */
548 /* DW0: PAD_TRIG(OFF) - IGNORED */
549 PAD_NC(GPP_D8
, NONE
),
552 /* DW0: 0x44000300, DW1: 0x00000000 */
553 /* DW0: PAD_TRIG(OFF) - IGNORED */
554 PAD_NC(GPP_D9
, NONE
),
557 /* DW0: 0x44000300, DW1: 0x00000000 */
558 /* DW0: PAD_TRIG(OFF) - IGNORED */
559 PAD_NC(GPP_D10
, NONE
),
562 /* DW0: 0x44000300, DW1: 0x00000000 */
563 /* DW0: PAD_TRIG(OFF) - IGNORED */
564 PAD_NC(GPP_D11
, NONE
),
567 /* DW0: 0x44000300, DW1: 0x00000000 */
568 /* DW0: PAD_TRIG(OFF) - IGNORED */
569 PAD_NC(GPP_D12
, NONE
),
572 /* DW0: 0x44000300, DW1: 0x00000000 */
573 /* DW0: PAD_TRIG(OFF) - IGNORED */
574 PAD_NC(GPP_D13
, NONE
),
577 /* DW0: 0x44000300, DW1: 0x00000000 */
578 /* DW0: PAD_TRIG(OFF) - IGNORED */
579 PAD_NC(GPP_D14
, NONE
),
582 /* DW0: 0x44000300, DW1: 0x00000000 */
583 /* DW0: PAD_TRIG(OFF) - IGNORED */
584 PAD_NC(GPP_D15
, NONE
),
587 /* DW0: 0x44000300, DW1: 0x00000000 */
588 /* DW0: PAD_TRIG(OFF) - IGNORED */
589 PAD_NC(GPP_D16
, NONE
),
592 /* DW0: 0x44000300, DW1: 0x00000000 */
593 /* DW0: PAD_TRIG(OFF) - IGNORED */
594 PAD_NC(GPP_D17
, NONE
),
597 /* DW0: 0x44000300, DW1: 0x00000000 */
598 /* DW0: PAD_TRIG(OFF) - IGNORED */
599 PAD_NC(GPP_D18
, NONE
),
602 /* DW0: 0x44000300, DW1: 0x00000000 */
603 /* DW0: PAD_TRIG(OFF) - IGNORED */
604 PAD_NC(GPP_D19
, NONE
),
606 /* GPIO_RSVD_3 - n/a */
607 /* DW0: 0x40000700, DW1: 0x00000000 */
608 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
609 PAD_CFG_NF(GPIO_RSVD_3
, NONE
, DEEP
, NF1
),
611 /* ------- GPIO Group GPP_U ------- */
614 /* DW0: 0x44000300, DW1: 0x00000000 */
615 /* DW0: PAD_TRIG(OFF) - IGNORED */
616 PAD_NC(GPP_U0
, NONE
),
619 /* DW0: 0x44000300, DW1: 0x00000000 */
620 /* DW0: PAD_TRIG(OFF) - IGNORED */
621 PAD_NC(GPP_U1
, NONE
),
624 /* DW0: 0x44000300, DW1: 0x00000000 */
625 /* DW0: PAD_TRIG(OFF) - IGNORED */
626 PAD_NC(GPP_U2
, NONE
),
629 /* DW0: 0x44000300, DW1: 0x00000000 */
630 /* DW0: PAD_TRIG(OFF) - IGNORED */
631 PAD_NC(GPP_U3
, NONE
),
634 /* DW0: 0x44000300, DW1: 0x00000000 */
635 /* DW0: PAD_TRIG(OFF) - IGNORED */
636 PAD_NC(GPP_U4
, NONE
),
639 /* DW0: 0x44000300, DW1: 0x00000000 */
640 /* DW0: PAD_TRIG(OFF) - IGNORED */
641 PAD_NC(GPP_U5
, NONE
),
644 /* DW0: 0x44000300, DW1: 0x00000000 */
645 /* DW0: PAD_TRIG(OFF) - IGNORED */
646 PAD_NC(GPP_U6
, NONE
),
649 /* DW0: 0x44000300, DW1: 0x00000000 */
650 /* DW0: PAD_TRIG(OFF) - IGNORED */
651 PAD_NC(GPP_U7
, NONE
),
654 /* DW0: 0x44000300, DW1: 0x00000000 */
655 /* DW0: PAD_TRIG(OFF) - IGNORED */
656 PAD_NC(GPP_U8
, NONE
),
659 /* DW0: 0x44000300, DW1: 0x00000000 */
660 /* DW0: PAD_TRIG(OFF) - IGNORED */
661 PAD_NC(GPP_U9
, NONE
),
664 /* DW0: 0x44000300, DW1: 0x00000000 */
665 /* DW0: PAD_TRIG(OFF) - IGNORED */
666 PAD_NC(GPP_U10
, NONE
),
669 /* DW0: 0x44000300, DW1: 0x00000000 */
670 /* DW0: PAD_TRIG(OFF) - IGNORED */
671 PAD_NC(GPP_U11
, NONE
),
673 /* GPP_U12 - ISI_CHX_OKNOK_0 */
674 /* DW0: 0x44000700, DW1: 0x00001000 */
675 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
676 PAD_NC(GPP_U12
, NONE
),
678 /* GPP_U13 - ISI_CHX_OKNOK_1 */
679 /* DW0: 0x44000700, DW1: 0x00001000 */
680 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
681 PAD_NC(GPP_U13
, NONE
),
684 /* DW0: 0x44000300, DW1: 0x00000000 */
685 /* DW0: PAD_TRIG(OFF) - IGNORED */
686 PAD_NC(GPP_U14
, NONE
),
689 /* DW0: 0x44000300, DW1: 0x00000000 */
690 /* DW0: PAD_TRIG(OFF) - IGNORED */
691 PAD_NC(GPP_U15
, NONE
),
693 /* GPP_U16 - ISI_OKNOK_0 */
694 /* DW0: 0x44600702, DW1: 0x00000000 */
695 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
696 PAD_NC(GPP_U16
, NONE
),
698 /* GPP_U17 - ISI_OKNOK_1 */
699 /* DW0: 0x44600702, DW1: 0x00000000 */
700 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
701 PAD_NC(GPP_U17
, NONE
),
703 /* GPP_U18 - ISI_ALERT_N */
704 /* DW0: 0x44600702, DW1: 0x00000000 */
705 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
706 PAD_NC(GPP_U18
, NONE
),
709 /* DW0: 0x44000300, DW1: 0x00000000 */
710 /* DW0: PAD_TRIG(OFF) - IGNORED */
711 PAD_NC(GPP_U19
, NONE
),
714 /* GPIO_RSVD_4 - n/a */
715 /* DW0: 0x40000700, DW1: 0x00000000 */
716 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
717 PAD_CFG_NF(GPIO_RSVD_4
, NONE
, DEEP
, NF1
),
719 /* GPIO_RSVD_5 - n/a */
720 /* DW0: 0x40000700, DW1: 0x00000000 */
721 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
722 PAD_CFG_NF(GPIO_RSVD_5
, NONE
, DEEP
, NF1
),
724 /* GPIO_RSVD_6 - n/a */
725 /* DW0: 0x40000700, DW1: 0x00000000 */
726 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
727 PAD_CFG_NF(GPIO_RSVD_6
, NONE
, DEEP
, NF1
),
729 /* GPIO_RSVD_7 - n/a */
730 /* DW0: 0x40000700, DW1: 0x00000000 */
731 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
732 PAD_CFG_NF(GPIO_RSVD_7
, NONE
, DEEP
, NF1
),
734 /* ------- GPIO Group GPP_VGPIO ------- */
737 /* DW0: 0x40000000, DW1: 0x00000000 */
738 PAD_CFG_GPIO_BIDIRECT(VGPIO_0
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
741 /* DW0: 0x44000100, DW1: 0x00000000 */
742 PAD_CFG_GPI_TRIG_OWN(VGPIO_4
, NONE
, DEEP
, OFF
, ACPI
),
745 /* DW0: 0x40000003, DW1: 0x00000000 */
746 /* DW0: (1 << 1) - IGNORED */
747 PAD_CFG_GPIO_BIDIRECT(VGPIO_5
, 1, NONE
, DEEP
, LEVEL
, ACPI
),
750 /* DW0: 0x40000000, DW1: 0x00000000 */
751 PAD_CFG_GPIO_BIDIRECT(VGPIO_6
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
754 /* DW0: 0x40000000, DW1: 0x00000000 */
755 PAD_CFG_GPIO_BIDIRECT(VGPIO_7
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
758 /* DW0: 0x40000000, DW1: 0x00000000 */
759 PAD_CFG_GPIO_BIDIRECT(VGPIO_8
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
762 /* DW0: 0x40000000, DW1: 0x00000000 */
763 PAD_CFG_GPIO_BIDIRECT(VGPIO_9
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
765 /* VGPIO_10 - GPIO */
766 /* DW0: 0x40000000, DW1: 0x00000000 */
767 PAD_CFG_GPIO_BIDIRECT(VGPIO_10
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
769 /* VGPIO_11 - GPIO */
770 /* DW0: 0x40000000, DW1: 0x00000000 */
771 PAD_CFG_GPIO_BIDIRECT(VGPIO_11
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
773 /* VGPIO_12 - GPIO */
774 /* DW0: 0x40000000, DW1: 0x00000000 */
775 PAD_CFG_GPIO_BIDIRECT(VGPIO_12
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
777 /* VGPIO_13 - GPIO */
778 /* DW0: 0x40000000, DW1: 0x00000000 */
779 PAD_CFG_GPIO_BIDIRECT(VGPIO_13
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
781 /* VGPIO_18 - GPIO */
782 /* DW0: 0x40000000, DW1: 0x00000000 */
783 PAD_CFG_GPIO_BIDIRECT(VGPIO_18
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
785 /* VGPIO_19 - GPIO */
786 /* DW0: 0x40000000, DW1: 0x00000000 */
787 PAD_CFG_GPIO_BIDIRECT(VGPIO_19
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
789 /* VGPIO_20 - GPIO */
790 /* DW0: 0x40000000, DW1: 0x00000000 */
791 PAD_CFG_GPIO_BIDIRECT(VGPIO_20
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
793 /* VGPIO_21 - GPIO */
794 /* DW0: 0x40000000, DW1: 0x00000000 */
795 PAD_CFG_GPIO_BIDIRECT(VGPIO_21
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
797 /* VGPIO_22 - GPIO */
798 /* DW0: 0x40000000, DW1: 0x00000000 */
799 PAD_CFG_GPIO_BIDIRECT(VGPIO_22
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
801 /* VGPIO_23 - GPIO */
802 /* DW0: 0x40000000, DW1: 0x00000000 */
803 PAD_CFG_GPIO_BIDIRECT(VGPIO_23
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
805 /* VGPIO_24 - GPIO */
806 /* DW0: 0x40000000, DW1: 0x00000000 */
807 PAD_CFG_GPIO_BIDIRECT(VGPIO_24
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
809 /* VGPIO_25 - GPIO */
810 /* DW0: 0x40000000, DW1: 0x00000000 */
811 PAD_CFG_GPIO_BIDIRECT(VGPIO_25
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
813 /* VGPIO_30 - GPIO */
814 /* DW0: 0x40000000, DW1: 0x00000000 */
815 PAD_CFG_GPIO_BIDIRECT(VGPIO_30
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
817 /* VGPIO_31 - GPIO */
818 /* DW0: 0x40000000, DW1: 0x00000000 */
819 PAD_CFG_GPIO_BIDIRECT(VGPIO_31
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
821 /* VGPIO_32 - GPIO */
822 /* DW0: 0x40000000, DW1: 0x00000000 */
823 PAD_CFG_GPIO_BIDIRECT(VGPIO_32
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
825 /* VGPIO_33 - GPIO */
826 /* DW0: 0x40000000, DW1: 0x00000000 */
827 PAD_CFG_GPIO_BIDIRECT(VGPIO_33
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
829 /* VGPIO_34 - GPIO */
830 /* DW0: 0x40000000, DW1: 0x00000000 */
831 PAD_CFG_GPIO_BIDIRECT(VGPIO_34
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
833 /* VGPIO_35 - GPIO */
834 /* DW0: 0x40000000, DW1: 0x00000000 */
835 PAD_CFG_GPIO_BIDIRECT(VGPIO_35
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
837 /* VGPIO_36 - GPIO */
838 /* DW0: 0x40000000, DW1: 0x00000000 */
839 PAD_CFG_GPIO_BIDIRECT(VGPIO_36
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
841 /* VGPIO_37 - GPIO */
842 /* DW0: 0x40000000, DW1: 0x00000000 */
843 PAD_CFG_GPIO_BIDIRECT(VGPIO_37
, 0, NONE
, DEEP
, LEVEL
, ACPI
),
845 /* VGPIO_39 - GPIO */
846 /* DW0: 0x44000000, DW1: 0x00000000 */
847 PAD_CFG_GPIO_BIDIRECT(VGPIO_39
, 0, NONE
, DEEP
, OFF
, ACPI
),
849 /* ------- GPIO Community 2 ------- */
851 /* ------- GPIO Group GPD ------- */
854 /* DW0: 0x04000300, DW1: 0x00000000 */
855 /* DW0: PAD_TRIG(OFF) - IGNORED */
856 PAD_CFG_GPIO_HI_Z(GPD0
, NONE
, PWROK
, TxLASTRxE
, SAME
),
858 /* GPD1 - PMC_ACPRESENT */
859 /* DW0: 0x04000702, DW1: 0x00003c00 */
860 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
861 PAD_CFG_NF(GPD1
, NATIVE
, PWROK
, NF1
),
864 /* DW0: 0x04000702, DW1: 0x00003c00 */
865 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
866 PAD_CFG_NF(GPD2
, NATIVE
, PWROK
, NF1
),
868 /* GPD3 - PMC_PWRBTN_N */
869 /* DW0: 0x04000702, DW1: 0x00003000 */
870 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
871 PAD_CFG_NF(GPD3
, UP_20K
, PWROK
, NF1
),
873 /* GPD4 - PMC_SLP_S3_N */
874 /* DW0: 0x04000600, DW1: 0x00000000 */
875 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
876 PAD_CFG_NF(GPD4
, NONE
, PWROK
, NF1
),
878 /* GPD5 - PMC_SLP_S4_N */
879 /* DW0: 0x04000600, DW1: 0x00000000 */
880 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
881 PAD_CFG_NF(GPD5
, NONE
, PWROK
, NF1
),
884 /* DW0: 0x04000600, DW1: 0x00000000 */
885 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
886 PAD_CFG_NF(GPD7
, NONE
, PWROK
, NF1
),
889 /* DW0: 0x04000200, DW1: 0x00000000 */
890 PAD_CFG_GPO(GPD8
, 0, PWROK
),
893 /* DW0: 0x04000700, DW1: 0x00000000 */
894 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
895 PAD_CFG_NF(GPD9
, NONE
, PWROK
, NF1
),
898 /* DW0: 0x04000200, DW1: 0x00000000 */
899 PAD_CFG_GPO(GPD10
, 0, PWROK
),
902 /* DW0: 0x04000600, DW1: 0x00000000 */
903 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
904 PAD_CFG_NF(GPD11
, NONE
, PWROK
, NF1
),
906 /* GPIO_RSVD_8 - GPIO */
907 /* DW0: 0x04000200, DW1: 0x00000000 */
908 PAD_CFG_GPO(GPIO_RSVD_8
, 0, PWROK
),
910 /* GPIO_RSVD_9 - n/a */
911 /* DW0: 0x00000700, DW1: 0x00000000 */
912 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
913 PAD_CFG_NF(GPIO_RSVD_9
, NONE
, PWROK
, NF1
),
915 /* GPIO_RSVD_10 - n/a */
916 /* DW0: 0x00000700, DW1: 0x00000000 */
917 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
918 PAD_CFG_NF(GPIO_RSVD_10
, NONE
, PWROK
, NF1
),
920 /* GPIO_RSVD_11 - n/a */
921 /* DW0: 0x00000700, DW1: 0x00000000 */
922 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
923 PAD_CFG_NF(GPIO_RSVD_11
, NONE
, PWROK
, NF1
),
925 /* GPIO_RSVD_12 - n/a */
926 /* DW0: 0x00000702, DW1: 0x00000000 */
927 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
928 PAD_CFG_NF(GPIO_RSVD_12
, NONE
, PWROK
, NF1
),
930 /* ------- GPIO Community 3 ------- */
932 /* ------- GPIO Group GPP_S ------- */
934 /* GPIO_RSVD_13 - n/a */
935 /* DW0: 0x40000700, DW1: 0x00003c00 */
936 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
937 PAD_CFG_NF(GPIO_RSVD_13
, NATIVE
, DEEP
, NF1
),
939 /* GPIO_RSVD_14 - n/a */
940 /* DW0: 0x40000700, DW1: 0x00003c00 */
941 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
942 PAD_CFG_NF(GPIO_RSVD_14
, NATIVE
, DEEP
, NF1
),
944 /* GPIO_RSVD_15 - n/a */
945 /* DW0: 0x40000700, DW1: 0x00000000 */
946 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
947 PAD_CFG_NF(GPIO_RSVD_15
, NONE
, DEEP
, NF1
),
949 /* GPIO_RSVD_16 - n/a */
950 /* DW0: 0x40000700, DW1: 0x00000000 */
951 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
952 PAD_CFG_NF(GPIO_RSVD_16
, NONE
, DEEP
, NF1
),
954 /* GPIO_RSVD_17 - GPIO */
955 /* DW0: 0x40000300, DW1: 0x00000000 */
956 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_17
, NONE
, DEEP
, TxLASTRxE
, SAME
),
958 /* GPIO_RSVD_18 - n/a */
959 /* DW0: 0x40000700, DW1: 0x00000000 */
960 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
961 PAD_CFG_NF(GPIO_RSVD_18
, NONE
, DEEP
, NF1
),
963 /* GPIO_RSVD_19 - n/a */
964 /* DW0: 0x40000702, DW1: 0x00000000 */
965 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
966 PAD_CFG_NF(GPIO_RSVD_19
, NONE
, DEEP
, NF1
),
968 /* GPIO_RSVD_20 - n/a */
969 /* DW0: 0x40000700, DW1: 0x00000000 */
970 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
971 PAD_CFG_NF(GPIO_RSVD_20
, NONE
, DEEP
, NF1
),
973 /* GPIO_RSVD_21 - n/a */
974 /* DW0: 0x40000700, DW1: 0x00000000 */
975 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
976 PAD_CFG_NF(GPIO_RSVD_21
, NONE
, DEEP
, NF1
),
978 /* GPIO_RSVD_22 - n/a */
979 /* DW0: 0x40000700, DW1: 0x0003d000 */
980 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
981 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_RSVD_22
, DN_20K
, DEEP
, NF1
),
983 /* GPIO_RSVD_23 - n/a */
984 /* DW0: 0x40000700, DW1: 0x0003d000 */
985 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
986 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_RSVD_23
, DN_20K
, DEEP
, NF1
),
988 /* GPIO_RSVD_24 - n/a */
989 /* DW0: 0x40000700, DW1: 0x00000000 */
990 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
991 PAD_CFG_NF(GPIO_RSVD_24
, NONE
, DEEP
, NF1
),
993 /* GPIO_RSVD_25 - n/a */
994 /* DW0: 0x40000700, DW1: 0x00000000 */
995 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
996 PAD_CFG_NF(GPIO_RSVD_25
, NONE
, DEEP
, NF1
),
998 /* GPIO_RSVD_26 - n/a */
999 /* DW0: 0x40000700, DW1: 0x00000000 */
1000 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1001 PAD_CFG_NF(GPIO_RSVD_26
, NONE
, DEEP
, NF1
),
1003 /* GPIO_RSVD_27 - GPIO */
1004 /* DW0: 0x40000300, DW1: 0x00000000 */
1005 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_27
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1007 /* GPIO_RSVD_28 - n/a */
1008 /* DW0: 0x40000702, DW1: 0x00000000 */
1009 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1010 PAD_CFG_NF(GPIO_RSVD_28
, NONE
, DEEP
, NF1
),
1012 /* GPIO_RSVD_29 - n/a */
1013 /* DW0: 0x40000702, DW1: 0x00000000 */
1014 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1015 PAD_CFG_NF(GPIO_RSVD_29
, NONE
, DEEP
, NF1
),
1018 /* DW0: 0x40000700, DW1: 0x00001000 */
1019 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1020 PAD_CFG_NF(GPP_S0
, DN_20K
, DEEP
, NF1
),
1023 /* DW0: 0x40000700, DW1: 0x00001000 */
1024 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1025 PAD_CFG_NF(GPP_S1
, DN_20K
, DEEP
, NF1
),
1027 /* ------- GPIO Group GPP_A ------- */
1030 /* DW0: 0x44000300, DW1: 0x00000000 */
1031 /* DW0: PAD_TRIG(OFF) - IGNORED */
1032 PAD_CFG_GPIO_HI_Z(GPP_A0
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1035 /* DW0: 0x44000300, DW1: 0x00000000 */
1036 /* DW0: PAD_TRIG(OFF) - IGNORED */
1037 PAD_CFG_GPIO_HI_Z(GPP_A1
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1040 /* DW0: 0x44000300, DW1: 0x00000000 */
1041 /* DW0: PAD_TRIG(OFF) - IGNORED */
1042 PAD_CFG_GPIO_HI_Z(GPP_A2
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1045 /* DW0: 0x44000300, DW1: 0x00000000 */
1046 /* DW0: PAD_TRIG(OFF) - IGNORED */
1047 PAD_CFG_GPIO_HI_Z(GPP_A3
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1050 /* DW0: 0x44000300, DW1: 0x00000000 */
1051 /* DW0: PAD_TRIG(OFF) - IGNORED */
1052 PAD_NC(GPP_A4
, NONE
),
1055 /* DW0: 0x44000300, DW1: 0x00000000 */
1056 /* DW0: PAD_TRIG(OFF) - IGNORED */
1057 PAD_NC(GPP_A5
, NONE
),
1060 /* DW0: 0x44000300, DW1: 0x00000000 */
1061 /* DW0: PAD_TRIG(OFF) - IGNORED */
1062 PAD_NC(GPP_A6
, NONE
),
1065 /* DW0: 0x44000300, DW1: 0x00000000 */
1066 /* DW0: PAD_TRIG(OFF) - IGNORED */
1067 PAD_NC(GPP_A7
, NONE
),
1070 /* DW0: 0x44000300, DW1: 0x00000000 */
1071 /* DW0: PAD_TRIG(OFF) - IGNORED */
1072 PAD_NC(GPP_A8
, NONE
),
1075 /* DW0: 0x44000300, DW1: 0x00000000 */
1076 /* DW0: PAD_TRIG(OFF) - IGNORED */
1077 PAD_NC(GPP_A9
, NONE
),
1079 /* GPP_A10 - GPIO */
1080 /* DW0: 0x44000300, DW1: 0x00000000 */
1081 /* DW0: PAD_TRIG(OFF) - IGNORED */
1082 PAD_NC(GPP_A10
, NONE
),
1084 /* GPP_A11 - GPIO */
1085 /* DW0: 0x44000300, DW1: 0x00000000 */
1086 /* DW0: PAD_TRIG(OFF) - IGNORED */
1087 PAD_NC(GPP_A11
, NONE
),
1089 /* GPP_A12 - GPIO */
1090 /* DW0: 0x44000300, DW1: 0x00000000 */
1091 /* DW0: PAD_TRIG(OFF) - IGNORED */
1092 PAD_NC(GPP_A12
, NONE
),
1094 /* GPP_A13 - GPIO */
1095 /* DW0: 0x44000300, DW1: 0x00000000 */
1096 /* DW0: PAD_TRIG(OFF) - IGNORED */
1097 PAD_NC(GPP_A13
, NONE
),
1099 /* GPP_A14 - GPIO */
1100 /* DW0: 0x44000300, DW1: 0x00000000 */
1101 /* DW0: PAD_TRIG(OFF) - IGNORED */
1102 PAD_NC(GPP_A14
, NONE
),
1104 /* GPP_A15 - GPIO */
1105 /* DW0: 0x44000300, DW1: 0x00000000 */
1106 /* DW0: PAD_TRIG(OFF) - IGNORED */
1107 PAD_NC(GPP_A15
, NONE
),
1109 /* GPP_A16 - GPIO */
1110 /* DW0: 0x44000300, DW1: 0x00000000 */
1111 /* DW0: PAD_TRIG(OFF) - IGNORED */
1112 PAD_NC(GPP_A16
, NONE
),
1114 /* GPP_A17 - GPIO */
1115 /* DW0: 0x44000300, DW1: 0x00000000 */
1116 /* DW0: PAD_TRIG(OFF) - IGNORED */
1117 PAD_NC(GPP_A17
, NONE
),
1119 /* GPP_A18 - GPIO */
1120 /* DW0: 0x44000300, DW1: 0x00000000 */
1121 /* DW0: PAD_TRIG(OFF) - IGNORED */
1122 PAD_NC(GPP_A18
, NONE
),
1124 /* GPP_A19 - GPIO */
1125 /* DW0: 0x44000300, DW1: 0x00000000 */
1126 /* DW0: PAD_TRIG(OFF) - IGNORED */
1127 PAD_NC(GPP_A19
, NONE
),
1129 /* GPP_A20 - GPIO */
1130 /* DW0: 0x44000300, DW1: 0x00000000 */
1131 /* DW0: PAD_TRIG(OFF) - IGNORED */
1132 PAD_NC(GPP_A20
, NONE
),
1134 /* GPP_A21 - GPIO */
1135 /* DW0: 0x44000300, DW1: 0x00000000 */
1136 /* DW0: PAD_TRIG(OFF) - IGNORED */
1137 PAD_NC(GPP_A21
, NONE
),
1139 /* GPP_A22 - GPIO */
1140 /* DW0: 0x44000300, DW1: 0x00000000 */
1141 /* DW0: PAD_TRIG(OFF) - IGNORED */
1142 PAD_NC(GPP_A22
, NONE
),
1144 /* GPP_A23 - GPIO */
1145 /* DW0: 0x44000300, DW1: 0x00000000 */
1146 /* DW0: PAD_TRIG(OFF) - IGNORED */
1147 PAD_NC(GPP_A23
, NONE
),
1149 /* ------- GPIO Group GPP_VGPIO_USB ------- */
1151 /* VGPIO_USB_0 - n/a */
1152 /* DW0: 0x40000400, DW1: 0x00000000 */
1153 PAD_CFG_NF(VGPIO_USB_0
, NONE
, DEEP
, NF1
),
1155 /* VGPIO_USB_1 - n/a */
1156 /* DW0: 0x40000400, DW1: 0x00000000 */
1157 PAD_CFG_NF(VGPIO_USB_1
, NONE
, DEEP
, NF1
),
1159 /* VGPIO_USB_2 - n/a */
1160 /* DW0: 0x40000400, DW1: 0x00000000 */
1161 PAD_CFG_NF(VGPIO_USB_2
, NONE
, DEEP
, NF1
),
1163 /* VGPIO_USB_3 - n/a */
1164 /* DW0: 0x40000400, DW1: 0x00000000 */
1165 PAD_CFG_NF(VGPIO_USB_3
, NONE
, DEEP
, NF1
),
1167 /* ------- GPIO Community 4 ------- */
1169 /* ------- GPIO Group GPP_C ------- */
1171 /* GPP_C0 - SMB_CLK */
1172 /* DW0: 0x44000702, DW1: 0x00000000 */
1173 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1174 PAD_CFG_NF(GPP_C0
, NONE
, DEEP
, NF1
),
1176 /* GPP_C1 - SMB_DATA */
1177 /* DW0: 0x44000702, DW1: 0x00000000 */
1178 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1179 PAD_CFG_NF(GPP_C1
, NONE
, DEEP
, NF1
),
1181 /* GPP_C2 - SMB_ALERT_N */
1182 /* DW0: 0x44000a02, DW1: 0x00000000 */
1183 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1) - IGNORED */
1184 PAD_CFG_NF(GPP_C2
, NONE
, DEEP
, NF2
),
1187 /* DW0: 0x44000300, DW1: 0x00000000 */
1188 /* DW0: PAD_TRIG(OFF) - IGNORED */
1189 PAD_NC(GPP_C3
, NONE
),
1192 /* DW0: 0x44000300, DW1: 0x00000000 */
1193 /* DW0: PAD_TRIG(OFF) - IGNORED */
1194 PAD_NC(GPP_C4
, NONE
),
1197 /* DW0: 0x44000200, DW1: 0x00000000 */
1198 PAD_NC(GPP_C5
, NONE
),
1201 /* DW0: 0x44000300, DW1: 0x00000000 */
1202 /* DW0: PAD_TRIG(OFF) - IGNORED */
1203 PAD_NC(GPP_C6
, NONE
),
1206 /* DW0: 0x44000300, DW1: 0x00000000 */
1207 /* DW0: PAD_TRIG(OFF) - IGNORED */
1208 PAD_NC(GPP_C7
, NONE
),
1210 /* GPP_C8 - DNX_FORCE_RELOAD */
1211 /* DW0: 0x44000b00, DW1: 0x00001000 */
1212 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1213 PAD_NC(GPP_C8
, NONE
),
1216 /* DW0: 0x44000300, DW1: 0x00000000 */
1217 /* DW0: PAD_TRIG(OFF) - IGNORED */
1218 PAD_NC(GPP_C9
, NONE
),
1220 /* GPP_C10 - GPIO */
1221 /* DW0: 0x44000300, DW1: 0x00000000 */
1222 /* DW0: PAD_TRIG(OFF) - IGNORED */
1223 PAD_NC(GPP_C10
, NONE
),
1225 /* GPP_C11 - GPIO */
1226 /* DW0: 0x44000300, DW1: 0x00000000 */
1227 /* DW0: PAD_TRIG(OFF) - IGNORED */
1228 PAD_NC(GPP_C11
, NONE
),
1230 /* GPP_C12 - GPIO */
1231 /* DW0: 0x44000300, DW1: 0x00000000 */
1232 /* DW0: PAD_TRIG(OFF) - IGNORED */
1233 PAD_NC(GPP_C12
, NONE
),
1235 /* GPP_C13 - GPIO */
1236 /* DW0: 0x44000300, DW1: 0x00000000 */
1237 /* DW0: PAD_TRIG(OFF) - IGNORED */
1238 PAD_NC(GPP_C13
, NONE
),
1240 /* GPP_C14 - GPIO */
1241 /* DW0: 0x44000300, DW1: 0x00000000 */
1242 /* DW0: PAD_TRIG(OFF) - IGNORED */
1243 PAD_NC(GPP_C14
, NONE
),
1245 /* GPP_C15 - GPIO */
1246 /* DW0: 0x44000300, DW1: 0x00000000 */
1247 /* DW0: PAD_TRIG(OFF) - IGNORED */
1248 PAD_NC(GPP_C15
, NONE
),
1250 /* GPP_C16 - GPIO */
1251 /* DW0: 0x44000300, DW1: 0x00000000 */
1252 /* DW0: PAD_TRIG(OFF) - IGNORED */
1253 PAD_NC(GPP_C16
, NONE
),
1255 /* GPP_C17 - GPIO */
1256 /* DW0: 0x44000300, DW1: 0x00000000 */
1257 /* DW0: PAD_TRIG(OFF) - IGNORED */
1258 PAD_NC(GPP_C17
, NONE
),
1260 /* GPP_C18 - SML_DATA0 */
1261 /* DW0: 0x04000f02, DW1: 0x00000000 */
1262 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1263 PAD_NC(GPP_C18
, NONE
),
1265 /* GPP_C19 - SML_CLK0 */
1266 /* DW0: 0x04000f02, DW1: 0x00000000 */
1267 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1268 PAD_NC(GPP_C19
, NONE
),
1270 /* GPP_C20 - SIO_UART2_RXD */
1271 /* DW0: 0x44001302, DW1: 0x00000000 */
1272 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1273 PAD_NC(GPP_C20
, NONE
),
1275 /* GPP_C21 - SIO_UART2_TXD */
1276 /* DW0: 0x44001300, DW1: 0x00000000 */
1277 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1278 PAD_NC(GPP_C21
, NONE
),
1280 /* GPP_C22 - SIO_UART2_RTS_N */
1281 /* DW0: 0x44001300, DW1: 0x00000000 */
1282 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1283 PAD_NC(GPP_C22
, NONE
),
1285 /* GPP_C23 - SIO_UART2_CTS_N */
1286 /* DW0: 0x44001302, DW1: 0x00000000 */
1287 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1288 PAD_NC(GPP_C23
, NONE
),
1290 /* ------- GPIO Group GPP_F ------- */
1293 /* DW0: 0x44000700, DW1: 0x00000000 */
1294 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1295 PAD_NC(GPP_F0
, NONE
),
1298 /* DW0: 0x44000700, DW1: 0x00003000 */
1299 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1300 PAD_NC(GPP_F1
, NONE
),
1303 /* DW0: 0x44000700, DW1: 0x00000000 */
1304 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1305 PAD_NC(GPP_F2
, NONE
),
1308 /* DW0: 0x44000700, DW1: 0x00003000 */
1309 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1310 PAD_NC(GPP_F3
, NONE
),
1313 /* DW0: 0x44000700, DW1: 0x00000000 */
1314 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1315 PAD_NC(GPP_F4
, NONE
),
1318 /* DW0: 0x44000700, DW1: 0x00000000 */
1319 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1320 PAD_NC(GPP_F5
, NONE
),
1323 /* DW0: 0x44000300, DW1: 0x00000000 */
1324 /* DW0: PAD_TRIG(OFF) - IGNORED */
1325 PAD_NC(GPP_F6
, NONE
),
1328 /* DW0: 0x44000200, DW1: 0x00000000 */
1329 PAD_NC(GPP_F7
, NONE
),
1331 /* GPP_F8 - ISI_TRACEDATA_0 */
1332 /* DW0: 0x44001700, DW1: 0x00000000 */
1333 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1334 PAD_NC(GPP_F8
, NONE
),
1336 /* GPP_F9 - BOOT_PWR_EN */
1337 /* DW0: 0x44000700, DW1: 0x00000000 */
1338 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1339 PAD_NC(GPP_F9
, NONE
),
1341 /* GPP_F10 - GPIO */
1342 /* DW0: 0x44000200, DW1: 0x00000000 */
1343 PAD_NC(GPP_F10
, NONE
),
1345 /* GPP_F11 - ISI_TRACECLK */
1346 /* DW0: 0x44001700, DW1: 0x00000000 */
1347 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1348 PAD_NC(GPP_F11
, NONE
),
1350 /* GPP_F12 - ISI_TRACESWO */
1351 /* DW0: 0x44001700, DW1: 0x00000000 */
1352 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1353 PAD_NC(GPP_F12
, NONE
),
1355 /* GPP_F13 - ISI_SWDIO */
1356 /* DW0: 0x44001702, DW1: 0x00000000 */
1357 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1358 PAD_NC(GPP_F13
, NONE
),
1360 /* GPP_F14 - ISI_TRACEDATA_1 */
1361 /* DW0: 0x44001700, DW1: 0x00000000 */
1362 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1363 PAD_NC(GPP_F14
, NONE
),
1365 /* GPP_F15 - ISI_TRACEDATA_2 */
1366 /* DW0: 0x44001700, DW1: 0x00000000 */
1367 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1368 PAD_NC(GPP_F15
, NONE
),
1370 /* GPP_F16 - ISI_SWCLK */
1371 /* DW0: 0x44001702, DW1: 0x00000000 */
1372 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1373 PAD_NC(GPP_F16
, NONE
),
1375 /* GPP_F17 - ISI_TRACEDATA_3 */
1376 /* DW0: 0x44001700, DW1: 0x00000000 */
1377 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1378 PAD_NC(GPP_F17
, NONE
),
1380 /* GPP_F18 - GPIO */
1381 /* DW0: 0x44000300, DW1: 0x00000000 */
1382 /* DW0: PAD_TRIG(OFF) - IGNORED */
1383 PAD_NC(GPP_F18
, NONE
),
1385 /* GPP_F19 - GPIO */
1386 /* DW0: 0x44000300, DW1: 0x00000000 */
1387 /* DW0: PAD_TRIG(OFF) - IGNORED */
1388 PAD_NC(GPP_F19
, NONE
),
1390 /* GPP_F20 - GPIO */
1391 /* DW0: 0x44000300, DW1: 0x00000000 */
1392 /* DW0: PAD_TRIG(OFF) - IGNORED */
1393 PAD_NC(GPP_F20
, NONE
),
1395 /* GPP_F21 - GPIO */
1396 /* DW0: 0x44000300, DW1: 0x00000000 */
1397 /* DW0: PAD_TRIG(OFF) - IGNORED */
1398 PAD_NC(GPP_F21
, NONE
),
1400 /* GPP_F22 - GPIO */
1401 /* DW0: 0x44000300, DW1: 0x00000000 */
1402 /* DW0: PAD_TRIG(OFF) - IGNORED */
1403 PAD_NC(GPP_F22
, NONE
),
1405 /* GPP_F23 - GPIO */
1406 /* DW0: 0x44000300, DW1: 0x00000000 */
1407 /* DW0: PAD_TRIG(OFF) - IGNORED */
1408 PAD_NC(GPP_F23
, NONE
),
1410 /* GPIO_RSVD_30 - n/a */
1411 /* DW0: 0x40000f00, DW1: 0x00000000 */
1412 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1413 PAD_CFG_NF(GPIO_RSVD_30
, NONE
, DEEP
, NF3
),
1415 /* GPIO_RSVD_31 - n/a */
1416 /* DW0: 0x40000700, DW1: 0x00000000 */
1417 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1418 PAD_CFG_NF(GPIO_RSVD_31
, NONE
, DEEP
, NF1
),
1420 /* GPIO_RSVD_32 - n/a */
1421 /* DW0: 0x40000700, DW1: 0x00000000 */
1422 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1423 PAD_CFG_NF(GPIO_RSVD_32
, NONE
, DEEP
, NF1
),
1425 /* GPIO_RSVD_33 - n/a */
1426 /* DW0: 0x40000700, DW1: 0x00000000 */
1427 /* DW0: PAD_BUF(TX_RX_DISABLE) - IGNORED */
1428 PAD_CFG_NF(GPIO_RSVD_33
, NONE
, DEEP
, NF1
),
1430 /* GPIO_RSVD_34 - n/a */
1431 /* DW0: 0x40000702, DW1: 0x00000000 */
1432 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1433 PAD_CFG_NF(GPIO_RSVD_34
, NONE
, DEEP
, NF1
),
1435 /* GPIO_RSVD_35 - n/a */
1436 /* DW0: 0x40000702, DW1: 0x00000000 */
1437 /* DW0: PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1438 PAD_CFG_NF(GPIO_RSVD_35
, NONE
, DEEP
, NF1
),
1440 /* GPIO_RSVD_36 - GPIO */
1441 /* DW0: 0x40000300, DW1: 0x00000000 */
1442 PAD_CFG_GPIO_HI_Z(GPIO_RSVD_36
, NONE
, DEEP
, TxLASTRxE
, SAME
),
1444 /* ------- GPIO Group GPP_E ------- */
1446 /* GPP_E0 - SATA_LED_N */
1447 /* DW0: 0x84000700, DW1: 0x00000000 */
1448 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1449 PAD_CFG_NF(GPP_E0
, NONE
, PLTRST
, NF1
),
1452 /* DW0: 0x44000300, DW1: 0x00000000 */
1453 /* DW0: PAD_TRIG(OFF) - IGNORED */
1454 PAD_NC(GPP_E1
, NONE
),
1457 /* DW0: 0x44000300, DW1: 0x00000000 */
1458 /* DW0: PAD_TRIG(OFF) - IGNORED */
1459 PAD_NC(GPP_E2
, NONE
),
1461 /* GPP_E3 - DDI1_HPD */
1462 /* DW0: 0x44000700, DW1: 0x00000000 */
1463 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1464 PAD_CFG_NF(GPP_E3
, NONE
, DEEP
, NF1
),
1467 /* DW0: 0x44000300, DW1: 0x00000000 */
1468 /* DW0: PAD_TRIG(OFF) - IGNORED */
1469 PAD_NC(GPP_E4
, NONE
),
1471 /* GPP_E5 - DDI1_DDC_SDA */
1472 /* DW0: 0x44000702, DW1: 0x00000000 */
1473 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1474 PAD_CFG_NF(GPP_E5
, NONE
, DEEP
, NF1
),
1477 /* DW0: 0x44000200, DW1: 0x00000000 */
1478 PAD_NC(GPP_E6
, NONE
),
1480 /* GPP_E7 - DDI1_DDC_SCL */
1481 /* DW0: 0x44000700, DW1: 0x00000000 */
1482 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1483 PAD_CFG_NF(GPP_E7
, NONE
, DEEP
, NF1
),
1485 /* GPP_E8 - SATA_1_DEVSLP */
1486 /* DW0: 0x04000b00, DW1: 0x00000000 */
1487 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1488 PAD_NC(GPP_E8
, NONE
),
1491 /* DW0: 0x44000300, DW1: 0x00000000 */
1492 /* DW0: PAD_TRIG(OFF) - IGNORED */
1493 PAD_NC(GPP_E9
, NONE
),
1495 /* GPP_E10 - GPIO */
1496 /* DW0: 0x44000300, DW1: 0x00000000 */
1497 /* DW0: PAD_TRIG(OFF) - IGNORED */
1498 PAD_NC(GPP_E10
, NONE
),
1500 /* GPP_E11 - GPIO */
1501 /* DW0: 0x44000300, DW1: 0x00000000 */
1502 /* DW0: PAD_TRIG(OFF) - IGNORED */
1503 PAD_NC(GPP_E11
, NONE
),
1505 /* GPP_E12 - GPIO */
1506 /* DW0: 0x44000300, DW1: 0x00000000 */
1507 /* DW0: PAD_TRIG(OFF) - IGNORED */
1508 PAD_NC(GPP_E12
, NONE
),
1510 /* GPP_E13 - GPIO */
1511 /* DW0: 0x44000300, DW1: 0x00000000 */
1512 /* DW0: PAD_TRIG(OFF) - IGNORED */
1513 PAD_NC(GPP_E13
, NONE
),
1515 /* GPP_E14 - DDI0_HPD */
1516 /* DW0: 0x44000702, DW1: 0x00000000 */
1517 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1518 PAD_CFG_NF(GPP_E14
, NONE
, DEEP
, NF1
),
1520 /* GPP_E15 - RSVD */
1521 /* DW0: 0x44000b00, DW1: 0x00000000 */
1522 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1523 PAD_NC(GPP_E15
, NONE
),
1525 /* GPP_E16 - RSVD */
1526 /* DW0: 0x44000b00, DW1: 0x00000000 */
1527 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1528 PAD_NC(GPP_E16
, NONE
),
1530 /* GPP_E17 - GPIO */
1531 /* DW0: 0x44000300, DW1: 0x00000000 */
1532 /* DW0: PAD_TRIG(OFF) - IGNORED */
1533 PAD_NC(GPP_E17
, NONE
),
1535 /* GPP_E18 - DDI0_DDC_SDA */
1536 /* DW0: 0x44000702, DW1: 0x00003c00 */
1537 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1) - IGNORED */
1538 PAD_CFG_NF(GPP_E18
, NATIVE
, DEEP
, NF1
),
1540 /* GPP_E19 - DDI0_DDC_SCL */
1541 /* DW0: 0x44000600, DW1: 0x00003c00 */
1542 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
1543 PAD_CFG_NF(GPP_E19
, NATIVE
, DEEP
, NF1
),
1545 /* GPP_E20 - GPIO */
1546 /* DW0: 0x44000300, DW1: 0x00000000 */
1547 /* DW0: PAD_TRIG(OFF) - IGNORED */
1548 PAD_NC(GPP_E20
, NONE
),
1550 /* GPP_E21 - GPIO */
1551 /* DW0: 0x44000300, DW1: 0x00000000 */
1552 /* DW0: PAD_TRIG(OFF) - IGNORED */
1553 PAD_NC(GPP_E21
, NONE
),
1555 /* GPP_E22 - GPIO */
1556 /* DW0: 0x44000300, DW1: 0x00000000 */
1557 /* DW0: PAD_TRIG(OFF) - IGNORED */
1558 PAD_NC(GPP_E22
, NONE
),
1560 /* GPP_E23 - GPIO */
1561 /* DW0: 0x44000200, DW1: 0x00000000 */
1562 PAD_NC(GPP_E23
, NONE
),
1564 /* ------- GPIO Community 5 ------- */
1566 /* ------- GPIO Group GPP_R ------- */
1568 /* GPP_R0 - HDA_BCLK */
1569 /* DW0: 0x44000700, DW1: 0x00000000 */
1570 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1571 PAD_CFG_NF(GPP_R0
, NONE
, DEEP
, NF1
),
1573 /* GPP_R1 - HDA_SYNC */
1574 /* DW0: 0x44000700, DW1: 0x00003c00 */
1575 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1576 PAD_CFG_NF(GPP_R1
, NATIVE
, DEEP
, NF1
),
1578 /* GPP_R2 - HDA_SDO */
1579 /* DW0: 0x44000600, DW1: 0x00003c00 */
1580 /* DW0: PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) - IGNORED */
1581 PAD_CFG_NF(GPP_R2
, NATIVE
, DEEP
, NF1
),
1583 /* GPP_R3 - HDA_SDI0 */
1584 /* DW0: 0x44000700, DW1: 0x00003c00 */
1585 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1586 PAD_CFG_NF(GPP_R3
, NATIVE
, DEEP
, NF1
),
1588 /* GPP_R4 - HDA_RST_N */
1589 /* DW0: 0x44000700, DW1: 0x00000000 */
1590 /* DW0: PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) - IGNORED */
1591 PAD_CFG_NF(GPP_R4
, NONE
, DEEP
, NF1
),
1594 /* DW0: 0x44000300, DW1: 0x00000000 */
1595 /* DW0: PAD_TRIG(OFF) - IGNORED */
1596 PAD_NC(GPP_R5
, NONE
),
1599 /* DW0: 0x44000300, DW1: 0x00000000 */
1600 /* DW0: PAD_TRIG(OFF) - IGNORED */
1601 PAD_NC(GPP_R6
, NONE
),
1604 /* DW0: 0x44000300, DW1: 0x00000000 */
1605 /* DW0: PAD_TRIG(OFF) - IGNORED */
1606 PAD_NC(GPP_R7
, NONE
),
1610 #endif /* CFG_GPIO_H */