mb/google/nissa/var/rull: Change padbased_override to rtd3 of wifi
[coreboot2.git] / src / device / pci_ops.c
blob31b73458b419e64fa45974ad4a545a2433a8bf94
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <stdint.h>
4 #include <console/console.h>
5 #include <device/pci.h>
6 #include <device/pci_ops.h>
8 u8 *const pci_mmconf = (void *)(uintptr_t)CONFIG_ECAM_MMCONF_BASE_ADDRESS;
10 /**
11 * Given a device, a capability type, and a last position, return the next
12 * matching capability. Always start at the head of the list.
14 * @param dev Pointer to the device structure.
15 * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
16 * @param last Location of the PCI capability register to start from.
17 * @return The next matching capability.
19 u16 pci_s_find_next_capability(pci_devfn_t dev, u16 cap, u16 last)
21 u16 pos = 0;
22 u16 status;
23 int reps = 48;
25 status = pci_s_read_config16(dev, PCI_STATUS);
26 if (!(status & PCI_STATUS_CAP_LIST))
27 return 0;
29 u8 hdr_type = pci_s_read_config8(dev, PCI_HEADER_TYPE);
30 switch (hdr_type & 0x7f) {
31 case PCI_HEADER_TYPE_NORMAL:
32 case PCI_HEADER_TYPE_BRIDGE:
33 pos = PCI_CAPABILITY_LIST;
34 break;
35 case PCI_HEADER_TYPE_CARDBUS:
36 pos = PCI_CB_CAPABILITY_LIST;
37 break;
38 default:
39 return 0;
42 pos = pci_s_read_config8(dev, pos);
43 while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */
44 int this_cap;
46 pos &= ~3;
47 this_cap = pci_s_read_config8(dev, pos + PCI_CAP_LIST_ID);
48 if (this_cap == 0xff)
49 break;
51 if (!last && (this_cap == cap))
52 return pos;
54 if (last == pos)
55 last = 0;
57 pos = pci_s_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
59 return 0;
62 /**
63 * Given a device, and a capability type, return the next matching
64 * capability. Always start at the head of the list.
66 * @param dev Pointer to the device structure.
67 * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
68 * @return The next matching capability.
70 u16 pci_s_find_capability(pci_devfn_t dev, u16 cap)
72 return pci_s_find_next_capability(dev, cap, 0);
75 void __noreturn pcidev_die(void)
77 die("PCI: dev is NULL!\n");
80 bool pci_dev_is_wake_source(pci_devfn_t dev)
82 unsigned int pm_cap;
83 uint16_t pmcs;
85 pm_cap = pci_s_find_capability(dev, PCI_CAP_ID_PM);
86 if (!pm_cap)
87 return false;
89 pmcs = pci_s_read_config16(dev, pm_cap + PCI_PM_CTRL);
91 /* PCI Device is a wake source if PME_ENABLE and PME_STATUS are set in PMCS register. */
92 return (pmcs & PCI_PM_CTRL_PME_ENABLE) && (pmcs & PCI_PM_CTRL_PME_STATUS);