1 chip northbridge
/intel
/sandybridge
3 register
"gfx" = "GMA_STATIC_DISPLAYS(1)"
5 # Enable DisplayPort Hotplug with
6ms pulse
6 register
"gpu_dp_d_hotplug" = "0x06"
8 # Enable Panel
as LVDS
and configure power delays
9 register
"gpu_panel_port_select" = "PANEL_PORT_LVDS"
10 register
"gpu_panel_power_cycle_delay" = "1"
11 register
"gpu_panel_power_up_delay" = "300" # T1
+T2
: 30ms
12 register
"gpu_panel_power_down_delay" = "300" # T5
+T6
: 30ms
13 register
"gpu_panel_power_backlight_on_delay" = "2000" # T3
: 200ms
14 register
"gpu_panel_power_backlight_off_delay" = "2000" # T4
: 200ms
15 register
"gpu_cpu_backlight" = "0x1155"
16 register
"gpu_pch_backlight" = "0x06100610"
18 register
"spd_addresses" = "{0x50, 0, 0x51, 0}"
19 chip cpu
/intel
/model_206ax
20 # Values obtained from vendor BIOS
21 register
"tcc_offset" = "3"
22 register
"pl1_mw" = "35000"
23 register
"pl2_mw" = "43750"
24 register
"pp0_current_limit" = "97"
25 register
"pp1_current_limit" = "32"
26 register
"pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
27 register
"pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
28 register
"pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
29 register
"pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
30 device cpu_cluster
0 on
end
33 subsystemid
0x17aa 0x21ce inherit
35 device ref host_bridge on
end # host bridge
36 device ref peg10 on
end # PCIe Bridge
for discrete graphics
37 device ref igd on
end # Integrated Graphics Controller
39 chip southbridge
/intel
/bd82x6x # Intel Series
6 Cougar Point PCH
41 #
0 No effect
(default
)
42 #
1 SMI#
(if corresponding ALT_GPI_SMI_EN bit is also
set)
43 #
2 SCI
(if corresponding GPIO_EN bit is also
set)
44 register
"alt_gp_smi_en" = "0x0000"
45 register
"gpi1_routing" = "2"
46 register
"gpi13_routing" = "2"
48 # Enable SATA ports
0 (HDD bay
) & 1 (ODD bay
) & 2 (mSATA
) & 3 (eSATA
) & 4 (dock
)
49 register
"sata_port_map" = "0x1f"
50 #
Set max SATA speed
to 6.0 Gb
/s
51 register
"sata_interface_speed_support" = "0x3"
53 register
"gen1_dec" = "0x7c1601"
54 register
"gen2_dec" = "0x0c15e1"
55 register
"gen4_dec" = "0x0c06a1"
57 register
"pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
59 # Enable zero
-based linear PCIe root port functions
60 register
"pcie_port_coalesce" = "true"
62 # device specific SPI configuration
63 register
"spi_uvscc" = "0x2005"
64 register
"spi_lvscc" = "0x2005"
66 # OC3
set in BIOS
to port
2-7, OC7
set in BIOS
to port
10-13
67 register
"usb_port_config" = "{
68 {1, 1, 0}, /* P0: system port 4, OC0 */
69 {1, 1, 1}, /* P1: system port 2 (EHCI debug), OC 1 */
70 {1, 1, -1}, /* P2: HALF MINICARD (WLAN) no oc */
71 {1, 0, -1}, /* P3: WWAN, no OC */
72 {1, 0, -1}, /* P4: smartcard, no OC */
73 {1, 1, -1}, /* P5: ExpressCard, no OC */
74 {0, 0, -1}, /* P6: empty */
75 {0, 0, -1}, /* P7: empty */
76 {1, 1, 4}, /* P8: system port 3, OC4*/
77 {1, 1, 5}, /* P9: system port 1 (EHCI debug), OC 5 */
78 {1, 0, -1}, /* P10: fingerprint reader, no OC */
79 {1, 0, -1}, /* P11: bluetooth, no OC. */
80 {1, 1, -1}, /* P12: docking, no OC */
81 {1, 1, -1} /* P13: camera (LCD), no OC */
84 device ref mei1 on
end # Management Engine Interface
1
85 device ref mei2 off
end # Management Engine Interface
2
86 device ref me_ide_r off
end # Management Engine IDE
-R
87 device ref me_kt off
end # Management Engine KT
88 device ref gbe on
end # Intel Gigabit Ethernet
89 device ref ehci2 on
end # USB Enhanced Host Controller #
2
90 device ref hda on
end # High Definition Audio Controller
91 device ref pcie_rp1 off
end # PCIe Port #
1
92 device ref pcie_rp2 on
end # PCIe Port #
2 Integrated Wireless LAN
93 device ref pcie_rp3 off
end # PCIe Port #
3
94 device ref pcie_rp4 on
95 smbios_slot_desc
"7" "3" "ExpressCard Slot" "8"
96 end # PCIe Port #
4 ExpressCard
97 device ref pcie_rp5 on
98 chip drivers
/ricoh
/rce822
99 register
"sdwppol" = "1"
100 register
"disable_mask" = "0x87"
101 device pci
00.0 on
end
103 end # PCIe Port #
5 (Ricoh SD
& FW
)
104 device ref pcie_rp6 off
end # PCIe Port #
6 Intel Gigabit Ethernet PHY
(not PCIe
)
105 device ref pcie_rp7 off
end # PCIe Port #
7
106 device ref pcie_rp8 off
end # PCIe Port #
8
107 device ref ehci1 on
end # USB Enhanced Host Controller #
1
108 device ref pci_bridge off
end # PCI bridge
111 device pnp ff
.1 on
end # dummy
112 register
"backlight_enable" = "true"
113 register
"dock_event_enable" = "true"
116 chip drivers
/pc80
/tpm
117 device pnp
0c31.0 on
end
121 device pnp ff
.2 on # dummy
128 register
"config0" = "0xa7"
129 register
"config1" = "0x01"
130 register
"config2" = "0xa0"
131 register
"config3" = "0xe2"
133 register
"has_keyboard_backlight" = "0"
135 register
"beepmask0" = "0x02"
136 register
"beepmask1" = "0x86"
137 register
"has_power_management_beeps" = "1"
138 register
"event2_enable" = "0xff"
139 register
"event3_enable" = "0xff"
140 register
"event4_enable" = "0xf0"
141 register
"event5_enable" = "0x3c"
142 register
"event6_enable" = "0x00"
143 register
"event7_enable" = "0xa1"
144 register
"event8_enable" = "0x7b"
145 register
"event9_enable" = "0xff"
146 register
"eventa_enable" = "0x00"
147 register
"eventb_enable" = "0x00"
148 register
"eventc_enable" = "0xff"
149 register
"eventd_enable" = "0xff"
150 register
"evente_enable" = "0x0d"
152 register
"has_bdc_detection" = "1"
153 register
"bdc_gpio_num" = "54"
154 register
"bdc_gpio_lvl" = "0"
156 chip drivers
/lenovo
/hybrid_graphics
157 device pnp ff.f on
end # dummy
159 register
"detect_gpio" = "21"
161 register
"has_panel_hybrid_gpio" = "1"
162 register
"panel_hybrid_gpio" = "52"
163 register
"panel_integrated_lvl" = "1"
165 register
"has_backlight_gpio" = "0"
166 register
"has_dgpu_power_gpio" = "0"
168 register
"has_thinker1" = "1"
171 device ref sata1 on
end #
6 port SATA AHCI Controller
173 # eeprom
, 8 virtual devices
, same chip
174 chip drivers
/i2c
/at24rf08c
184 end # SMBus Controller
185 device ref sata2 off
end # SATA Controller
2
186 device ref thermal on
end # Thermal