soc/intel/pantherlake: Remove soc_info.[hc] interface
[coreboot2.git] / src / device / azalia_device.c
blobc1673737642347fc1ebd6d52668f21a3bdb226e5
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/azalia_device.h>
7 #include <device/mmio.h>
8 #include <delay.h>
9 #include <timer.h>
10 #include <types.h>
12 static enum cb_err azalia_set_bits(void *port, u32 mask, u32 val)
14 struct stopwatch sw;
15 u32 reg32;
17 /* Write (val & mask) to port */
18 val &= mask;
19 reg32 = read32(port);
20 reg32 &= ~mask;
21 reg32 |= val;
22 write32(port, reg32);
24 /* Wait for readback of register to match what was just written to it */
25 stopwatch_init_msecs_expire(&sw, 50);
26 do {
27 /* Wait 1ms based on BKDG wait time */
28 mdelay(1);
29 reg32 = read32(port);
30 reg32 &= mask;
31 } while ((reg32 != val) && !stopwatch_expired(&sw));
33 /* Timeout occurred */
34 if (stopwatch_expired(&sw))
35 return CB_ERR;
36 return CB_SUCCESS;
39 enum cb_err azalia_enter_reset(u8 *base)
41 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
42 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
45 enum cb_err azalia_exit_reset(u8 *base)
47 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
48 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
51 static u16 codec_detect(u8 *base)
53 struct stopwatch sw;
54 u16 reg16;
56 if (azalia_exit_reset(base) != CB_SUCCESS)
57 goto no_codec;
60 * In the HD Audio Specification Rev. 1.0a, every bitfield in the GCAP
61 * register is RO (Read Only). However, it is known that in some Intel
62 * PCHs (e.g 6-series and 7-series, documents 324645 and 326776), some
63 * of the bitfields in the GCAP register are R/WO (Read / Write Once).
64 * GCAP is RO on 5-series PCHs; 8-series and 9-series PCHs have a lock
65 * bit for GCAP elsewhere.
67 * Lock GCAP by reading GCAP and writing back the same value. This has
68 * no effect on platforms that implement GCAP as a RO register or lock
69 * GCAP through a different mechanism.
71 write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
73 /* clear STATESTS bits (BAR + 0x0e)[14:0] */
74 reg16 = read16(base + HDA_STATESTS_REG);
75 reg16 |= 0x7fff;
76 write16(base + HDA_STATESTS_REG, reg16);
78 /* Wait for readback of register to
79 * match what was just written to it
81 stopwatch_init_msecs_expire(&sw, 50);
82 do {
83 /* Wait 1ms based on BKDG wait time */
84 mdelay(1);
85 reg16 = read16(base + HDA_STATESTS_REG);
86 } while ((reg16 != 0) && !stopwatch_expired(&sw));
88 /* Timeout occurred */
89 if (stopwatch_expired(&sw))
90 goto no_codec;
92 if (azalia_enter_reset(base) != CB_SUCCESS)
93 goto no_codec;
95 if (azalia_exit_reset(base) != CB_SUCCESS)
96 goto no_codec;
98 /* Read in Codec location (BAR + 0x0e)[14:0] */
99 reg16 = read16(base + HDA_STATESTS_REG);
100 reg16 &= 0x7fff;
101 if (!reg16)
102 goto no_codec;
104 return reg16;
106 no_codec:
107 /* Codec Not found */
108 azalia_enter_reset(base);
109 printk(BIOS_DEBUG, "azalia_audio: no codec!\n");
110 return 0;
114 * Find a specific entry within a verb table
116 * @param verb_table: verb table data
117 * @param verb_table_bytes: verb table size in bytes
118 * @param viddid: vendor/device to search for
119 * @param verb: pointer to entry within table
121 * Returns size of the entry within the verb table,
122 * Returns 0 if the entry is not found
124 * The HDA verb table is composed of dwords. A set of 4 dwords is
125 * grouped together to form a "jack" descriptor.
126 * Bits 31:28 - Codec Address
127 * Bits 27:20 - NID
128 * Bits 19:8 - Verb ID
129 * Bits 7:0 - Payload
131 * coreboot groups different codec verb tables into a single table
132 * and prefixes each with a specific header consisting of 3
133 * dword entries:
134 * 1 - Codec Vendor/Device ID
135 * 2 - Subsystem ID
136 * 3 - Number of jacks (groups of 4 dwords) for this codec
138 u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
140 int idx = 0;
142 while (idx < (verb_table_bytes / sizeof(u32))) {
143 /* Header contains the number of jacks, aka groups of 4 dwords */
144 u32 verb_size = 4 * verb_table[idx + 2];
145 if (verb_table[idx] != viddid) {
146 idx += verb_size + 3; // skip verb + header
147 continue;
149 *verb = &verb_table[idx + 3];
150 return verb_size;
153 /* Not all codecs need to load another verb */
154 return 0;
158 * Wait 50usec for the codec to indicate it is ready.
159 * No response would imply that the codec is non-operative.
162 static int wait_for_ready(u8 *base)
164 struct stopwatch sw;
165 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
166 stopwatch_init_usecs_expire(&sw, 50);
168 while (!stopwatch_expired(&sw)) {
169 u32 reg32 = read32(base + HDA_ICII_REG);
170 if (!(reg32 & HDA_ICII_BUSY))
171 return 0;
172 udelay(1);
175 return -1;
179 * Wait for the codec to indicate that it accepted the previous command.
180 * No response would imply that the codec is non-operative.
183 static int wait_for_valid(u8 *base)
185 struct stopwatch sw;
186 u32 reg32;
188 /* Send the verb to the codec */
189 reg32 = read32(base + HDA_ICII_REG);
190 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
191 write32(base + HDA_ICII_REG, reg32);
194 * The timeout is never reached when the codec is functioning properly.
195 * Using a small timeout value can result in spurious errors with some
196 * codecs, e.g. a codec that is slow to respond but operates correctly.
197 * When a codec is non-operative, the timeout is only reached once per
198 * verb table, thus the impact on booting time is relatively small. So,
199 * use a reasonably long enough timeout to cover all possible cases.
201 stopwatch_init_msecs_expire(&sw, 1);
202 while (!stopwatch_expired(&sw)) {
203 reg32 = read32(base + HDA_ICII_REG);
204 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
205 return 0;
206 udelay(1);
209 return -1;
212 static int azalia_write_verb(u8 *base, u32 verb)
214 if (wait_for_ready(base) < 0)
215 return -1;
217 write32(base + HDA_IC_REG, verb);
219 return wait_for_valid(base);
222 int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size)
224 if (!verbs)
225 return 0;
227 for (u32 i = 0; i < verb_size; i++) {
228 if (azalia_write_verb(base, verbs[i]) < 0)
229 return -1;
231 return 0;
234 __weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
238 static bool codec_is_operative(u8 *base, const int addr)
240 if (wait_for_ready(base) < 0) {
241 printk(BIOS_DEBUG, "azalia_audio: codec #%d not ready\n", addr);
242 return false;
245 const u32 reg32 = (addr << 28) | 0x000f0000;
246 write32(base + HDA_IC_REG, reg32);
248 if (wait_for_valid(base) < 0) {
249 printk(BIOS_DEBUG, "azalia_audio: codec #%d not valid\n", addr);
250 return false;
252 return true;
255 void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes)
257 const u32 viddid = read32(base + HDA_IR_REG);
258 const u32 *verb;
259 u32 verb_size;
261 printk(BIOS_DEBUG, "azalia_audio: initializing codec #%d...\n", addr);
262 printk(BIOS_DEBUG, "azalia_audio: - vendor/device id: 0x%08x\n", viddid);
264 verb_size = azalia_find_verb(verb_table, verb_table_bytes, viddid, &verb);
266 if (verb_size == 0) {
267 printk(BIOS_DEBUG, "azalia_audio: - no verb!\n");
268 return;
270 printk(BIOS_DEBUG, "azalia_audio: - verb size: %u\n", verb_size);
272 if (azalia_program_verb_table(base, verb, verb_size) < 0)
273 printk(BIOS_DEBUG, "azalia_audio: - verb not loaded\n");
274 else
275 printk(BIOS_DEBUG, "azalia_audio: - verb loaded\n");
277 mainboard_azalia_program_runtime_verbs(base, viddid);
280 static bool codec_can_init(const u16 codec_mask, u8 *base, const int addr)
282 return codec_mask & (1 << addr) && codec_is_operative(base, addr);
285 void azalia_codecs_init(u8 *base, u16 codec_mask)
287 for (int i = AZALIA_MAX_CODECS - 1; i >= 0; i--) {
288 if (codec_can_init(codec_mask, base, i))
289 azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size);
292 azalia_program_verb_table(base, pc_beep_verbs, pc_beep_verbs_size);
295 void azalia_audio_init(struct device *dev)
297 u8 *base;
298 struct resource *res;
299 u16 codec_mask;
301 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
302 if (!res)
303 return;
305 // NOTE this will break as soon as the azalia_audio gets a bar above 4G.
306 // Is there anything we can do about it?
307 base = res2mmio(res, 0, 0);
308 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
309 codec_mask = codec_detect(base);
311 if (codec_mask) {
312 printk(BIOS_DEBUG, "azalia_audio: codec_mask = 0x%02x\n", codec_mask);
313 azalia_codecs_init(base, codec_mask);
317 struct device_operations default_azalia_audio_ops = {
318 .read_resources = pci_dev_read_resources,
319 .set_resources = pci_dev_set_resources,
320 .enable_resources = pci_dev_enable_resources,
321 .init = azalia_audio_init,
322 .ops_pci = &pci_dev_ops_pci,