1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef SOC_INTEL_COMMON_BLOCK_VTD_H
4 #define SOC_INTEL_COMMON_BLOCK_VTD_H
6 #include <device/mmio.h>
9 /* VT-d specification: https://cdrdv2.intel.com/v1/dl/getContent/671081 */
12 #define CAP_PMR_LO BIT(5)
13 #define CAP_PMR_HI BIT(6)
15 #define PMEN_EPM BIT(31)
16 #define PMEN_PRS BIT(0)
17 #define PLMBASE_REG 0x68
18 #define PLMLIMIT_REG 0x6C
19 #define PHMBASE_REG 0x70
20 #define PHMLIMIT_REG 0x78
22 static __always_inline
uint32_t vtd_read32(uintptr_t vtd_base
, uint32_t reg
)
24 return read32p(vtd_base
+ reg
);
27 static __always_inline
void vtd_write32(uintptr_t vtd_base
, uint32_t reg
, uint32_t value
)
29 return write32p(vtd_base
+ reg
, value
);
32 static __always_inline
uint64_t vtd_read64(uintptr_t vtd_base
, uint32_t reg
)
34 return read64p(vtd_base
+ reg
);
37 static __always_inline
void vtd_write64(uintptr_t vtd_base
, uint32_t reg
, uint64_t value
)
39 return write64p(vtd_base
+ reg
, value
);
43 * Enable DMA protection by setting PMR registers in VT-d for whole DRAM memory.
45 void vtd_enable_dma_protection(void);
47 * Get DMA buffer base and size.
49 void *vtd_get_dma_buffer(size_t *size
);
51 #endif /* SOC_INTEL_COMMON_BLOCK_VTD_H */