src/southbridge/intel/bd82x6x/me.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This is a ramstage driver for the Intel Management Engine found in the
   5  * 6-series chipset.  It handles the required boot-time messages over the
   6  * MMIO-based Management Engine Interface to tell the ME that the BIOS is
   7  * finished with POST.  Additional messages are defined for debug but are
   8  * not used unless the console loglevel is high enough.
   9  */
  10
  11 #include <acpi/acpi.h>
  12 #include <cf9_reset.h>
  13 #include <device/mmio.h>
  14 #include <device/device.h>
  15 #include <device/pci.h>
  16 #include <device/pci_ops.h>
  17 #include <console/console.h>
  18 #include <device/pci_ids.h>
  19 #include <elog.h>
  20 #include <option.h>
  21 #include <southbridge/intel/common/me.h>
  22
  23 #include "me.h"
  24 #include "pch.h"
  25
  26 /* Determine the path that we should take based on ME status */
  27 static me_bios_path intel_me_path(struct device *dev)
  28 {
  29         me_bios_path path = ME_DISABLE_BIOS_PATH;
  30         union me_hfs hfs;
  31         union me_gmes gmes;
  32
  33         /* S3 wake skips all MKHI messages */
  34         if (acpi_is_wakeup_s3())
  35                 return ME_S3WAKE_BIOS_PATH;
  36
  37         hfs.raw = pci_read_config32(dev, PCI_ME_HFS);
  38         gmes.raw = pci_read_config32(dev, PCI_ME_GMES);
  39
  40         /* Check and dump status */
  41         intel_me_status(&hfs, &gmes);
  42
  43         /* Check Current Working State */
  44         switch (hfs.working_state) {
  45         case ME_HFS_CWS_NORMAL:
  46                 path = ME_NORMAL_BIOS_PATH;
  47                 break;
  48         case ME_HFS_CWS_REC:
  49                 path = ME_RECOVERY_BIOS_PATH;
  50                 break;
  51         default:
  52                 path = ME_DISABLE_BIOS_PATH;
  53                 break;
  54         }
  55
  56         /* Check Current Operation Mode */
  57         switch (hfs.operation_mode) {
  58         case ME_HFS_MODE_NORMAL:
  59                 break;
  60         case ME_HFS_MODE_DEBUG:
  61         case ME_HFS_MODE_DIS:
  62         case ME_HFS_MODE_OVER_JMPR:
  63         case ME_HFS_MODE_OVER_MEI:
  64         default:
  65                 path = ME_DISABLE_BIOS_PATH;
  66                 break;
  67         }
  68
  69         /* Check for any error code and valid firmware */
  70         if (hfs.error_code || hfs.fpt_bad)
  71                 path = ME_ERROR_BIOS_PATH;
  72
  73         if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) {
  74                 struct elog_event_data_me_extended data = {
  75                         .current_working_state = hfs.working_state,
  76                         .operation_state       = hfs.operation_state,
  77                         .operation_mode        = hfs.operation_mode,
  78                         .error_code            = hfs.error_code,
  79                         .progress_code         = gmes.progress_code,
  80                         .current_pmevent       = gmes.current_pmevent,
  81                         .current_state         = gmes.current_state,
  82                 };
  83                 elog_add_event_byte(ELOG_TYPE_MANAGEMENT_ENGINE, path);
  84                 elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT,
  85                                    &data, sizeof(data));
  86         }
  87
  88         return path;
  89 }
  90
  91 /* Get ME firmware version */
  92 static int mkhi_get_fw_version(void)
  93 {
  94         struct me_fw_version version;
  95         struct mkhi_header mkhi = {
  96                 .group_id       = MKHI_GROUP_ID_GEN,
  97                 .command        = MKHI_GET_FW_VERSION,
  98         };
  99         struct mei_header mei = {
 100                 .is_complete    = 1,
 101                 .host_address   = MEI_HOST_ADDRESS,
 102                 .client_address = MEI_ADDRESS_MKHI,
 103                 .length         = sizeof(mkhi),
 104         };
 105
 106         /* Send request and wait for response */
 107         if (mei_sendrecv(&mei, &mkhi, NULL, &version, sizeof(version)) < 0) {
 108                 printk(BIOS_ERR, "ME: GET FW VERSION message failed\n");
 109                 return -1;
 110         }
 111
 112         printk(BIOS_INFO, "ME: Firmware Version %u.%u.%u.%u (code) "
 113                "%u.%u.%u.%u (recovery)\n",
 114                version.code_major, version.code_minor,
 115                version.code_build_number, version.code_hot_fix,
 116                version.recovery_major, version.recovery_minor,
 117                version.recovery_build_number, version.recovery_hot_fix);
 118
 119         return 0;
 120 }
 121
 122 static inline void print_cap(const char *name, int state)
 123 {
 124         printk(BIOS_DEBUG, "ME Capability: %-30s : %sabled\n",
 125                name, state ? "en" : "dis");
 126 }
 127
 128 /* Get ME Firmware Capabilities */
 129 static int mkhi_get_fwcaps(void)
 130 {
 131         u32 rule_id = 0;
 132         struct me_fwcaps cap;
 133         struct mkhi_header mkhi = {
 134                 .group_id       = MKHI_GROUP_ID_FWCAPS,
 135                 .command        = MKHI_FWCAPS_GET_RULE,
 136         };
 137         struct mei_header mei = {
 138                 .is_complete    = 1,
 139                 .host_address   = MEI_HOST_ADDRESS,
 140                 .client_address = MEI_ADDRESS_MKHI,
 141                 .length         = sizeof(mkhi) + sizeof(rule_id),
 142         };
 143
 144         /* Send request and wait for response */
 145         if (mei_sendrecv(&mei, &mkhi, &rule_id, &cap, sizeof(cap)) < 0) {
 146                 printk(BIOS_ERR, "ME: GET FWCAPS message failed\n");
 147                 return -1;
 148         }
 149
 150         print_cap("Full Network manageability", cap.caps_sku.full_net);
 151         print_cap("Regular Network manageability", cap.caps_sku.std_net);
 152         print_cap("Manageability", cap.caps_sku.manageability);
 153         print_cap("Small business technology", cap.caps_sku.small_business);
 154         print_cap("Level III manageability", cap.caps_sku.l3manageability);
 155         print_cap("IntelR Anti-Theft (AT)", cap.caps_sku.intel_at);
 156         print_cap("IntelR Capability Licensing Service (CLS)",
 157                   cap.caps_sku.intel_cls);
 158         print_cap("IntelR Power Sharing Technology (MPC)",
 159                   cap.caps_sku.intel_mpc);
 160         print_cap("ICC Over Clocking", cap.caps_sku.icc_over_clocking);
 161         print_cap("Protected Audio Video Path (PAVP)", cap.caps_sku.pavp);
 162         print_cap("IPV6", cap.caps_sku.ipv6);
 163         print_cap("KVM Remote Control (KVM)", cap.caps_sku.kvm);
 164         print_cap("Outbreak Containment Heuristic (OCH)", cap.caps_sku.och);
 165         print_cap("Virtual LAN (VLAN)", cap.caps_sku.vlan);
 166         print_cap("TLS", cap.caps_sku.tls);
 167         print_cap("Wireless LAN (WLAN)", cap.caps_sku.wlan);
 168
 169         return 0;
 170 }
 171
 172
 173 /* Check whether ME is present and do basic init */
 174 static void intel_me_init(struct device *dev)
 175 {
 176         me_bios_path path = intel_me_path(dev);
 177         bool need_reset = false;
 178         union me_hfs hfs;
 179
 180         /* Do initial setup and determine the BIOS path */
 181         printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_get_bios_path_string(path));
 182
 183         u8 me_state = get_uint_option("me_state", 0);
 184         u8 me_state_prev = get_uint_option("me_state_prev", 0);
 185
 186         printk(BIOS_DEBUG, "ME: me_state=%u, me_state_prev=%u\n", me_state, me_state_prev);
 187
 188         switch (path) {
 189         case ME_S3WAKE_BIOS_PATH:
 190 #if CONFIG(HIDE_MEI_ON_ERROR)
 191         case ME_ERROR_BIOS_PATH:
 192 #endif
 193                 intel_me_hide(dev);
 194                 break;
 195
 196         case ME_NORMAL_BIOS_PATH:
 197                 /* Validate the extend register */
 198                 if (intel_me_extend_valid(dev) < 0)
 199                         break; /* TODO: force recovery mode */
 200
 201                 /* Prepare MEI MMIO interface */
 202                 if (intel_mei_setup(dev) < 0)
 203                         break;
 204
 205                 if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
 206                         /* Print ME firmware version */
 207                         mkhi_get_fw_version();
 208                         /* Print ME firmware capabilities */
 209                         mkhi_get_fwcaps();
 210                 }
 211
 212                 /* Put ME in Software Temporary Disable Mode, if needed */
 213                 if (me_state == CMOS_ME_STATE_DISABLED
 214                                 && CMOS_ME_STATE(me_state_prev) == CMOS_ME_STATE_NORMAL) {
 215                         printk(BIOS_INFO, "ME: disabling ME\n");
 216                         if (enter_soft_temp_disable()) {
 217                                 enter_soft_temp_disable_wait();
 218                                 need_reset = true;
 219                         } else {
 220                                 printk(BIOS_ERR, "ME: failed to enter Soft Temporary Disable mode\n");
 221                         }
 222
 223                         break;
 224                 }
 225
 226                 /*
 227                  * Leave the ME unlocked in this path.
 228                  * It will be locked via SMI command later.
 229                  */
 230                 break;
 231
 232         case ME_DISABLE_BIOS_PATH:
 233                 /* Bring ME out of Soft Temporary Disable mode, if needed */
 234                 hfs.raw = pci_read_config32(dev, PCI_ME_HFS);
 235                 if (hfs.operation_mode == ME_HFS_MODE_DIS
 236                                 && me_state == CMOS_ME_STATE_NORMAL
 237                                 && (CMOS_ME_STATE(me_state_prev) == CMOS_ME_STATE_DISABLED
 238                                         || !CMOS_ME_CHANGED(me_state_prev))) {
 239                         printk(BIOS_INFO, "ME: re-enabling ME\n");
 240
 241                         exit_soft_temp_disable(dev);
 242                         exit_soft_temp_disable_wait(dev);
 243
 244                         /*
 245                          * ME starts loading firmware immediately after writing to H_GS,
 246                          * but Lenovo BIOS performs a reboot after bringing ME back to
 247                          * Normal mode. Assume that global reset is needed.
 248                          */
 249                         need_reset = true;
 250                 } else {
 251                         intel_me_hide(dev);
 252                 }
 253                 break;
 254
 255 #if !CONFIG(HIDE_MEI_ON_ERROR)
 256         case ME_ERROR_BIOS_PATH:
 257 #endif
 258         case ME_RECOVERY_BIOS_PATH:
 259         case ME_FIRMWARE_UPDATE_BIOS_PATH:
 260                 break;
 261         }
 262
 263         /* To avoid boot loops if ME fails to get back from disabled mode,
 264            set the 'changed' bit here. */
 265         if (me_state != CMOS_ME_STATE(me_state_prev) || need_reset) {
 266                 u8 new_state = me_state | CMOS_ME_STATE_CHANGED;
 267                 set_uint_option("me_state_prev", new_state);
 268         }
 269
 270         if (need_reset) {
 271                 set_global_reset(true);
 272                 full_reset();
 273         }
 274 }
 275
 276 static struct device_operations device_ops = {
 277         .read_resources         = pci_dev_read_resources,
 278         .set_resources          = pci_dev_set_resources,
 279         .enable_resources       = pci_dev_enable_resources,
 280         .init                   = intel_me_init,
 281         .ops_pci                = &pci_dev_ops_pci,
 282 };
 283
 284 static const struct pci_driver intel_me __pci_driver = {
 285         .ops    = &device_ops,
 286         .vendor = PCI_VID_INTEL,
 287         .device = 0x1c3a,
 288 };