1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
6 /* HFS1[3:0] Current Working State Values */
7 static const char *me_cws_values
[] = {
8 [ME_HFS_CWS_RESET
] = "Reset",
9 [ME_HFS_CWS_INIT
] = "Initializing",
10 [ME_HFS_CWS_REC
] = "Recovery",
11 [ME_HFS_CWS_NORMAL
] = "Normal",
12 [ME_HFS_CWS_WAIT
] = "Platform Disable Wait",
13 [ME_HFS_CWS_TRANS
] = "OP State Transition",
14 [ME_HFS_CWS_INVALID
] = "Invalid CPU Plugged In"
17 /* HFS1[8:6] Current Operation State Values */
18 static const char *me_opstate_values
[] = {
19 [ME_HFS_STATE_PREBOOT
] = "Preboot",
20 [ME_HFS_STATE_M0_UMA
] = "M0 with UMA",
21 [ME_HFS_STATE_M3
] = "M3 without UMA",
22 [ME_HFS_STATE_M0
] = "M0 without UMA",
23 [ME_HFS_STATE_BRINGUP
] = "Bring up",
24 [ME_HFS_STATE_ERROR
] = "M0 without UMA but with error"
27 /* HFS[19:16] Current Operation Mode Values */
28 static const char *me_opmode_values
[] = {
29 [ME_HFS_MODE_NORMAL
] = "Normal",
30 [ME_HFS_MODE_DEBUG
] = "Debug or Disabled by AltDisableBit",
31 [ME_HFS_MODE_DIS
] = "Soft Temporary Disable",
32 [ME_HFS_MODE_OVER_JMPR
] = "Security Override via Jumper",
33 [ME_HFS_MODE_OVER_MEI
] = "Security Override via MEI Message"
36 /* HFS[15:12] Error Code Values */
37 static const char *me_error_values
[] = {
38 [ME_HFS_ERROR_NONE
] = "No Error",
39 [ME_HFS_ERROR_UNCAT
] = "Uncategorized Failure",
40 [ME_HFS_ERROR_IMAGE
] = "Image Failure",
41 [ME_HFS_ERROR_DEBUG
] = "Debug Failure"
44 /* GMES[31:28] ME Progress Code */
45 static const char *me_progress_values
[] = {
46 [ME_GMES_PHASE_ROM
] = "ROM Phase",
47 [ME_GMES_PHASE_BUP
] = "BUP Phase",
48 [ME_GMES_PHASE_UKERNEL
] = "uKernel Phase",
49 [ME_GMES_PHASE_POLICY
] = "Policy Module",
50 [ME_GMES_PHASE_MODULE
] = "Module Loading",
51 [ME_GMES_PHASE_UNKNOWN
] = "Unknown",
52 [ME_GMES_PHASE_HOST
] = "Host Communication"
55 /* GMES[27:24] Power Management Event */
56 static const char *me_pmevent_values
[] = {
57 [0x00] = "Clean Moff->Mx wake",
58 [0x01] = "Moff->Mx wake after an error",
59 [0x02] = "Clean global reset",
60 [0x03] = "Global reset after an error",
61 [0x04] = "Clean Intel ME reset",
62 [0x05] = "Intel ME reset due to exception",
63 [0x06] = "Pseudo-global reset",
64 [0x07] = "S0/M0->Sx/M3",
65 [0x08] = "Sx/M3->S0/M0",
66 [0x09] = "Non-power cycle reset",
67 [0x0a] = "Power cycle reset through M3",
68 [0x0b] = "Power cycle reset through Moff",
69 [0x0c] = "Sx/Mx->Sx/Moff"
72 /* Progress Code 0 states */
73 static const char *me_progress_rom_values
[] = {
78 /* Progress Code 1 states */
79 static const char *me_progress_bup_values
[] = {
80 [0x00] = "Initialization starts",
81 [0x01] = "Disable the host wake event",
82 [0x04] = "Flow determination start process",
83 [0x08] = "Error reading/matching the VSCC table in the descriptor",
84 [0x0a] = "Check to see if straps say ME DISABLED",
85 [0x0b] = "Timeout waiting for PWROK",
86 [0x0d] = "Possibly handle BUP manufacturing override strap",
87 [0x11] = "Bringup in M3",
88 [0x12] = "Bringup in M0",
89 [0x13] = "Flow detection error",
90 [0x15] = "M3 clock switching error",
91 [0x18] = "M3 kernel load",
92 [0x1c] = "T34 missing - cannot program ICC",
93 [0x1f] = "Waiting for DID BIOS message",
94 [0x20] = "Waiting for DID BIOS message failure",
95 [0x21] = "DID reported an error",
96 [0x22] = "Enabling UMA",
97 [0x23] = "Enabling UMA error",
98 [0x24] = "Sending DID Ack to BIOS",
99 [0x25] = "Sending DID Ack to BIOS error",
100 [0x26] = "Switching clocks in M0",
101 [0x27] = "Switching clocks in M0 error",
102 [0x28] = "ME in temp disable",
103 [0x32] = "M0 kernel load",
106 /* Progress Code 3 states */
107 static const char *me_progress_policy_values
[] = {
108 [0x00] = "Entry into Policy Module",
109 [0x03] = "Received S3 entry",
110 [0x04] = "Received S4 entry",
111 [0x05] = "Received S5 entry",
112 [0x06] = "Received UPD entry",
113 [0x07] = "Received PCR entry",
114 [0x08] = "Received NPCR entry",
115 [0x09] = "Received host wake",
116 [0x0a] = "Received AC<>DC switch",
117 [0x0b] = "Received DRAM Init Done",
118 [0x0c] = "VSCC Data not found for flash device",
119 [0x0d] = "VSCC Table is not valid",
120 [0x0e] = "Flash Partition Boundary is outside address space",
121 [0x0f] = "ME cannot access the chipset descriptor region",
122 [0x10] = "Required VSCC values for flash parts do not match",
125 void intel_me_status(union me_hfs
*hfs
, union me_gmes
*gmes
)
127 if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL
< BIOS_DEBUG
)
130 /* Check Current States */
131 printk(BIOS_DEBUG
, "ME: FW Partition Table : %s\n",
132 hfs
->fpt_bad
? "BAD" : "OK");
133 printk(BIOS_DEBUG
, "ME: Bringup Loader Failure : %s\n",
134 hfs
->ft_bup_ld_flr
? "YES" : "NO");
135 printk(BIOS_DEBUG
, "ME: Firmware Init Complete : %s\n",
136 hfs
->fw_init_complete
? "YES" : "NO");
137 printk(BIOS_DEBUG
, "ME: Manufacturing Mode : %s\n",
138 hfs
->mfg_mode
? "YES" : "NO");
139 printk(BIOS_DEBUG
, "ME: Boot Options Present : %s\n",
140 hfs
->boot_options_present
? "YES" : "NO");
141 printk(BIOS_DEBUG
, "ME: Update In Progress : %s\n",
142 hfs
->update_in_progress
? "YES" : "NO");
143 printk(BIOS_DEBUG
, "ME: Current Working State : %s\n",
144 me_cws_values
[hfs
->working_state
]);
145 printk(BIOS_DEBUG
, "ME: Current Operation State : %s\n",
146 me_opstate_values
[hfs
->operation_state
]);
147 printk(BIOS_DEBUG
, "ME: Current Operation Mode : %s\n",
148 me_opmode_values
[hfs
->operation_mode
]);
149 printk(BIOS_DEBUG
, "ME: Error Code : %s\n",
150 me_error_values
[hfs
->error_code
]);
151 printk(BIOS_DEBUG
, "ME: Progress Phase : %s\n",
152 me_progress_values
[gmes
->progress_code
]);
153 printk(BIOS_DEBUG
, "ME: Power Management Event : %s\n",
154 me_pmevent_values
[gmes
->current_pmevent
]);
156 printk(BIOS_DEBUG
, "ME: Progress Phase State : ");
157 switch (gmes
->progress_code
) {
158 case ME_GMES_PHASE_ROM
: /* ROM Phase */
159 printk(BIOS_DEBUG
, "%s",
160 me_progress_rom_values
[gmes
->current_state
]);
163 case ME_GMES_PHASE_BUP
: /* Bringup Phase */
164 if (gmes
->current_state
< ARRAY_SIZE(me_progress_bup_values
)
165 && me_progress_bup_values
[gmes
->current_state
])
166 printk(BIOS_DEBUG
, "%s",
167 me_progress_bup_values
[gmes
->current_state
]);
169 printk(BIOS_DEBUG
, "0x%02x", gmes
->current_state
);
172 case ME_GMES_PHASE_POLICY
: /* Policy Module Phase */
173 if (gmes
->current_state
< ARRAY_SIZE(me_progress_policy_values
)
174 && me_progress_policy_values
[gmes
->current_state
])
175 printk(BIOS_DEBUG
, "%s",
176 me_progress_policy_values
[gmes
->current_state
]);
178 printk(BIOS_DEBUG
, "0x%02x", gmes
->current_state
);
181 case ME_GMES_PHASE_HOST
: /* Host Communication Phase */
182 if (!gmes
->current_state
)
183 printk(BIOS_DEBUG
, "Host communication established");
185 printk(BIOS_DEBUG
, "0x%02x", gmes
->current_state
);
189 printk(BIOS_DEBUG
, "Unknown 0x%02x", gmes
->current_state
);
191 printk(BIOS_DEBUG
, "\n");