soc/intel/pantherlake: Remove soc_info.[hc] interface
[coreboot2.git] / src / southbridge / intel / bd82x6x / smbus.c
blob9db8d7a91ba3d547d5a25b30efc20bc3180e78ae
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/smbus.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <device/pci_ops.h>
8 #include <device/smbus_host.h>
9 #include <southbridge/intel/common/smbus_ops.h>
10 #include "pch.h"
12 static void pch_smbus_init(struct device *dev)
14 struct resource *res;
16 /* Enable clock gating */
17 pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
19 /* Set Receive Slave Address */
20 res = probe_resource(dev, PCI_BASE_ADDRESS_4);
21 if (res)
22 smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
25 static const char *smbus_acpi_name(const struct device *dev)
27 return "SBUS";
30 struct device_operations bd82x6x_smbus_ops = {
31 .read_resources = smbus_read_resources,
32 .set_resources = pci_dev_set_resources,
33 .enable_resources = pci_dev_enable_resources,
34 .scan_bus = scan_smbus,
35 .init = pch_smbus_init,
36 .ops_smbus_bus = &lops_smbus_bus,
37 .ops_pci = &pci_dev_ops_pci,
38 .acpi_name = smbus_acpi_name,