soc/intel/pantherlake: Remove soc_info.[hc] interface
[coreboot2.git] / src / southbridge / intel / common / smbus_ops.c
blob8542ba3d04a43520f2975f62fd37bb58c43a7c75
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/smbus.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <device/smbus_host.h>
8 #include <southbridge/intel/common/smbus_ops.h>
10 static int lsmbus_read_byte(struct device *dev, u8 address)
12 u16 device;
13 struct resource *res;
14 struct bus *pbus;
16 device = dev->path.i2c.device;
17 pbus = get_pbus_smbus(dev);
18 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
20 return do_smbus_read_byte(res->base, device, address);
23 static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
25 u16 device;
26 struct resource *res;
27 struct bus *pbus;
29 device = dev->path.i2c.device;
30 pbus = get_pbus_smbus(dev);
31 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
32 return do_smbus_write_byte(res->base, device, address, data);
35 static int lsmbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buf)
37 u16 device;
38 struct resource *res;
39 struct bus *pbus;
41 device = dev->path.i2c.device;
42 pbus = get_pbus_smbus(dev);
43 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
44 return do_smbus_block_write(res->base, device, cmd, bytes, buf);
47 static int lsmbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buf)
49 u16 device;
50 struct resource *res;
51 struct bus *pbus;
53 device = dev->path.i2c.device;
54 pbus = get_pbus_smbus(dev);
55 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
56 return do_smbus_block_read(res->base, device, cmd, bytes, buf);
59 struct smbus_bus_operations lops_smbus_bus = {
60 .read_byte = lsmbus_read_byte,
61 .write_byte = lsmbus_write_byte,
62 .block_read = lsmbus_block_read,
63 .block_write = lsmbus_block_write,
66 void smbus_read_resources(struct device *dev)
68 pci_dev_read_resources(dev);
70 struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
71 res->base = CONFIG_FIXED_SMBUS_IO_BASE;
72 res->size = 32;
73 res->limit = res->base + res->size - 1;
74 res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
75 IORESOURCE_STORED | IORESOURCE_ASSIGNED;