soc/intel/pantherlake: Remove soc_info.[hc] interface
[coreboot2.git] / src / southbridge / intel / i82801gx / usb_ehci.c
blobbfaceea1ed95edf48d1e306f24b233625b80174b
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include "i82801gx.h"
8 #include <device/pci_ehci.h>
9 #include <device/mmio.h>
10 #include <device/pci_ops.h>
12 static void usb_ehci_init(struct device *dev)
14 struct resource *res;
15 u8 *base;
16 u32 reg32;
18 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
19 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_SERR);
21 pci_or_config32(dev, 0xdc, (1 << 31) | (1 << 27));
23 pci_update_config32(dev, 0xfc, ~(3 << 2), (2 << 2) | (1 << 29) | (1 << 17));
25 /* Clear any pending port changes */
26 res = find_resource(dev, PCI_BASE_ADDRESS_0);
27 base = res2mmio(res, 0, 0);
28 reg32 = read32(base + 0x24) | (1 << 2);
29 write32(base + 0x24, reg32);
31 /* workaround */
32 pci_or_config8(dev, 0x84, 1 << 4);
34 printk(BIOS_DEBUG, "done.\n");
37 static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device)
39 u8 access_cntl;
41 access_cntl = pci_read_config8(dev, 0x80);
43 /* Enable writes to protected registers. */
44 pci_write_config8(dev, 0x80, access_cntl | 1);
46 pci_dev_set_subsystem(dev, vendor, device);
48 /* Restore protection. */
49 pci_write_config8(dev, 0x80, access_cntl);
52 static struct pci_operations lops_pci = {
53 .set_subsystem = &usb_ehci_set_subsystem,
56 static struct device_operations usb_ehci_ops = {
57 .read_resources = pci_ehci_read_resources,
58 .set_resources = pci_dev_set_resources,
59 .enable_resources = pci_dev_enable_resources,
60 .init = usb_ehci_init,
61 .enable = i82801gx_enable,
62 .ops_pci = &lops_pci,
65 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
66 static const struct pci_driver i82801gx_usb_ehci __pci_driver = {
67 .ops = &usb_ehci_ops,
68 .vendor = PCI_VID_INTEL,
69 .device = 0x27cc,