src/southbridge/intel/i82801jx/thermal.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/mmio.h>
   4 #include <device/pci_ops.h>
   5 #include <device/device.h>
   6 #include <device/pci.h>
   7 #include <device/pci_ids.h>
   8
   9 #include "i82801jx.h"
  10
  11 static void thermal_init(struct device *dev)
  12 {
  13         u8 reg8;
  14
  15         pci_write_config32(dev, 0x10, (uintptr_t)DEFAULT_TBAR);
  16         pci_or_config32(dev, 0x04, 1 << 1);
  17
  18         write32(DEFAULT_TBAR + 0x04, 0); /* Clear thermal trip points. */
  19         write32(DEFAULT_TBAR + 0x44, 0);
  20
  21         write8(DEFAULT_TBAR + 0x01, 0xba); /* Enable sensor 0 + 1. */
  22         write8(DEFAULT_TBAR + 0x41, 0xba);
  23
  24         reg8 = read8(DEFAULT_TBAR + 0x08); /* Lock thermal registers. */
  25         write8(DEFAULT_TBAR + 0x08, reg8 | (1 << 7));
  26         reg8 = read8(DEFAULT_TBAR + 0x48);
  27         write8(DEFAULT_TBAR + 0x48, reg8 | (1 << 7));
  28
  29         pci_and_config32(dev, 0x04, ~(1 << 1));
  30         pci_write_config32(dev, 0x10, 0);
  31 }
  32
  33 static struct device_operations device_ops = {
  34         .read_resources         = pci_dev_read_resources,
  35         .set_resources          = pci_dev_set_resources,
  36         .enable_resources       = pci_dev_enable_resources,
  37         .init                   = thermal_init,
  38         .ops_pci                = &pci_dev_ops_pci,
  39 };
  40
  41 static const unsigned short pci_device_ids[] = {
  42         0x3a32,
  43         0x3a62,
  44         0
  45 };
  46
  47 static const struct pci_driver ich10_thermal __pci_driver = {
  48         .ops    = &device_ops,
  49         .vendor = PCI_VID_INTEL,
  50         .devices        = pci_device_ids,
  51 };