src/southbridge/intel/ibexpeak/usb_ehci.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ids.h>
   7 #include "pch.h"
   8 #include <device/pci_ehci.h>
   9 #include <device/mmio.h>
  10 #include <device/pci_ops.h>
  11
  12 static void usb_ehci_init(struct device *dev)
  13 {
  14         u32 reg32;
  15         struct resource *res;
  16         u8 access_cntl;
  17
  18         /* Disable Wake on Disconnect in RMH */
  19         reg32 = RCBA32(0x35b0);
  20         reg32 |= 0x22;
  21         RCBA32(0x35b0) = reg32;
  22
  23         printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
  24
  25         pci_write_config32(dev, 0x84, 0x130c8911);
  26         pci_write_config32(dev, 0x88, 0xa0);
  27         pci_write_config32(dev, 0xf4, 0x80808588);
  28         pci_write_config32(dev, 0xf4, 0x00808588);
  29         pci_write_config32(dev, 0xf4, 0x00808588);
  30         pci_write_config32(dev, 0xfc, 0x301b1728);
  31
  32         pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
  33
  34         access_cntl = pci_read_config8(dev, 0x80);
  35
  36         /* Enable writes to protected registers. */
  37         pci_write_config8(dev, 0x80, access_cntl | 1);
  38
  39         res = probe_resource(dev, PCI_BASE_ADDRESS_0);
  40         if (res) {
  41                 /* Number of ports and companion controllers.  */
  42                 reg32 = read32((u32 *)(uintptr_t)(res->base + 4));
  43                 write32((u32 *)(uintptr_t)(res->base + 4),
  44                         (reg32 & 0xfff00000) | 2);
  45         }
  46
  47         /* Restore protection. */
  48         pci_write_config8(dev, 0x80, access_cntl);
  49
  50         printk(BIOS_DEBUG, "done.\n");
  51 }
  52
  53 static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor,
  54                                    unsigned int device)
  55 {
  56         u8 access_cntl;
  57
  58         access_cntl = pci_read_config8(dev, 0x80);
  59
  60         /* Enable writes to protected registers. */
  61         pci_write_config8(dev, 0x80, access_cntl | 1);
  62
  63         pci_dev_set_subsystem(dev, vendor, device);
  64
  65         /* Restore protection. */
  66         pci_write_config8(dev, 0x80, access_cntl);
  67 }
  68
  69 static struct pci_operations lops_pci = {
  70         .set_subsystem = &usb_ehci_set_subsystem,
  71 };
  72
  73 static struct device_operations usb_ehci_ops = {
  74         .read_resources = pci_ehci_read_resources,
  75         .set_resources = pci_dev_set_resources,
  76         .enable_resources       = pci_dev_enable_resources,
  77         .init = usb_ehci_init,
  78         .ops_pci = &lops_pci,
  79 };
  80
  81 static const unsigned short pci_device_ids[] = {
  82         PCI_DID_INTEL_IBEXPEAK_EHCI_1,
  83         PCI_DID_INTEL_IBEXPEAK_EHCI_2,
  84         0
  85 };
  86
  87 static const struct pci_driver pch_usb_ehci __pci_driver = {
  88         .ops = &usb_ehci_ops,
  89         .vendor = PCI_VID_INTEL,
  90         .devices = pci_device_ids,
  91 };