soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / LICENSES / exceptions / 
treee52500a1ccb1f51c8aa0caeb4e93a518e452117e
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-rw-r--r-- 3474 GCC-exception-3.1.txt
-rw-r--r-- 624 Linux-syscall-note.txt