soc/intel/xeon_sp/gnr: Use default DCACHE_BSP_STACK_SIZE
[coreboot2.git] / util / dtd_parser / 
treea68dbd2d0c47e925b4682a33be42053177b3b5e5
drwxr-xr-x   ..
-rw-r--r-- 31 description.md
-rwxr-xr-x 6495 dtd_parser.py