1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
3 The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
4 R8A73A4 and R8A7740 it also acts as a GPIO controller.
12 - compatible: should be one of the following.
13 - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16 - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
17 - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
18 - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
19 - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
20 - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
21 - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
22 - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
23 - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
24 - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
25 - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
26 - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
27 - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
28 - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller.
29 - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
31 - reg: Base address and length of each memory resource used by the pin
32 controller hardware module.
36 - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
37 otherwise. Should be 3.
39 - interrupts-extended: Specify the interrupts associated with external
40 IRQ pins. This property is mandatory when the PFC handles GPIOs and
41 forbidden otherwise. When specified, it must contain one interrupt per
42 external IRQ, sorted by external IRQ number.
44 The PFC node also acts as a container for pin configuration nodes. Please refer
45 to pinctrl-bindings.txt in this directory for the definition of the term "pin
46 configuration node" and for the common pinctrl bindings used by client devices.
48 Each pin configuration node represents a desired configuration for a pin, a
49 pin group, or a list of pins or pin groups. The configuration can include the
50 function to select on those pin(s) and pin configuration parameters (such as
51 pull-up and pull-down).
53 Pin configuration nodes contain pin configuration properties, either directly
54 or grouped in child subnodes. Both pin muxing and configuration parameters can
55 be grouped in that way and referenced as a single pin configuration node by
58 A configuration node or subnode must reference at least one pin (through the
59 pins or pin groups properties) and contain at least a function or one
60 configuration parameter. When the function is present only pin groups can be
61 used to reference pins.
63 All pin configuration nodes and subnodes names are ignored. All of those nodes
64 are parsed through phandles and processed purely based on their content.
66 Pin Configuration Node Properties:
68 - pins : An array of strings, each string containing the name of a pin.
69 - groups : An array of strings, each string containing the name of a pin
72 - function: A string containing the name of the function to mux to the pin
73 group(s) specified by the groups property.
75 Valid values for pin, group and function names can be found in the group and
76 function arrays of the PFC data file corresponding to the SoC
77 (drivers/pinctrl/sh-pfc/pfc-*.c)
79 The pin configuration parameters use the generic pinconf bindings defined in
80 pinctrl-bindings.txt in this directory. The supported parameters are
81 bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
82 pins that have a configurable I/O voltage, the power-source value should be the
83 nominal I/O voltage in millivolts.
89 On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
93 - gpio-controller: Marks the device node as a gpio controller.
95 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
96 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
97 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
99 The syntax of the gpio specifier used by client nodes should be the following
100 with values derived from the SoC user manual.
102 <[phandle of the gpio controller node]
103 [pin number within the gpio controller]
106 On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
107 Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
108 for documentation of the GPIO device tree bindings on those platforms.
114 Example 1: SH73A0 (SH-Mobile AG5) pin controller node
116 pfc: pin-controller@e6050000 {
117 compatible = "renesas,pfc-sh73a0";
118 reg = <0xe6050000 0x8000>,
122 interrupts-extended =
123 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
124 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
125 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
126 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
127 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
128 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
129 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
130 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
133 Example 2: A GPIO LED node that references a GPIO
135 #include <dt-bindings/gpio/gpio.h>
138 compatible = "gpio-leds";
140 gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
144 Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
145 for the MMCIF and SCIFA4 devices
148 pinctrl-0 = <&scifa4_pins>;
149 pinctrl-names = "default";
153 groups = "mmc0_data8_0", "mmc0_ctrl_0";
157 groups = "mmc0_data8_0";
163 scifa4_pins: scifa4 {
164 groups = "scifa4_data", "scifa4_ctrl";
169 Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
172 pinctrl-0 = <&mmcif_pins>;
173 pinctrl-names = "default";
176 vmmc-supply = <®_1p8v>;