drivers/clk/bcm/clk-bcm2835-aux.c

   1 /*
   2  * Copyright (C) 2015 Broadcom
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <dt-bindings/clock/bcm2835-aux.h>
  20
  21 #define BCM2835_AUXIRQ          0x00
  22 #define BCM2835_AUXENB          0x04
  23
  24 static int bcm2835_aux_clk_probe(struct platform_device *pdev)
  25 {
  26         struct device *dev = &pdev->dev;
  27         struct clk_hw_onecell_data *onecell;
  28         const char *parent;
  29         struct clk *parent_clk;
  30         struct resource *res;
  31         void __iomem *reg, *gate;
  32
  33         parent_clk = devm_clk_get(dev, NULL);
  34         if (IS_ERR(parent_clk))
  35                 return PTR_ERR(parent_clk);
  36         parent = __clk_get_name(parent_clk);
  37
  38         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  39         reg = devm_ioremap_resource(dev, res);
  40         if (IS_ERR(reg))
  41                 return PTR_ERR(reg);
  42
  43         onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) *
  44                                BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
  45         if (!onecell)
  46                 return -ENOMEM;
  47         onecell->num = BCM2835_AUX_CLOCK_COUNT;
  48
  49         gate = reg + BCM2835_AUXENB;
  50         onecell->hws[BCM2835_AUX_CLOCK_UART] =
  51                 clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
  52
  53         onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
  54                 clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
  55
  56         onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
  57                 clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
  58
  59         return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
  60                                       onecell);
  61 }
  62
  63 static const struct of_device_id bcm2835_aux_clk_of_match[] = {
  64         { .compatible = "brcm,bcm2835-aux", },
  65         {},
  66 };
  67 MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
  68
  69 static struct platform_driver bcm2835_aux_clk_driver = {
  70         .driver = {
  71                 .name = "bcm2835-aux-clk",
  72                 .of_match_table = bcm2835_aux_clk_of_match,
  73         },
  74         .probe          = bcm2835_aux_clk_probe,
  75 };
  76 builtin_platform_driver(bcm2835_aux_clk_driver);
  77
  78 MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
  79 MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
  80 MODULE_LICENSE("GPL v2");