2 * Copyright (c) 2016 Mellanox Technologies. All rights reserved.
3 * Copyright (c) 2016 Michael Shych <michaels@mellanox.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the names of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
17 * Alternatively, this software may be distributed under the terms of the
18 * GNU General Public License ("GPL") version 2 as published by the Free
19 * Software Foundation.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 #include <linux/delay.h>
35 #include <linux/i2c.h>
36 #include <linux/init.h>
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/platform_device.h>
43 #define MLXPLAT_CPLD_LPC_I2C_BASE_ADDR 0x2000
44 #define MLXCPLD_I2C_DEVICE_NAME "i2c_mlxcpld"
45 #define MLXCPLD_I2C_VALID_FLAG (I2C_M_RECV_LEN | I2C_M_RD)
46 #define MLXCPLD_I2C_BUS_NUM 1
47 #define MLXCPLD_I2C_DATA_REG_SZ 36
48 #define MLXCPLD_I2C_MAX_ADDR_LEN 4
49 #define MLXCPLD_I2C_RETR_NUM 2
50 #define MLXCPLD_I2C_XFER_TO 500000 /* usec */
51 #define MLXCPLD_I2C_POLL_TIME 2000 /* usec */
53 /* LPC I2C registers */
54 #define MLXCPLD_LPCI2C_LPF_REG 0x0
55 #define MLXCPLD_LPCI2C_CTRL_REG 0x1
56 #define MLXCPLD_LPCI2C_HALF_CYC_REG 0x4
57 #define MLXCPLD_LPCI2C_I2C_HOLD_REG 0x5
58 #define MLXCPLD_LPCI2C_CMD_REG 0x6
59 #define MLXCPLD_LPCI2C_NUM_DAT_REG 0x7
60 #define MLXCPLD_LPCI2C_NUM_ADDR_REG 0x8
61 #define MLXCPLD_LPCI2C_STATUS_REG 0x9
62 #define MLXCPLD_LPCI2C_DATA_REG 0xa
64 /* LPC I2C masks and parametres */
65 #define MLXCPLD_LPCI2C_RST_SEL_MASK 0x1
66 #define MLXCPLD_LPCI2C_TRANS_END 0x1
67 #define MLXCPLD_LPCI2C_STATUS_NACK 0x10
68 #define MLXCPLD_LPCI2C_NO_IND 0
69 #define MLXCPLD_LPCI2C_ACK_IND 1
70 #define MLXCPLD_LPCI2C_NACK_IND 2
72 struct mlxcpld_i2c_curr_xfer
{
80 struct mlxcpld_i2c_priv
{
81 struct i2c_adapter adap
;
84 struct mlxcpld_i2c_curr_xfer xfer
;
88 static void mlxcpld_i2c_lpc_write_buf(u8
*data
, u8 len
, u32 addr
)
92 for (i
= 0; i
< len
- len
% 4; i
+= 4)
93 outl(*(u32
*)(data
+ i
), addr
+ i
);
95 outb(*(data
+ i
), addr
+ i
);
98 static void mlxcpld_i2c_lpc_read_buf(u8
*data
, u8 len
, u32 addr
)
102 for (i
= 0; i
< len
- len
% 4; i
+= 4)
103 *(u32
*)(data
+ i
) = inl(addr
+ i
);
105 *(data
+ i
) = inb(addr
+ i
);
108 static void mlxcpld_i2c_read_comm(struct mlxcpld_i2c_priv
*priv
, u8 offs
,
109 u8
*data
, u8 datalen
)
111 u32 addr
= priv
->base_addr
+ offs
;
118 *((u16
*)data
) = inw(addr
);
121 *((u16
*)data
) = inw(addr
);
122 *(data
+ 2) = inb(addr
+ 2);
125 *((u32
*)data
) = inl(addr
);
128 mlxcpld_i2c_lpc_read_buf(data
, datalen
, addr
);
133 static void mlxcpld_i2c_write_comm(struct mlxcpld_i2c_priv
*priv
, u8 offs
,
134 u8
*data
, u8 datalen
)
136 u32 addr
= priv
->base_addr
+ offs
;
143 outw(*((u16
*)data
), addr
);
146 outw(*((u16
*)data
), addr
);
147 outb(*(data
+ 2), addr
+ 2);
150 outl(*((u32
*)data
), addr
);
153 mlxcpld_i2c_lpc_write_buf(data
, datalen
, addr
);
159 * Check validity of received i2c messages parameters.
160 * Returns 0 if OK, other - in case of invalid parameters.
162 static int mlxcpld_i2c_check_msg_params(struct mlxcpld_i2c_priv
*priv
,
163 struct i2c_msg
*msgs
, int num
)
168 dev_err(priv
->dev
, "Incorrect 0 num of messages\n");
172 if (unlikely(msgs
[0].addr
> 0x7f)) {
173 dev_err(priv
->dev
, "Invalid address 0x%03x\n",
178 for (i
= 0; i
< num
; ++i
) {
179 if (unlikely(!msgs
[i
].buf
)) {
180 dev_err(priv
->dev
, "Invalid buf in msg[%d]\n",
184 if (unlikely(msgs
[0].addr
!= msgs
[i
].addr
)) {
185 dev_err(priv
->dev
, "Invalid addr in msg[%d]\n",
195 * Check if transfer is completed and status of operation.
196 * Returns 0 - transfer completed (both ACK or NACK),
197 * negative - transfer isn't finished.
199 static int mlxcpld_i2c_check_status(struct mlxcpld_i2c_priv
*priv
, int *status
)
203 mlxcpld_i2c_read_comm(priv
, MLXCPLD_LPCI2C_STATUS_REG
, &val
, 1);
205 if (val
& MLXCPLD_LPCI2C_TRANS_END
) {
206 if (val
& MLXCPLD_LPCI2C_STATUS_NACK
)
208 * The slave is unable to accept the data. No such
209 * slave, command not understood, or unable to accept
212 *status
= MLXCPLD_LPCI2C_NACK_IND
;
214 *status
= MLXCPLD_LPCI2C_ACK_IND
;
217 *status
= MLXCPLD_LPCI2C_NO_IND
;
222 static void mlxcpld_i2c_set_transf_data(struct mlxcpld_i2c_priv
*priv
,
223 struct i2c_msg
*msgs
, int num
,
226 priv
->xfer
.msg
= msgs
;
227 priv
->xfer
.msg_num
= num
;
230 * All upper layers currently are never use transfer with more than
231 * 2 messages. Actually, it's also not so relevant in Mellanox systems
232 * because of HW limitation. Max size of transfer is not more than 32
233 * bytes in the current x86 LPCI2C bridge.
235 priv
->xfer
.cmd
= msgs
[num
- 1].flags
& I2C_M_RD
;
237 if (priv
->xfer
.cmd
== I2C_M_RD
&& comm_len
!= msgs
[0].len
) {
238 priv
->xfer
.addr_width
= msgs
[0].len
;
239 priv
->xfer
.data_len
= comm_len
- priv
->xfer
.addr_width
;
241 priv
->xfer
.addr_width
= 0;
242 priv
->xfer
.data_len
= comm_len
;
246 /* Reset CPLD LPCI2C block */
247 static void mlxcpld_i2c_reset(struct mlxcpld_i2c_priv
*priv
)
251 mutex_lock(&priv
->lock
);
253 mlxcpld_i2c_read_comm(priv
, MLXCPLD_LPCI2C_CTRL_REG
, &val
, 1);
254 val
&= ~MLXCPLD_LPCI2C_RST_SEL_MASK
;
255 mlxcpld_i2c_write_comm(priv
, MLXCPLD_LPCI2C_CTRL_REG
, &val
, 1);
257 mutex_unlock(&priv
->lock
);
260 /* Make sure the CPLD is ready to start transmitting. */
261 static int mlxcpld_i2c_check_busy(struct mlxcpld_i2c_priv
*priv
)
265 mlxcpld_i2c_read_comm(priv
, MLXCPLD_LPCI2C_STATUS_REG
, &val
, 1);
267 if (val
& MLXCPLD_LPCI2C_TRANS_END
)
273 static int mlxcpld_i2c_wait_for_free(struct mlxcpld_i2c_priv
*priv
)
278 if (!mlxcpld_i2c_check_busy(priv
))
280 usleep_range(MLXCPLD_I2C_POLL_TIME
/ 2, MLXCPLD_I2C_POLL_TIME
);
281 timeout
+= MLXCPLD_I2C_POLL_TIME
;
282 } while (timeout
<= MLXCPLD_I2C_XFER_TO
);
284 if (timeout
> MLXCPLD_I2C_XFER_TO
)
291 * Wait for master transfer to complete.
292 * It puts current process to sleep until we get interrupt or timeout expires.
293 * Returns the number of transferred or read bytes or error (<0).
295 static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv
*priv
)
297 int status
, i
, timeout
= 0;
301 usleep_range(MLXCPLD_I2C_POLL_TIME
/ 2, MLXCPLD_I2C_POLL_TIME
);
302 if (!mlxcpld_i2c_check_status(priv
, &status
))
304 timeout
+= MLXCPLD_I2C_POLL_TIME
;
305 } while (status
== 0 && timeout
< MLXCPLD_I2C_XFER_TO
);
308 case MLXCPLD_LPCI2C_NO_IND
:
311 case MLXCPLD_LPCI2C_ACK_IND
:
312 if (priv
->xfer
.cmd
!= I2C_M_RD
)
313 return (priv
->xfer
.addr_width
+ priv
->xfer
.data_len
);
315 if (priv
->xfer
.msg_num
== 1)
320 if (!priv
->xfer
.msg
[i
].buf
)
324 * Actual read data len will be always the same as
325 * requested len. 0xff (line pull-up) will be returned
326 * if slave has no data to return. Thus don't read
327 * MLXCPLD_LPCI2C_NUM_DAT_REG reg from CPLD.
329 datalen
= priv
->xfer
.data_len
;
331 mlxcpld_i2c_read_comm(priv
, MLXCPLD_LPCI2C_DATA_REG
,
332 priv
->xfer
.msg
[i
].buf
, datalen
);
336 case MLXCPLD_LPCI2C_NACK_IND
:
344 static void mlxcpld_i2c_xfer_msg(struct mlxcpld_i2c_priv
*priv
)
349 mlxcpld_i2c_write_comm(priv
, MLXCPLD_LPCI2C_NUM_DAT_REG
,
350 &priv
->xfer
.data_len
, 1);
351 mlxcpld_i2c_write_comm(priv
, MLXCPLD_LPCI2C_NUM_ADDR_REG
,
352 &priv
->xfer
.addr_width
, 1);
354 for (i
= 0; i
< priv
->xfer
.msg_num
; i
++) {
355 if ((priv
->xfer
.msg
[i
].flags
& I2C_M_RD
) != I2C_M_RD
) {
356 /* Don't write to CPLD buffer in read transaction */
357 mlxcpld_i2c_write_comm(priv
, MLXCPLD_LPCI2C_DATA_REG
+
358 len
, priv
->xfer
.msg
[i
].buf
,
359 priv
->xfer
.msg
[i
].len
);
360 len
+= priv
->xfer
.msg
[i
].len
;
365 * Set target slave address with command for master transfer.
366 * It should be latest executed function before CPLD transaction.
368 cmd
= (priv
->xfer
.msg
[0].addr
<< 1) | priv
->xfer
.cmd
;
369 mlxcpld_i2c_write_comm(priv
, MLXCPLD_LPCI2C_CMD_REG
, &cmd
, 1);
373 * Generic lpc-i2c transfer.
374 * Returns the number of processed messages or error (<0).
376 static int mlxcpld_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
,
379 struct mlxcpld_i2c_priv
*priv
= i2c_get_adapdata(adap
);
383 err
= mlxcpld_i2c_check_msg_params(priv
, msgs
, num
);
385 dev_err(priv
->dev
, "Incorrect message\n");
389 for (i
= 0; i
< num
; ++i
)
390 comm_len
+= msgs
[i
].len
;
392 /* Check bus state */
393 if (mlxcpld_i2c_wait_for_free(priv
)) {
394 dev_err(priv
->dev
, "LPCI2C bridge is busy\n");
397 * Usually it means something serious has happened.
398 * We can not have unfinished previous transfer
399 * so it doesn't make any sense to try to stop it.
400 * Probably we were not able to recover from the
402 * The only reasonable thing - is soft reset.
404 mlxcpld_i2c_reset(priv
);
405 if (mlxcpld_i2c_check_busy(priv
)) {
406 dev_err(priv
->dev
, "LPCI2C bridge is busy after reset\n");
411 mlxcpld_i2c_set_transf_data(priv
, msgs
, num
, comm_len
);
413 mutex_lock(&priv
->lock
);
415 /* Do real transfer. Can't fail */
416 mlxcpld_i2c_xfer_msg(priv
);
418 /* Wait for transaction complete */
419 err
= mlxcpld_i2c_wait_for_tc(priv
);
421 mutex_unlock(&priv
->lock
);
423 return err
< 0 ? err
: num
;
426 static u32
mlxcpld_i2c_func(struct i2c_adapter
*adap
)
428 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
| I2C_FUNC_SMBUS_BLOCK_DATA
;
431 static const struct i2c_algorithm mlxcpld_i2c_algo
= {
432 .master_xfer
= mlxcpld_i2c_xfer
,
433 .functionality
= mlxcpld_i2c_func
436 static const struct i2c_adapter_quirks mlxcpld_i2c_quirks
= {
437 .flags
= I2C_AQ_COMB_WRITE_THEN_READ
,
438 .max_read_len
= MLXCPLD_I2C_DATA_REG_SZ
- MLXCPLD_I2C_MAX_ADDR_LEN
,
439 .max_write_len
= MLXCPLD_I2C_DATA_REG_SZ
,
440 .max_comb_1st_msg_len
= 4,
443 static struct i2c_adapter mlxcpld_i2c_adapter
= {
444 .owner
= THIS_MODULE
,
445 .name
= "i2c-mlxcpld",
446 .class = I2C_CLASS_HWMON
| I2C_CLASS_SPD
,
447 .algo
= &mlxcpld_i2c_algo
,
448 .quirks
= &mlxcpld_i2c_quirks
,
449 .retries
= MLXCPLD_I2C_RETR_NUM
,
450 .nr
= MLXCPLD_I2C_BUS_NUM
,
453 static int mlxcpld_i2c_probe(struct platform_device
*pdev
)
455 struct mlxcpld_i2c_priv
*priv
;
458 priv
= devm_kzalloc(&pdev
->dev
, sizeof(*priv
), GFP_KERNEL
);
462 mutex_init(&priv
->lock
);
463 platform_set_drvdata(pdev
, priv
);
465 priv
->dev
= &pdev
->dev
;
467 /* Register with i2c layer */
468 mlxcpld_i2c_adapter
.timeout
= usecs_to_jiffies(MLXCPLD_I2C_XFER_TO
);
469 priv
->adap
= mlxcpld_i2c_adapter
;
470 priv
->adap
.dev
.parent
= &pdev
->dev
;
471 priv
->base_addr
= MLXPLAT_CPLD_LPC_I2C_BASE_ADDR
;
472 i2c_set_adapdata(&priv
->adap
, priv
);
474 err
= i2c_add_numbered_adapter(&priv
->adap
);
476 mutex_destroy(&priv
->lock
);
481 static int mlxcpld_i2c_remove(struct platform_device
*pdev
)
483 struct mlxcpld_i2c_priv
*priv
= platform_get_drvdata(pdev
);
485 i2c_del_adapter(&priv
->adap
);
486 mutex_destroy(&priv
->lock
);
491 static struct platform_driver mlxcpld_i2c_driver
= {
492 .probe
= mlxcpld_i2c_probe
,
493 .remove
= mlxcpld_i2c_remove
,
495 .name
= MLXCPLD_I2C_DEVICE_NAME
,
499 module_platform_driver(mlxcpld_i2c_driver
);
501 MODULE_AUTHOR("Michael Shych <michaels@mellanox.com>");
502 MODULE_DESCRIPTION("Mellanox I2C-CPLD controller driver");
503 MODULE_LICENSE("Dual BSD/GPL");
504 MODULE_ALIAS("platform:i2c-mlxcpld");