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x86/topology: Fix function name in documentation
[cris-mirror.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
blob8009bdad4e5bad85f25cee76f16ae037472c20dc
1 /* This file is part of the Emulex RoCE Device Driver for
2 * RoCE (RDMA over Converged Ethernet) adapters.
3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
4 * EMULEX and SLI are trademarks of Emulex.
5 * www.emulex.com
6 *
7 * This software is available to you under a choice of one of two licenses.
8 * You may choose to be licensed under the terms of the GNU General Public
9 * License (GPL) Version 2, available from the file COPYING in the main
10 * directory of this source tree, or the BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * - Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * Contact Information:
36 * linux-drivers@emulex.com
37 *
38 * Emulex
39 * 3333 Susan Street
40 * Costa Mesa, CA 92626
41 */
42
43 #include <linux/dma-mapping.h>
44 #include <rdma/ib_verbs.h>
45 #include <rdma/ib_user_verbs.h>
46 #include <rdma/iw_cm.h>
47 #include <rdma/ib_umem.h>
48 #include <rdma/ib_addr.h>
49 #include <rdma/ib_cache.h>
50
51 #include "ocrdma.h"
52 #include "ocrdma_hw.h"
53 #include "ocrdma_verbs.h"
54 #include <rdma/ocrdma-abi.h>
55
56 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
57 {
58 if (index > 1)
59 return -EINVAL;
60
61 *pkey = 0xffff;
62 return 0;
63 }
64
65 int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
66 int index, union ib_gid *sgid)
67 {
68 int ret;
69
70 memset(sgid, 0, sizeof(*sgid));
71 if (index >= OCRDMA_MAX_SGID)
72 return -EINVAL;
73
74 ret = ib_get_cached_gid(ibdev, port, index, sgid, NULL);
75 if (ret == -EAGAIN) {
76 memcpy(sgid, &zgid, sizeof(*sgid));
77 return 0;
78 }
79
80 return ret;
81 }
82
83 int ocrdma_add_gid(struct ib_device *device,
84 u8 port_num,
85 unsigned int index,
86 const union ib_gid *gid,
87 const struct ib_gid_attr *attr,
88 void **context) {
89 return 0;
90 }
91
92 int ocrdma_del_gid(struct ib_device *device,
93 u8 port_num,
94 unsigned int index,
95 void **context) {
96 return 0;
97 }
98
99 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
100 struct ib_udata *uhw)
101 {
102 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
103
104 if (uhw->inlen || uhw->outlen)
105 return -EINVAL;
106
107 memset(attr, 0, sizeof *attr);
108 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
109 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
110 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
111 attr->max_mr_size = dev->attr.max_mr_size;
112 attr->page_size_cap = 0xffff000;
113 attr->vendor_id = dev->nic_info.pdev->vendor;
114 attr->vendor_part_id = dev->nic_info.pdev->device;
115 attr->hw_ver = dev->asic_id;
116 attr->max_qp = dev->attr.max_qp;
117 attr->max_ah = OCRDMA_MAX_AH;
118 attr->max_qp_wr = dev->attr.max_wqe;
119
120 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
121 IB_DEVICE_RC_RNR_NAK_GEN |
122 IB_DEVICE_SHUTDOWN_PORT |
123 IB_DEVICE_SYS_IMAGE_GUID |
124 IB_DEVICE_LOCAL_DMA_LKEY |
125 IB_DEVICE_MEM_MGT_EXTENSIONS;
126 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_recv_sge);
127 attr->max_sge_rd = dev->attr.max_rdma_sge;
128 attr->max_cq = dev->attr.max_cq;
129 attr->max_cqe = dev->attr.max_cqe;
130 attr->max_mr = dev->attr.max_mr;
131 attr->max_mw = dev->attr.max_mw;
132 attr->max_pd = dev->attr.max_pd;
133 attr->atomic_cap = 0;
134 attr->max_fmr = 0;
135 attr->max_map_per_fmr = 0;
136 attr->max_qp_rd_atom =
137 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
138 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
139 attr->max_srq = dev->attr.max_srq;
140 attr->max_srq_sge = dev->attr.max_srq_sge;
141 attr->max_srq_wr = dev->attr.max_rqe;
142 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
143 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
144 attr->max_pkeys = 1;
145 return 0;
146 }
147
148 struct net_device *ocrdma_get_netdev(struct ib_device *ibdev, u8 port_num)
149 {
150 struct ocrdma_dev *dev;
151 struct net_device *ndev = NULL;
152
153 rcu_read_lock();
154
155 dev = get_ocrdma_dev(ibdev);
156 if (dev)
157 ndev = dev->nic_info.netdev;
158 if (ndev)
159 dev_hold(ndev);
160
161 rcu_read_unlock();
162
163 return ndev;
164 }
165
166 static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
167 u8 *ib_speed, u8 *ib_width)
168 {
169 int status;
170 u8 speed;
171
172 status = ocrdma_mbx_get_link_speed(dev, &speed, NULL);
173 if (status)
174 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
175
176 switch (speed) {
177 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
178 *ib_speed = IB_SPEED_SDR;
179 *ib_width = IB_WIDTH_1X;
180 break;
181
182 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
183 *ib_speed = IB_SPEED_QDR;
184 *ib_width = IB_WIDTH_1X;
185 break;
186
187 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
188 *ib_speed = IB_SPEED_DDR;
189 *ib_width = IB_WIDTH_4X;
190 break;
191
192 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
193 *ib_speed = IB_SPEED_QDR;
194 *ib_width = IB_WIDTH_4X;
195 break;
196
197 default:
198 /* Unsupported */
199 *ib_speed = IB_SPEED_SDR;
200 *ib_width = IB_WIDTH_1X;
201 }
202 }
203
204 int ocrdma_query_port(struct ib_device *ibdev,
205 u8 port, struct ib_port_attr *props)
206 {
207 enum ib_port_state port_state;
208 struct ocrdma_dev *dev;
209 struct net_device *netdev;
210
211 /* props being zeroed by the caller, avoid zeroing it here */
212 dev = get_ocrdma_dev(ibdev);
213 if (port > 1) {
214 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
215 dev->id, port);
216 return -EINVAL;
217 }
218 netdev = dev->nic_info.netdev;
219 if (netif_running(netdev) && netif_oper_up(netdev)) {
220 port_state = IB_PORT_ACTIVE;
221 props->phys_state = 5;
222 } else {
223 port_state = IB_PORT_DOWN;
224 props->phys_state = 3;
225 }
226 props->max_mtu = IB_MTU_4096;
227 props->active_mtu = iboe_get_mtu(netdev->mtu);
228 props->lid = 0;
229 props->lmc = 0;
230 props->sm_lid = 0;
231 props->sm_sl = 0;
232 props->state = port_state;
233 props->port_cap_flags =
234 IB_PORT_CM_SUP |
235 IB_PORT_REINIT_SUP |
236 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP |
237 IB_PORT_IP_BASED_GIDS;
238 props->gid_tbl_len = OCRDMA_MAX_SGID;
239 props->pkey_tbl_len = 1;
240 props->bad_pkey_cntr = 0;
241 props->qkey_viol_cntr = 0;
242 get_link_speed_and_width(dev, &props->active_speed,
243 &props->active_width);
244 props->max_msg_sz = 0x80000000;
245 props->max_vl_num = 4;
246 return 0;
247 }
248
249 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
250 struct ib_port_modify *props)
251 {
252 struct ocrdma_dev *dev;
253
254 dev = get_ocrdma_dev(ibdev);
255 if (port > 1) {
256 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
257 return -EINVAL;
258 }
259 return 0;
260 }
261
262 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
263 unsigned long len)
264 {
265 struct ocrdma_mm *mm;
266
267 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
268 if (mm == NULL)
269 return -ENOMEM;
270 mm->key.phy_addr = phy_addr;
271 mm->key.len = len;
272 INIT_LIST_HEAD(&mm->entry);
273
274 mutex_lock(&uctx->mm_list_lock);
275 list_add_tail(&mm->entry, &uctx->mm_head);
276 mutex_unlock(&uctx->mm_list_lock);
277 return 0;
278 }
279
280 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
281 unsigned long len)
282 {
283 struct ocrdma_mm *mm, *tmp;
284
285 mutex_lock(&uctx->mm_list_lock);
286 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
287 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
288 continue;
289
290 list_del(&mm->entry);
291 kfree(mm);
292 break;
293 }
294 mutex_unlock(&uctx->mm_list_lock);
295 }
296
297 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
298 unsigned long len)
299 {
300 bool found = false;
301 struct ocrdma_mm *mm;
302
303 mutex_lock(&uctx->mm_list_lock);
304 list_for_each_entry(mm, &uctx->mm_head, entry) {
305 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
306 continue;
307
308 found = true;
309 break;
310 }
311 mutex_unlock(&uctx->mm_list_lock);
312 return found;
313 }
314
315
316 static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
317 {
318 u16 pd_bitmap_idx = 0;
319 const unsigned long *pd_bitmap;
320
321 if (dpp_pool) {
322 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
323 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
324 dev->pd_mgr->max_dpp_pd);
325 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
326 dev->pd_mgr->pd_dpp_count++;
327 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
328 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
329 } else {
330 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
331 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
332 dev->pd_mgr->max_normal_pd);
333 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
334 dev->pd_mgr->pd_norm_count++;
335 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
336 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
337 }
338 return pd_bitmap_idx;
339 }
340
341 static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
342 bool dpp_pool)
343 {
344 u16 pd_count;
345 u16 pd_bit_index;
346
347 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
348 dev->pd_mgr->pd_norm_count;
349 if (pd_count == 0)
350 return -EINVAL;
351
352 if (dpp_pool) {
353 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
354 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
355 return -EINVAL;
356 } else {
357 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
358 dev->pd_mgr->pd_dpp_count--;
359 }
360 } else {
361 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
362 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
363 return -EINVAL;
364 } else {
365 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
366 dev->pd_mgr->pd_norm_count--;
367 }
368 }
369
370 return 0;
371 }
372
373 static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
374 bool dpp_pool)
375 {
376 int status;
377
378 mutex_lock(&dev->dev_lock);
379 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
380 mutex_unlock(&dev->dev_lock);
381 return status;
382 }
383
384 static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
385 {
386 u16 pd_idx = 0;
387 int status = 0;
388
389 mutex_lock(&dev->dev_lock);
390 if (pd->dpp_enabled) {
391 /* try allocating DPP PD, if not available then normal PD */
392 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
393 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
394 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
395 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
396 } else if (dev->pd_mgr->pd_norm_count <
397 dev->pd_mgr->max_normal_pd) {
398 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
399 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
400 pd->dpp_enabled = false;
401 } else {
402 status = -EINVAL;
403 }
404 } else {
405 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
406 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
407 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
408 } else {
409 status = -EINVAL;
410 }
411 }
412 mutex_unlock(&dev->dev_lock);
413 return status;
414 }
415
416 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
417 struct ocrdma_ucontext *uctx,
418 struct ib_udata *udata)
419 {
420 struct ocrdma_pd *pd = NULL;
421 int status;
422
423 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
424 if (!pd)
425 return ERR_PTR(-ENOMEM);
426
427 if (udata && uctx && dev->attr.max_dpp_pds) {
428 pd->dpp_enabled =
429 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
430 pd->num_dpp_qp =
431 pd->dpp_enabled ? (dev->nic_info.db_page_size /
432 dev->attr.wqe_size) : 0;
433 }
434
435 if (dev->pd_mgr->pd_prealloc_valid) {
436 status = ocrdma_get_pd_num(dev, pd);
437 if (status == 0) {
438 return pd;
439 } else {
440 kfree(pd);
441 return ERR_PTR(status);
442 }
443 }
444
445 retry:
446 status = ocrdma_mbx_alloc_pd(dev, pd);
447 if (status) {
448 if (pd->dpp_enabled) {
449 pd->dpp_enabled = false;
450 pd->num_dpp_qp = 0;
451 goto retry;
452 } else {
453 kfree(pd);
454 return ERR_PTR(status);
455 }
456 }
457
458 return pd;
459 }
460
461 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
462 struct ocrdma_pd *pd)
463 {
464 return (uctx->cntxt_pd == pd);
465 }
466
467 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
468 struct ocrdma_pd *pd)
469 {
470 int status;
471
472 if (dev->pd_mgr->pd_prealloc_valid)
473 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
474 else
475 status = ocrdma_mbx_dealloc_pd(dev, pd);
476
477 kfree(pd);
478 return status;
479 }
480
481 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
482 struct ocrdma_ucontext *uctx,
483 struct ib_udata *udata)
484 {
485 int status = 0;
486
487 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
488 if (IS_ERR(uctx->cntxt_pd)) {
489 status = PTR_ERR(uctx->cntxt_pd);
490 uctx->cntxt_pd = NULL;
491 goto err;
492 }
493
494 uctx->cntxt_pd->uctx = uctx;
495 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
496 err:
497 return status;
498 }
499
500 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
501 {
502 struct ocrdma_pd *pd = uctx->cntxt_pd;
503 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
504
505 if (uctx->pd_in_use) {
506 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
507 __func__, dev->id, pd->id);
508 }
509 uctx->cntxt_pd = NULL;
510 (void)_ocrdma_dealloc_pd(dev, pd);
511 return 0;
512 }
513
514 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
515 {
516 struct ocrdma_pd *pd = NULL;
517
518 mutex_lock(&uctx->mm_list_lock);
519 if (!uctx->pd_in_use) {
520 uctx->pd_in_use = true;
521 pd = uctx->cntxt_pd;
522 }
523 mutex_unlock(&uctx->mm_list_lock);
524
525 return pd;
526 }
527
528 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
529 {
530 mutex_lock(&uctx->mm_list_lock);
531 uctx->pd_in_use = false;
532 mutex_unlock(&uctx->mm_list_lock);
533 }
534
535 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
536 struct ib_udata *udata)
537 {
538 int status;
539 struct ocrdma_ucontext *ctx;
540 struct ocrdma_alloc_ucontext_resp resp;
541 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
542 struct pci_dev *pdev = dev->nic_info.pdev;
543 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
544
545 if (!udata)
546 return ERR_PTR(-EFAULT);
547 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
548 if (!ctx)
549 return ERR_PTR(-ENOMEM);
550 INIT_LIST_HEAD(&ctx->mm_head);
551 mutex_init(&ctx->mm_list_lock);
552
553 ctx->ah_tbl.va = dma_zalloc_coherent(&pdev->dev, map_len,
554 &ctx->ah_tbl.pa, GFP_KERNEL);
555 if (!ctx->ah_tbl.va) {
556 kfree(ctx);
557 return ERR_PTR(-ENOMEM);
558 }
559 ctx->ah_tbl.len = map_len;
560
561 memset(&resp, 0, sizeof(resp));
562 resp.ah_tbl_len = ctx->ah_tbl.len;
563 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
564
565 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
566 if (status)
567 goto map_err;
568
569 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
570 if (status)
571 goto pd_err;
572
573 resp.dev_id = dev->id;
574 resp.max_inline_data = dev->attr.max_inline_data;
575 resp.wqe_size = dev->attr.wqe_size;
576 resp.rqe_size = dev->attr.rqe_size;
577 resp.dpp_wqe_size = dev->attr.wqe_size;
578
579 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
580 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
581 if (status)
582 goto cpy_err;
583 return &ctx->ibucontext;
584
585 cpy_err:
586 pd_err:
587 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
588 map_err:
589 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
590 ctx->ah_tbl.pa);
591 kfree(ctx);
592 return ERR_PTR(status);
593 }
594
595 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
596 {
597 int status;
598 struct ocrdma_mm *mm, *tmp;
599 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
600 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
601 struct pci_dev *pdev = dev->nic_info.pdev;
602
603 status = ocrdma_dealloc_ucontext_pd(uctx);
604
605 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
606 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
607 uctx->ah_tbl.pa);
608
609 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
610 list_del(&mm->entry);
611 kfree(mm);
612 }
613 kfree(uctx);
614 return status;
615 }
616
617 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
618 {
619 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
620 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
621 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
622 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
623 unsigned long len = (vma->vm_end - vma->vm_start);
624 int status;
625 bool found;
626
627 if (vma->vm_start & (PAGE_SIZE - 1))
628 return -EINVAL;
629 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
630 if (!found)
631 return -EINVAL;
632
633 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
634 dev->nic_info.db_total_size)) &&
635 (len <= dev->nic_info.db_page_size)) {
636 if (vma->vm_flags & VM_READ)
637 return -EPERM;
638
639 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
640 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
641 len, vma->vm_page_prot);
642 } else if (dev->nic_info.dpp_unmapped_len &&
643 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
644 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
645 dev->nic_info.dpp_unmapped_len)) &&
646 (len <= dev->nic_info.dpp_unmapped_len)) {
647 if (vma->vm_flags & VM_READ)
648 return -EPERM;
649
650 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
651 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
652 len, vma->vm_page_prot);
653 } else {
654 status = remap_pfn_range(vma, vma->vm_start,
655 vma->vm_pgoff, len, vma->vm_page_prot);
656 }
657 return status;
658 }
659
660 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
661 struct ib_ucontext *ib_ctx,
662 struct ib_udata *udata)
663 {
664 int status;
665 u64 db_page_addr;
666 u64 dpp_page_addr = 0;
667 u32 db_page_size;
668 struct ocrdma_alloc_pd_uresp rsp;
669 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
670
671 memset(&rsp, 0, sizeof(rsp));
672 rsp.id = pd->id;
673 rsp.dpp_enabled = pd->dpp_enabled;
674 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
675 db_page_size = dev->nic_info.db_page_size;
676
677 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
678 if (status)
679 return status;
680
681 if (pd->dpp_enabled) {
682 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
683 (pd->id * PAGE_SIZE);
684 status = ocrdma_add_mmap(uctx, dpp_page_addr,
685 PAGE_SIZE);
686 if (status)
687 goto dpp_map_err;
688 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
689 rsp.dpp_page_addr_lo = dpp_page_addr;
690 }
691
692 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
693 if (status)
694 goto ucopy_err;
695
696 pd->uctx = uctx;
697 return 0;
698
699 ucopy_err:
700 if (pd->dpp_enabled)
701 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
702 dpp_map_err:
703 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
704 return status;
705 }
706
707 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
708 struct ib_ucontext *context,
709 struct ib_udata *udata)
710 {
711 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
712 struct ocrdma_pd *pd;
713 struct ocrdma_ucontext *uctx = NULL;
714 int status;
715 u8 is_uctx_pd = false;
716
717 if (udata && context) {
718 uctx = get_ocrdma_ucontext(context);
719 pd = ocrdma_get_ucontext_pd(uctx);
720 if (pd) {
721 is_uctx_pd = true;
722 goto pd_mapping;
723 }
724 }
725
726 pd = _ocrdma_alloc_pd(dev, uctx, udata);
727 if (IS_ERR(pd)) {
728 status = PTR_ERR(pd);
729 goto exit;
730 }
731
732 pd_mapping:
733 if (udata && context) {
734 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
735 if (status)
736 goto err;
737 }
738 return &pd->ibpd;
739
740 err:
741 if (is_uctx_pd) {
742 ocrdma_release_ucontext_pd(uctx);
743 } else {
744 if (_ocrdma_dealloc_pd(dev, pd))
745 pr_err("%s: _ocrdma_dealloc_pd() failed\n", __func__);
746 }
747 exit:
748 return ERR_PTR(status);
749 }
750
751 int ocrdma_dealloc_pd(struct ib_pd *ibpd)
752 {
753 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
754 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
755 struct ocrdma_ucontext *uctx = NULL;
756 int status = 0;
757 u64 usr_db;
758
759 uctx = pd->uctx;
760 if (uctx) {
761 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
762 (pd->id * PAGE_SIZE);
763 if (pd->dpp_enabled)
764 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
765 usr_db = ocrdma_get_db_addr(dev, pd->id);
766 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
767
768 if (is_ucontext_pd(uctx, pd)) {
769 ocrdma_release_ucontext_pd(uctx);
770 return status;
771 }
772 }
773 status = _ocrdma_dealloc_pd(dev, pd);
774 return status;
775 }
776
777 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
778 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
779 {
780 int status;
781
782 mr->hwmr.fr_mr = 0;
783 mr->hwmr.local_rd = 1;
784 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
785 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
786 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
787 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
788 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
789 mr->hwmr.num_pbls = num_pbls;
790
791 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
792 if (status)
793 return status;
794
795 mr->ibmr.lkey = mr->hwmr.lkey;
796 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
797 mr->ibmr.rkey = mr->hwmr.lkey;
798 return 0;
799 }
800
801 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
802 {
803 int status;
804 struct ocrdma_mr *mr;
805 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
806 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
807
808 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
809 pr_err("%s err, invalid access rights\n", __func__);
810 return ERR_PTR(-EINVAL);
811 }
812
813 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
814 if (!mr)
815 return ERR_PTR(-ENOMEM);
816
817 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
818 OCRDMA_ADDR_CHECK_DISABLE);
819 if (status) {
820 kfree(mr);
821 return ERR_PTR(status);
822 }
823
824 return &mr->ibmr;
825 }
826
827 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
828 struct ocrdma_hw_mr *mr)
829 {
830 struct pci_dev *pdev = dev->nic_info.pdev;
831 int i = 0;
832
833 if (mr->pbl_table) {
834 for (i = 0; i < mr->num_pbls; i++) {
835 if (!mr->pbl_table[i].va)
836 continue;
837 dma_free_coherent(&pdev->dev, mr->pbl_size,
838 mr->pbl_table[i].va,
839 mr->pbl_table[i].pa);
840 }
841 kfree(mr->pbl_table);
842 mr->pbl_table = NULL;
843 }
844 }
845
846 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
847 u32 num_pbes)
848 {
849 u32 num_pbls = 0;
850 u32 idx = 0;
851 int status = 0;
852 u32 pbl_size;
853
854 do {
855 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
856 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
857 status = -EFAULT;
858 break;
859 }
860 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
861 num_pbls = num_pbls / (pbl_size / sizeof(u64));
862 idx++;
863 } while (num_pbls >= dev->attr.max_num_mr_pbl);
864
865 mr->hwmr.num_pbes = num_pbes;
866 mr->hwmr.num_pbls = num_pbls;
867 mr->hwmr.pbl_size = pbl_size;
868 return status;
869 }
870
871 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
872 {
873 int status = 0;
874 int i;
875 u32 dma_len = mr->pbl_size;
876 struct pci_dev *pdev = dev->nic_info.pdev;
877 void *va;
878 dma_addr_t pa;
879
880 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
881 mr->num_pbls, GFP_KERNEL);
882
883 if (!mr->pbl_table)
884 return -ENOMEM;
885
886 for (i = 0; i < mr->num_pbls; i++) {
887 va = dma_zalloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
888 if (!va) {
889 ocrdma_free_mr_pbl_tbl(dev, mr);
890 status = -ENOMEM;
891 break;
892 }
893 mr->pbl_table[i].va = va;
894 mr->pbl_table[i].pa = pa;
895 }
896 return status;
897 }
898
899 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
900 u32 num_pbes)
901 {
902 struct ocrdma_pbe *pbe;
903 struct scatterlist *sg;
904 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
905 struct ib_umem *umem = mr->umem;
906 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
907
908 if (!mr->hwmr.num_pbes)
909 return;
910
911 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
912 pbe_cnt = 0;
913
914 shift = umem->page_shift;
915
916 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
917 pages = sg_dma_len(sg) >> shift;
918 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
919 /* store the page address in pbe */
920 pbe->pa_lo =
921 cpu_to_le32(sg_dma_address(sg) +
922 (pg_cnt << shift));
923 pbe->pa_hi =
924 cpu_to_le32(upper_32_bits(sg_dma_address(sg) +
925 (pg_cnt << shift)));
926 pbe_cnt += 1;
927 total_num_pbes += 1;
928 pbe++;
929
930 /* if done building pbes, issue the mbx cmd. */
931 if (total_num_pbes == num_pbes)
932 return;
933
934 /* if the given pbl is full storing the pbes,
935 * move to next pbl.
936 */
937 if (pbe_cnt ==
938 (mr->hwmr.pbl_size / sizeof(u64))) {
939 pbl_tbl++;
940 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
941 pbe_cnt = 0;
942 }
943
944 }
945 }
946 }
947
948 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
949 u64 usr_addr, int acc, struct ib_udata *udata)
950 {
951 int status = -ENOMEM;
952 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
953 struct ocrdma_mr *mr;
954 struct ocrdma_pd *pd;
955 u32 num_pbes;
956
957 pd = get_ocrdma_pd(ibpd);
958
959 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
960 return ERR_PTR(-EINVAL);
961
962 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
963 if (!mr)
964 return ERR_PTR(status);
965 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
966 if (IS_ERR(mr->umem)) {
967 status = -EFAULT;
968 goto umem_err;
969 }
970 num_pbes = ib_umem_page_count(mr->umem);
971 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
972 if (status)
973 goto umem_err;
974
975 mr->hwmr.pbe_size = BIT(mr->umem->page_shift);
976 mr->hwmr.fbo = ib_umem_offset(mr->umem);
977 mr->hwmr.va = usr_addr;
978 mr->hwmr.len = len;
979 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
980 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
981 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
982 mr->hwmr.local_rd = 1;
983 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
984 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
985 if (status)
986 goto umem_err;
987 build_user_pbes(dev, mr, num_pbes);
988 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
989 if (status)
990 goto mbx_err;
991 mr->ibmr.lkey = mr->hwmr.lkey;
992 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
993 mr->ibmr.rkey = mr->hwmr.lkey;
994
995 return &mr->ibmr;
996
997 mbx_err:
998 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
999 umem_err:
1000 kfree(mr);
1001 return ERR_PTR(status);
1002 }
1003
1004 int ocrdma_dereg_mr(struct ib_mr *ib_mr)
1005 {
1006 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1007 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
1008
1009 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
1010
1011 kfree(mr->pages);
1012 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
1013
1014 /* it could be user registered memory. */
1015 if (mr->umem)
1016 ib_umem_release(mr->umem);
1017 kfree(mr);
1018
1019 /* Don't stop cleanup, in case FW is unresponsive */
1020 if (dev->mqe_ctx.fw_error_state) {
1021 pr_err("%s(%d) fw not responding.\n",
1022 __func__, dev->id);
1023 }
1024 return 0;
1025 }
1026
1027 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
1028 struct ib_udata *udata,
1029 struct ib_ucontext *ib_ctx)
1030 {
1031 int status;
1032 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
1033 struct ocrdma_create_cq_uresp uresp;
1034
1035 memset(&uresp, 0, sizeof(uresp));
1036 uresp.cq_id = cq->id;
1037 uresp.page_size = PAGE_ALIGN(cq->len);
1038 uresp.num_pages = 1;
1039 uresp.max_hw_cqe = cq->max_hw_cqe;
1040 uresp.page_addr[0] = virt_to_phys(cq->va);
1041 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1042 uresp.db_page_size = dev->nic_info.db_page_size;
1043 uresp.phase_change = cq->phase_change ? 1 : 0;
1044 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1045 if (status) {
1046 pr_err("%s(%d) copy error cqid=0x%x.\n",
1047 __func__, dev->id, cq->id);
1048 goto err;
1049 }
1050 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1051 if (status)
1052 goto err;
1053 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
1054 if (status) {
1055 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1056 goto err;
1057 }
1058 cq->ucontext = uctx;
1059 err:
1060 return status;
1061 }
1062
1063 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev,
1064 const struct ib_cq_init_attr *attr,
1065 struct ib_ucontext *ib_ctx,
1066 struct ib_udata *udata)
1067 {
1068 int entries = attr->cqe;
1069 struct ocrdma_cq *cq;
1070 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
1071 struct ocrdma_ucontext *uctx = NULL;
1072 u16 pd_id = 0;
1073 int status;
1074 struct ocrdma_create_cq_ureq ureq;
1075
1076 if (attr->flags)
1077 return ERR_PTR(-EINVAL);
1078
1079 if (udata) {
1080 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1081 return ERR_PTR(-EFAULT);
1082 } else
1083 ureq.dpp_cq = 0;
1084 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
1085 if (!cq)
1086 return ERR_PTR(-ENOMEM);
1087
1088 spin_lock_init(&cq->cq_lock);
1089 spin_lock_init(&cq->comp_handler_lock);
1090 INIT_LIST_HEAD(&cq->sq_head);
1091 INIT_LIST_HEAD(&cq->rq_head);
1092
1093 if (ib_ctx) {
1094 uctx = get_ocrdma_ucontext(ib_ctx);
1095 pd_id = uctx->cntxt_pd->id;
1096 }
1097
1098 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
1099 if (status) {
1100 kfree(cq);
1101 return ERR_PTR(status);
1102 }
1103 if (ib_ctx) {
1104 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
1105 if (status)
1106 goto ctx_err;
1107 }
1108 cq->phase = OCRDMA_CQE_VALID;
1109 dev->cq_tbl[cq->id] = cq;
1110 return &cq->ibcq;
1111
1112 ctx_err:
1113 ocrdma_mbx_destroy_cq(dev, cq);
1114 kfree(cq);
1115 return ERR_PTR(status);
1116 }
1117
1118 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1119 struct ib_udata *udata)
1120 {
1121 int status = 0;
1122 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1123
1124 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1125 status = -EINVAL;
1126 return status;
1127 }
1128 ibcq->cqe = new_cnt;
1129 return status;
1130 }
1131
1132 static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1133 {
1134 int cqe_cnt;
1135 int valid_count = 0;
1136 unsigned long flags;
1137
1138 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1139 struct ocrdma_cqe *cqe = NULL;
1140
1141 cqe = cq->va;
1142 cqe_cnt = cq->cqe_cnt;
1143
1144 /* Last irq might have scheduled a polling thread
1145 * sync-up with it before hard flushing.
1146 */
1147 spin_lock_irqsave(&cq->cq_lock, flags);
1148 while (cqe_cnt) {
1149 if (is_cqe_valid(cq, cqe))
1150 valid_count++;
1151 cqe++;
1152 cqe_cnt--;
1153 }
1154 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1155 spin_unlock_irqrestore(&cq->cq_lock, flags);
1156 }
1157
1158 int ocrdma_destroy_cq(struct ib_cq *ibcq)
1159 {
1160 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1161 struct ocrdma_eq *eq = NULL;
1162 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
1163 int pdid = 0;
1164 u32 irq, indx;
1165
1166 dev->cq_tbl[cq->id] = NULL;
1167 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
1168 BUG_ON(indx == -EINVAL);
1169
1170 eq = &dev->eq_tbl[indx];
1171 irq = ocrdma_get_irq(dev, eq);
1172 synchronize_irq(irq);
1173 ocrdma_flush_cq(cq);
1174
1175 (void)ocrdma_mbx_destroy_cq(dev, cq);
1176 if (cq->ucontext) {
1177 pdid = cq->ucontext->cntxt_pd->id;
1178 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1179 PAGE_ALIGN(cq->len));
1180 ocrdma_del_mmap(cq->ucontext,
1181 ocrdma_get_db_addr(dev, pdid),
1182 dev->nic_info.db_page_size);
1183 }
1184
1185 kfree(cq);
1186 return 0;
1187 }
1188
1189 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1190 {
1191 int status = -EINVAL;
1192
1193 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1194 dev->qp_tbl[qp->id] = qp;
1195 status = 0;
1196 }
1197 return status;
1198 }
1199
1200 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1201 {
1202 dev->qp_tbl[qp->id] = NULL;
1203 }
1204
1205 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1206 struct ib_qp_init_attr *attrs)
1207 {
1208 if ((attrs->qp_type != IB_QPT_GSI) &&
1209 (attrs->qp_type != IB_QPT_RC) &&
1210 (attrs->qp_type != IB_QPT_UC) &&
1211 (attrs->qp_type != IB_QPT_UD)) {
1212 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1213 __func__, dev->id, attrs->qp_type);
1214 return -EINVAL;
1215 }
1216 /* Skip the check for QP1 to support CM size of 128 */
1217 if ((attrs->qp_type != IB_QPT_GSI) &&
1218 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
1219 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1220 __func__, dev->id, attrs->cap.max_send_wr);
1221 pr_err("%s(%d) supported send_wr=0x%x\n",
1222 __func__, dev->id, dev->attr.max_wqe);
1223 return -EINVAL;
1224 }
1225 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
1226 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1227 __func__, dev->id, attrs->cap.max_recv_wr);
1228 pr_err("%s(%d) supported recv_wr=0x%x\n",
1229 __func__, dev->id, dev->attr.max_rqe);
1230 return -EINVAL;
1231 }
1232 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
1233 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1234 __func__, dev->id, attrs->cap.max_inline_data);
1235 pr_err("%s(%d) supported inline data size=0x%x\n",
1236 __func__, dev->id, dev->attr.max_inline_data);
1237 return -EINVAL;
1238 }
1239 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
1240 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1241 __func__, dev->id, attrs->cap.max_send_sge);
1242 pr_err("%s(%d) supported send_sge=0x%x\n",
1243 __func__, dev->id, dev->attr.max_send_sge);
1244 return -EINVAL;
1245 }
1246 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
1247 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1248 __func__, dev->id, attrs->cap.max_recv_sge);
1249 pr_err("%s(%d) supported recv_sge=0x%x\n",
1250 __func__, dev->id, dev->attr.max_recv_sge);
1251 return -EINVAL;
1252 }
1253 /* unprivileged user space cannot create special QP */
1254 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
1255 pr_err
1256 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1257 __func__, dev->id, attrs->qp_type);
1258 return -EINVAL;
1259 }
1260 /* allow creating only one GSI type of QP */
1261 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
1262 pr_err("%s(%d) GSI special QPs already created.\n",
1263 __func__, dev->id);
1264 return -EINVAL;
1265 }
1266 /* verify consumer QPs are not trying to use GSI QP's CQ */
1267 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1268 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
1269 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
1270 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
1271 __func__, dev->id);
1272 return -EINVAL;
1273 }
1274 }
1275 return 0;
1276 }
1277
1278 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1279 struct ib_udata *udata, int dpp_offset,
1280 int dpp_credit_lmt, int srq)
1281 {
1282 int status;
1283 u64 usr_db;
1284 struct ocrdma_create_qp_uresp uresp;
1285 struct ocrdma_pd *pd = qp->pd;
1286 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1287
1288 memset(&uresp, 0, sizeof(uresp));
1289 usr_db = dev->nic_info.unmapped_db +
1290 (pd->id * dev->nic_info.db_page_size);
1291 uresp.qp_id = qp->id;
1292 uresp.sq_dbid = qp->sq.dbid;
1293 uresp.num_sq_pages = 1;
1294 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1295 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
1296 uresp.num_wqe_allocated = qp->sq.max_cnt;
1297 if (!srq) {
1298 uresp.rq_dbid = qp->rq.dbid;
1299 uresp.num_rq_pages = 1;
1300 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1301 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
1302 uresp.num_rqe_allocated = qp->rq.max_cnt;
1303 }
1304 uresp.db_page_addr = usr_db;
1305 uresp.db_page_size = dev->nic_info.db_page_size;
1306 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1307 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1308 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
1309
1310 if (qp->dpp_enabled) {
1311 uresp.dpp_credit = dpp_credit_lmt;
1312 uresp.dpp_offset = dpp_offset;
1313 }
1314 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1315 if (status) {
1316 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
1317 goto err;
1318 }
1319 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1320 uresp.sq_page_size);
1321 if (status)
1322 goto err;
1323
1324 if (!srq) {
1325 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1326 uresp.rq_page_size);
1327 if (status)
1328 goto rq_map_err;
1329 }
1330 return status;
1331 rq_map_err:
1332 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1333 err:
1334 return status;
1335 }
1336
1337 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1338 struct ocrdma_pd *pd)
1339 {
1340 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1341 qp->sq_db = dev->nic_info.db +
1342 (pd->id * dev->nic_info.db_page_size) +
1343 OCRDMA_DB_GEN2_SQ_OFFSET;
1344 qp->rq_db = dev->nic_info.db +
1345 (pd->id * dev->nic_info.db_page_size) +
1346 OCRDMA_DB_GEN2_RQ_OFFSET;
1347 } else {
1348 qp->sq_db = dev->nic_info.db +
1349 (pd->id * dev->nic_info.db_page_size) +
1350 OCRDMA_DB_SQ_OFFSET;
1351 qp->rq_db = dev->nic_info.db +
1352 (pd->id * dev->nic_info.db_page_size) +
1353 OCRDMA_DB_RQ_OFFSET;
1354 }
1355 }
1356
1357 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1358 {
1359 qp->wqe_wr_id_tbl =
1360 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1361 GFP_KERNEL);
1362 if (qp->wqe_wr_id_tbl == NULL)
1363 return -ENOMEM;
1364 qp->rqe_wr_id_tbl =
1365 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1366 if (qp->rqe_wr_id_tbl == NULL)
1367 return -ENOMEM;
1368
1369 return 0;
1370 }
1371
1372 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1373 struct ocrdma_pd *pd,
1374 struct ib_qp_init_attr *attrs)
1375 {
1376 qp->pd = pd;
1377 spin_lock_init(&qp->q_lock);
1378 INIT_LIST_HEAD(&qp->sq_entry);
1379 INIT_LIST_HEAD(&qp->rq_entry);
1380
1381 qp->qp_type = attrs->qp_type;
1382 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1383 qp->max_inline_data = attrs->cap.max_inline_data;
1384 qp->sq.max_sges = attrs->cap.max_send_sge;
1385 qp->rq.max_sges = attrs->cap.max_recv_sge;
1386 qp->state = OCRDMA_QPS_RST;
1387 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
1388 }
1389
1390 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1391 struct ib_qp_init_attr *attrs)
1392 {
1393 if (attrs->qp_type == IB_QPT_GSI) {
1394 dev->gsi_qp_created = 1;
1395 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1396 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1397 }
1398 }
1399
1400 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1401 struct ib_qp_init_attr *attrs,
1402 struct ib_udata *udata)
1403 {
1404 int status;
1405 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1406 struct ocrdma_qp *qp;
1407 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1408 struct ocrdma_create_qp_ureq ureq;
1409 u16 dpp_credit_lmt, dpp_offset;
1410
1411 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1412 if (status)
1413 goto gen_err;
1414
1415 memset(&ureq, 0, sizeof(ureq));
1416 if (udata) {
1417 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1418 return ERR_PTR(-EFAULT);
1419 }
1420 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1421 if (!qp) {
1422 status = -ENOMEM;
1423 goto gen_err;
1424 }
1425 ocrdma_set_qp_init_params(qp, pd, attrs);
1426 if (udata == NULL)
1427 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1428 OCRDMA_QP_FAST_REG);
1429
1430 mutex_lock(&dev->dev_lock);
1431 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1432 ureq.dpp_cq_id,
1433 &dpp_offset, &dpp_credit_lmt);
1434 if (status)
1435 goto mbx_err;
1436
1437 /* user space QP's wr_id table are managed in library */
1438 if (udata == NULL) {
1439 status = ocrdma_alloc_wr_id_tbl(qp);
1440 if (status)
1441 goto map_err;
1442 }
1443
1444 status = ocrdma_add_qpn_map(dev, qp);
1445 if (status)
1446 goto map_err;
1447 ocrdma_set_qp_db(dev, qp, pd);
1448 if (udata) {
1449 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1450 dpp_credit_lmt,
1451 (attrs->srq != NULL));
1452 if (status)
1453 goto cpy_err;
1454 }
1455 ocrdma_store_gsi_qp_cq(dev, attrs);
1456 qp->ibqp.qp_num = qp->id;
1457 mutex_unlock(&dev->dev_lock);
1458 return &qp->ibqp;
1459
1460 cpy_err:
1461 ocrdma_del_qpn_map(dev, qp);
1462 map_err:
1463 ocrdma_mbx_destroy_qp(dev, qp);
1464 mbx_err:
1465 mutex_unlock(&dev->dev_lock);
1466 kfree(qp->wqe_wr_id_tbl);
1467 kfree(qp->rqe_wr_id_tbl);
1468 kfree(qp);
1469 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
1470 gen_err:
1471 return ERR_PTR(status);
1472 }
1473
1474 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1475 int attr_mask)
1476 {
1477 int status = 0;
1478 struct ocrdma_qp *qp;
1479 struct ocrdma_dev *dev;
1480 enum ib_qp_state old_qps;
1481
1482 qp = get_ocrdma_qp(ibqp);
1483 dev = get_ocrdma_dev(ibqp->device);
1484 if (attr_mask & IB_QP_STATE)
1485 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
1486 /* if new and previous states are same hw doesn't need to
1487 * know about it.
1488 */
1489 if (status < 0)
1490 return status;
1491 return ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
1492 }
1493
1494 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1495 int attr_mask, struct ib_udata *udata)
1496 {
1497 unsigned long flags;
1498 int status = -EINVAL;
1499 struct ocrdma_qp *qp;
1500 struct ocrdma_dev *dev;
1501 enum ib_qp_state old_qps, new_qps;
1502
1503 qp = get_ocrdma_qp(ibqp);
1504 dev = get_ocrdma_dev(ibqp->device);
1505
1506 /* syncronize with multiple context trying to change, retrive qps */
1507 mutex_lock(&dev->dev_lock);
1508 /* syncronize with wqe, rqe posting and cqe processing contexts */
1509 spin_lock_irqsave(&qp->q_lock, flags);
1510 old_qps = get_ibqp_state(qp->state);
1511 if (attr_mask & IB_QP_STATE)
1512 new_qps = attr->qp_state;
1513 else
1514 new_qps = old_qps;
1515 spin_unlock_irqrestore(&qp->q_lock, flags);
1516
1517 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
1518 IB_LINK_LAYER_ETHERNET)) {
1519 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1520 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1521 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1522 old_qps, new_qps);
1523 goto param_err;
1524 }
1525
1526 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1527 if (status > 0)
1528 status = 0;
1529 param_err:
1530 mutex_unlock(&dev->dev_lock);
1531 return status;
1532 }
1533
1534 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1535 {
1536 switch (mtu) {
1537 case 256:
1538 return IB_MTU_256;
1539 case 512:
1540 return IB_MTU_512;
1541 case 1024:
1542 return IB_MTU_1024;
1543 case 2048:
1544 return IB_MTU_2048;
1545 case 4096:
1546 return IB_MTU_4096;
1547 default:
1548 return IB_MTU_1024;
1549 }
1550 }
1551
1552 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1553 {
1554 int ib_qp_acc_flags = 0;
1555
1556 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1557 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1558 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1559 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1560 return ib_qp_acc_flags;
1561 }
1562
1563 int ocrdma_query_qp(struct ib_qp *ibqp,
1564 struct ib_qp_attr *qp_attr,
1565 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1566 {
1567 int status;
1568 u32 qp_state;
1569 struct ocrdma_qp_params params;
1570 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1571 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
1572
1573 memset(&params, 0, sizeof(params));
1574 mutex_lock(&dev->dev_lock);
1575 status = ocrdma_mbx_query_qp(dev, qp, &params);
1576 mutex_unlock(&dev->dev_lock);
1577 if (status)
1578 goto mbx_err;
1579 if (qp->qp_type == IB_QPT_UD)
1580 qp_attr->qkey = params.qkey;
1581 qp_attr->path_mtu =
1582 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1583 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1584 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1585 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1586 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1587 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1588 qp_attr->dest_qp_num =
1589 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1590
1591 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1592 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1593 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1594 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1595 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
1596 qp_attr->cap.max_inline_data = qp->max_inline_data;
1597 qp_init_attr->cap = qp_attr->cap;
1598 qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
1599
1600 rdma_ah_set_grh(&qp_attr->ah_attr, NULL,
1601 params.rnt_rc_sl_fl &
1602 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK,
1603 qp->sgid_idx,
1604 (params.hop_lmt_rq_psn &
1605 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1606 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT,
1607 (params.tclass_sq_psn &
1608 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1609 OCRDMA_QP_PARAMS_TCLASS_SHIFT);
1610 rdma_ah_set_dgid_raw(&qp_attr->ah_attr, &params.dgid[0]);
1611
1612 rdma_ah_set_port_num(&qp_attr->ah_attr, 1);
1613 rdma_ah_set_sl(&qp_attr->ah_attr, (params.rnt_rc_sl_fl &
1614 OCRDMA_QP_PARAMS_SL_MASK) >>
1615 OCRDMA_QP_PARAMS_SL_SHIFT);
1616 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1617 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1618 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1619 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1620 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1621 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1622 qp_attr->retry_cnt =
1623 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1624 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1625 qp_attr->min_rnr_timer = 0;
1626 qp_attr->pkey_index = 0;
1627 qp_attr->port_num = 1;
1628 rdma_ah_set_path_bits(&qp_attr->ah_attr, 0);
1629 rdma_ah_set_static_rate(&qp_attr->ah_attr, 0);
1630 qp_attr->alt_pkey_index = 0;
1631 qp_attr->alt_port_num = 0;
1632 qp_attr->alt_timeout = 0;
1633 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1634 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1635 OCRDMA_QP_PARAMS_STATE_SHIFT;
1636 qp_attr->qp_state = get_ibqp_state(qp_state);
1637 qp_attr->cur_qp_state = qp_attr->qp_state;
1638 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1639 qp_attr->max_dest_rd_atomic =
1640 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1641 qp_attr->max_rd_atomic =
1642 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1643 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1644 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1645 /* Sync driver QP state with FW */
1646 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
1647 mbx_err:
1648 return status;
1649 }
1650
1651 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
1652 {
1653 unsigned int i = idx / 32;
1654 u32 mask = (1U << (idx % 32));
1655
1656 srq->idx_bit_fields[i] ^= mask;
1657 }
1658
1659 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1660 {
1661 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
1662 }
1663
1664 static int is_hw_sq_empty(struct ocrdma_qp *qp)
1665 {
1666 return (qp->sq.tail == qp->sq.head);
1667 }
1668
1669 static int is_hw_rq_empty(struct ocrdma_qp *qp)
1670 {
1671 return (qp->rq.tail == qp->rq.head);
1672 }
1673
1674 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1675 {
1676 return q->va + (q->head * q->entry_size);
1677 }
1678
1679 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1680 u32 idx)
1681 {
1682 return q->va + (idx * q->entry_size);
1683 }
1684
1685 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1686 {
1687 q->head = (q->head + 1) & q->max_wqe_idx;
1688 }
1689
1690 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1691 {
1692 q->tail = (q->tail + 1) & q->max_wqe_idx;
1693 }
1694
1695 /* discard the cqe for a given QP */
1696 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1697 {
1698 unsigned long cq_flags;
1699 unsigned long flags;
1700 int discard_cnt = 0;
1701 u32 cur_getp, stop_getp;
1702 struct ocrdma_cqe *cqe;
1703 u32 qpn = 0, wqe_idx = 0;
1704
1705 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1706
1707 /* traverse through the CQEs in the hw CQ,
1708 * find the matching CQE for a given qp,
1709 * mark the matching one discarded by clearing qpn.
1710 * ring the doorbell in the poll_cq() as
1711 * we don't complete out of order cqe.
1712 */
1713
1714 cur_getp = cq->getp;
1715 /* find upto when do we reap the cq. */
1716 stop_getp = cur_getp;
1717 do {
1718 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1719 break;
1720
1721 cqe = cq->va + cur_getp;
1722 /* if (a) done reaping whole hw cq, or
1723 * (b) qp_xq becomes empty.
1724 * then exit
1725 */
1726 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1727 /* if previously discarded cqe found, skip that too. */
1728 /* check for matching qp */
1729 if (qpn == 0 || qpn != qp->id)
1730 goto skip_cqe;
1731
1732 if (is_cqe_for_sq(cqe)) {
1733 ocrdma_hwq_inc_tail(&qp->sq);
1734 } else {
1735 if (qp->srq) {
1736 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1737 OCRDMA_CQE_BUFTAG_SHIFT) &
1738 qp->srq->rq.max_wqe_idx;
1739 BUG_ON(wqe_idx < 1);
1740 spin_lock_irqsave(&qp->srq->q_lock, flags);
1741 ocrdma_hwq_inc_tail(&qp->srq->rq);
1742 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
1743 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1744
1745 } else {
1746 ocrdma_hwq_inc_tail(&qp->rq);
1747 }
1748 }
1749 /* mark cqe discarded so that it is not picked up later
1750 * in the poll_cq().
1751 */
1752 discard_cnt += 1;
1753 cqe->cmn.qpn = 0;
1754 skip_cqe:
1755 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1756 } while (cur_getp != stop_getp);
1757 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1758 }
1759
1760 void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1761 {
1762 int found = false;
1763 unsigned long flags;
1764 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1765 /* sync with any active CQ poll */
1766
1767 spin_lock_irqsave(&dev->flush_q_lock, flags);
1768 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1769 if (found)
1770 list_del(&qp->sq_entry);
1771 if (!qp->srq) {
1772 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1773 if (found)
1774 list_del(&qp->rq_entry);
1775 }
1776 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1777 }
1778
1779 int ocrdma_destroy_qp(struct ib_qp *ibqp)
1780 {
1781 struct ocrdma_pd *pd;
1782 struct ocrdma_qp *qp;
1783 struct ocrdma_dev *dev;
1784 struct ib_qp_attr attrs;
1785 int attr_mask;
1786 unsigned long flags;
1787
1788 qp = get_ocrdma_qp(ibqp);
1789 dev = get_ocrdma_dev(ibqp->device);
1790
1791 pd = qp->pd;
1792
1793 /* change the QP state to ERROR */
1794 if (qp->state != OCRDMA_QPS_RST) {
1795 attrs.qp_state = IB_QPS_ERR;
1796 attr_mask = IB_QP_STATE;
1797 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1798 }
1799 /* ensure that CQEs for newly created QP (whose id may be same with
1800 * one which just getting destroyed are same), dont get
1801 * discarded until the old CQEs are discarded.
1802 */
1803 mutex_lock(&dev->dev_lock);
1804 (void) ocrdma_mbx_destroy_qp(dev, qp);
1805
1806 /*
1807 * acquire CQ lock while destroy is in progress, in order to
1808 * protect against proessing in-flight CQEs for this QP.
1809 */
1810 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
1811 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1812 spin_lock(&qp->rq_cq->cq_lock);
1813
1814 ocrdma_del_qpn_map(dev, qp);
1815
1816 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1817 spin_unlock(&qp->rq_cq->cq_lock);
1818 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
1819
1820 if (!pd->uctx) {
1821 ocrdma_discard_cqes(qp, qp->sq_cq);
1822 ocrdma_discard_cqes(qp, qp->rq_cq);
1823 }
1824 mutex_unlock(&dev->dev_lock);
1825
1826 if (pd->uctx) {
1827 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1828 PAGE_ALIGN(qp->sq.len));
1829 if (!qp->srq)
1830 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1831 PAGE_ALIGN(qp->rq.len));
1832 }
1833
1834 ocrdma_del_flush_qp(qp);
1835
1836 kfree(qp->wqe_wr_id_tbl);
1837 kfree(qp->rqe_wr_id_tbl);
1838 kfree(qp);
1839 return 0;
1840 }
1841
1842 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1843 struct ib_udata *udata)
1844 {
1845 int status;
1846 struct ocrdma_create_srq_uresp uresp;
1847
1848 memset(&uresp, 0, sizeof(uresp));
1849 uresp.rq_dbid = srq->rq.dbid;
1850 uresp.num_rq_pages = 1;
1851 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
1852 uresp.rq_page_size = srq->rq.len;
1853 uresp.db_page_addr = dev->nic_info.unmapped_db +
1854 (srq->pd->id * dev->nic_info.db_page_size);
1855 uresp.db_page_size = dev->nic_info.db_page_size;
1856 uresp.num_rqe_allocated = srq->rq.max_cnt;
1857 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1858 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1859 uresp.db_shift = 24;
1860 } else {
1861 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1862 uresp.db_shift = 16;
1863 }
1864
1865 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1866 if (status)
1867 return status;
1868 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1869 uresp.rq_page_size);
1870 if (status)
1871 return status;
1872 return status;
1873 }
1874
1875 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1876 struct ib_srq_init_attr *init_attr,
1877 struct ib_udata *udata)
1878 {
1879 int status = -ENOMEM;
1880 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1881 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1882 struct ocrdma_srq *srq;
1883
1884 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1885 return ERR_PTR(-EINVAL);
1886 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1887 return ERR_PTR(-EINVAL);
1888
1889 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1890 if (!srq)
1891 return ERR_PTR(status);
1892
1893 spin_lock_init(&srq->q_lock);
1894 srq->pd = pd;
1895 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1896 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
1897 if (status)
1898 goto err;
1899
1900 if (udata == NULL) {
1901 status = -ENOMEM;
1902 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1903 GFP_KERNEL);
1904 if (srq->rqe_wr_id_tbl == NULL)
1905 goto arm_err;
1906
1907 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1908 (srq->rq.max_cnt % 32 ? 1 : 0);
1909 srq->idx_bit_fields =
1910 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1911 if (srq->idx_bit_fields == NULL)
1912 goto arm_err;
1913 memset(srq->idx_bit_fields, 0xff,
1914 srq->bit_fields_len * sizeof(u32));
1915 }
1916
1917 if (init_attr->attr.srq_limit) {
1918 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1919 if (status)
1920 goto arm_err;
1921 }
1922
1923 if (udata) {
1924 status = ocrdma_copy_srq_uresp(dev, srq, udata);
1925 if (status)
1926 goto arm_err;
1927 }
1928
1929 return &srq->ibsrq;
1930
1931 arm_err:
1932 ocrdma_mbx_destroy_srq(dev, srq);
1933 err:
1934 kfree(srq->rqe_wr_id_tbl);
1935 kfree(srq->idx_bit_fields);
1936 kfree(srq);
1937 return ERR_PTR(status);
1938 }
1939
1940 int ocrdma_modify_srq(struct ib_srq *ibsrq,
1941 struct ib_srq_attr *srq_attr,
1942 enum ib_srq_attr_mask srq_attr_mask,
1943 struct ib_udata *udata)
1944 {
1945 int status;
1946 struct ocrdma_srq *srq;
1947
1948 srq = get_ocrdma_srq(ibsrq);
1949 if (srq_attr_mask & IB_SRQ_MAX_WR)
1950 status = -EINVAL;
1951 else
1952 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1953 return status;
1954 }
1955
1956 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1957 {
1958 int status;
1959 struct ocrdma_srq *srq;
1960
1961 srq = get_ocrdma_srq(ibsrq);
1962 status = ocrdma_mbx_query_srq(srq, srq_attr);
1963 return status;
1964 }
1965
1966 int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1967 {
1968 int status;
1969 struct ocrdma_srq *srq;
1970 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1971
1972 srq = get_ocrdma_srq(ibsrq);
1973
1974 status = ocrdma_mbx_destroy_srq(dev, srq);
1975
1976 if (srq->pd->uctx)
1977 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1978 PAGE_ALIGN(srq->rq.len));
1979
1980 kfree(srq->idx_bit_fields);
1981 kfree(srq->rqe_wr_id_tbl);
1982 kfree(srq);
1983 return status;
1984 }
1985
1986 /* unprivileged verbs and their support functions. */
1987 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1988 struct ocrdma_hdr_wqe *hdr,
1989 struct ib_send_wr *wr)
1990 {
1991 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1992 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
1993 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah);
1994
1995 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn;
1996 if (qp->qp_type == IB_QPT_GSI)
1997 ud_hdr->qkey = qp->qkey;
1998 else
1999 ud_hdr->qkey = ud_wr(wr)->remote_qkey;
2000 ud_hdr->rsvd_ahid = ah->id;
2001 ud_hdr->hdr_type = ah->hdr_type;
2002 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
2003 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
2004 }
2005
2006 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
2007 struct ocrdma_sge *sge, int num_sge,
2008 struct ib_sge *sg_list)
2009 {
2010 int i;
2011
2012 for (i = 0; i < num_sge; i++) {
2013 sge[i].lrkey = sg_list[i].lkey;
2014 sge[i].addr_lo = sg_list[i].addr;
2015 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
2016 sge[i].len = sg_list[i].length;
2017 hdr->total_len += sg_list[i].length;
2018 }
2019 if (num_sge == 0)
2020 memset(sge, 0, sizeof(*sge));
2021 }
2022
2023 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
2024 {
2025 uint32_t total_len = 0, i;
2026
2027 for (i = 0; i < num_sge; i++)
2028 total_len += sg_list[i].length;
2029 return total_len;
2030 }
2031
2032
2033 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
2034 struct ocrdma_hdr_wqe *hdr,
2035 struct ocrdma_sge *sge,
2036 struct ib_send_wr *wr, u32 wqe_size)
2037 {
2038 int i;
2039 char *dpp_addr;
2040
2041 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
2042 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
2043 if (unlikely(hdr->total_len > qp->max_inline_data)) {
2044 pr_err("%s() supported_len=0x%x,\n"
2045 " unsupported len req=0x%x\n", __func__,
2046 qp->max_inline_data, hdr->total_len);
2047 return -EINVAL;
2048 }
2049 dpp_addr = (char *)sge;
2050 for (i = 0; i < wr->num_sge; i++) {
2051 memcpy(dpp_addr,
2052 (void *)(unsigned long)wr->sg_list[i].addr,
2053 wr->sg_list[i].length);
2054 dpp_addr += wr->sg_list[i].length;
2055 }
2056
2057 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
2058 if (0 == hdr->total_len)
2059 wqe_size += sizeof(struct ocrdma_sge);
2060 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
2061 } else {
2062 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2063 if (wr->num_sge)
2064 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
2065 else
2066 wqe_size += sizeof(struct ocrdma_sge);
2067 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2068 }
2069 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2070 return 0;
2071 }
2072
2073 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2074 struct ib_send_wr *wr)
2075 {
2076 int status;
2077 struct ocrdma_sge *sge;
2078 u32 wqe_size = sizeof(*hdr);
2079
2080 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2081 ocrdma_build_ud_hdr(qp, hdr, wr);
2082 sge = (struct ocrdma_sge *)(hdr + 2);
2083 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
2084 } else {
2085 sge = (struct ocrdma_sge *)(hdr + 1);
2086 }
2087
2088 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2089 return status;
2090 }
2091
2092 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2093 struct ib_send_wr *wr)
2094 {
2095 int status;
2096 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2097 struct ocrdma_sge *sge = ext_rw + 1;
2098 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
2099
2100 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2101 if (status)
2102 return status;
2103 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2104 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2105 ext_rw->lrkey = rdma_wr(wr)->rkey;
2106 ext_rw->len = hdr->total_len;
2107 return 0;
2108 }
2109
2110 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2111 struct ib_send_wr *wr)
2112 {
2113 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2114 struct ocrdma_sge *sge = ext_rw + 1;
2115 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2116 sizeof(struct ocrdma_hdr_wqe);
2117
2118 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2119 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2120 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2121 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2122
2123 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2124 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2125 ext_rw->lrkey = rdma_wr(wr)->rkey;
2126 ext_rw->len = hdr->total_len;
2127 }
2128
2129 static int get_encoded_page_size(int pg_sz)
2130 {
2131 /* Max size is 256M 4096 << 16 */
2132 int i = 0;
2133 for (; i < 17; i++)
2134 if (pg_sz == (4096 << i))
2135 break;
2136 return i;
2137 }
2138
2139 static int ocrdma_build_reg(struct ocrdma_qp *qp,
2140 struct ocrdma_hdr_wqe *hdr,
2141 struct ib_reg_wr *wr)
2142 {
2143 u64 fbo;
2144 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2145 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr);
2146 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
2147 struct ocrdma_pbe *pbe;
2148 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2149 int num_pbes = 0, i;
2150
2151 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2152
2153 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2154 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2155
2156 if (wr->access & IB_ACCESS_LOCAL_WRITE)
2157 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2158 if (wr->access & IB_ACCESS_REMOTE_WRITE)
2159 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2160 if (wr->access & IB_ACCESS_REMOTE_READ)
2161 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2162 hdr->lkey = wr->key;
2163 hdr->total_len = mr->ibmr.length;
2164
2165 fbo = mr->ibmr.iova - mr->pages[0];
2166
2167 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova);
2168 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff);
2169 fast_reg->fbo_hi = upper_32_bits(fbo);
2170 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2171 fast_reg->num_sges = mr->npages;
2172 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size);
2173
2174 pbe = pbl_tbl->va;
2175 for (i = 0; i < mr->npages; i++) {
2176 u64 buf_addr = mr->pages[i];
2177
2178 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2179 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2180 num_pbes += 1;
2181 pbe++;
2182
2183 /* if the pbl is full storing the pbes,
2184 * move to next pbl.
2185 */
2186 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) {
2187 pbl_tbl++;
2188 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2189 }
2190 }
2191
2192 return 0;
2193 }
2194
2195 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2196 {
2197 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
2198
2199 iowrite32(val, qp->sq_db);
2200 }
2201
2202 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2203 struct ib_send_wr **bad_wr)
2204 {
2205 int status = 0;
2206 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2207 struct ocrdma_hdr_wqe *hdr;
2208 unsigned long flags;
2209
2210 spin_lock_irqsave(&qp->q_lock, flags);
2211 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2212 spin_unlock_irqrestore(&qp->q_lock, flags);
2213 *bad_wr = wr;
2214 return -EINVAL;
2215 }
2216
2217 while (wr) {
2218 if (qp->qp_type == IB_QPT_UD &&
2219 (wr->opcode != IB_WR_SEND &&
2220 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2221 *bad_wr = wr;
2222 status = -EINVAL;
2223 break;
2224 }
2225 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2226 wr->num_sge > qp->sq.max_sges) {
2227 *bad_wr = wr;
2228 status = -ENOMEM;
2229 break;
2230 }
2231 hdr = ocrdma_hwq_head(&qp->sq);
2232 hdr->cw = 0;
2233 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2234 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2235 if (wr->send_flags & IB_SEND_FENCE)
2236 hdr->cw |=
2237 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2238 if (wr->send_flags & IB_SEND_SOLICITED)
2239 hdr->cw |=
2240 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2241 hdr->total_len = 0;
2242 switch (wr->opcode) {
2243 case IB_WR_SEND_WITH_IMM:
2244 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2245 hdr->immdt = ntohl(wr->ex.imm_data);
2246 /* fall through */
2247 case IB_WR_SEND:
2248 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2249 ocrdma_build_send(qp, hdr, wr);
2250 break;
2251 case IB_WR_SEND_WITH_INV:
2252 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2253 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2254 hdr->lkey = wr->ex.invalidate_rkey;
2255 status = ocrdma_build_send(qp, hdr, wr);
2256 break;
2257 case IB_WR_RDMA_WRITE_WITH_IMM:
2258 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2259 hdr->immdt = ntohl(wr->ex.imm_data);
2260 /* fall through */
2261 case IB_WR_RDMA_WRITE:
2262 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2263 status = ocrdma_build_write(qp, hdr, wr);
2264 break;
2265 case IB_WR_RDMA_READ:
2266 ocrdma_build_read(qp, hdr, wr);
2267 break;
2268 case IB_WR_LOCAL_INV:
2269 hdr->cw |=
2270 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
2271 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2272 sizeof(struct ocrdma_sge)) /
2273 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2274 hdr->lkey = wr->ex.invalidate_rkey;
2275 break;
2276 case IB_WR_REG_MR:
2277 status = ocrdma_build_reg(qp, hdr, reg_wr(wr));
2278 break;
2279 default:
2280 status = -EINVAL;
2281 break;
2282 }
2283 if (status) {
2284 *bad_wr = wr;
2285 break;
2286 }
2287 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2288 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2289 else
2290 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2291 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2292 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2293 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2294 /* make sure wqe is written before adapter can access it */
2295 wmb();
2296 /* inform hw to start processing it */
2297 ocrdma_ring_sq_db(qp);
2298
2299 /* update pointer, counter for next wr */
2300 ocrdma_hwq_inc_head(&qp->sq);
2301 wr = wr->next;
2302 }
2303 spin_unlock_irqrestore(&qp->q_lock, flags);
2304 return status;
2305 }
2306
2307 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2308 {
2309 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
2310
2311 iowrite32(val, qp->rq_db);
2312 }
2313
2314 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2315 u16 tag)
2316 {
2317 u32 wqe_size = 0;
2318 struct ocrdma_sge *sge;
2319 if (wr->num_sge)
2320 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2321 else
2322 wqe_size = sizeof(*sge) + sizeof(*rqe);
2323
2324 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2325 OCRDMA_WQE_SIZE_SHIFT);
2326 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2327 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2328 rqe->total_len = 0;
2329 rqe->rsvd_tag = tag;
2330 sge = (struct ocrdma_sge *)(rqe + 1);
2331 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2332 ocrdma_cpu_to_le32(rqe, wqe_size);
2333 }
2334
2335 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2336 struct ib_recv_wr **bad_wr)
2337 {
2338 int status = 0;
2339 unsigned long flags;
2340 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2341 struct ocrdma_hdr_wqe *rqe;
2342
2343 spin_lock_irqsave(&qp->q_lock, flags);
2344 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2345 spin_unlock_irqrestore(&qp->q_lock, flags);
2346 *bad_wr = wr;
2347 return -EINVAL;
2348 }
2349 while (wr) {
2350 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2351 wr->num_sge > qp->rq.max_sges) {
2352 *bad_wr = wr;
2353 status = -ENOMEM;
2354 break;
2355 }
2356 rqe = ocrdma_hwq_head(&qp->rq);
2357 ocrdma_build_rqe(rqe, wr, 0);
2358
2359 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2360 /* make sure rqe is written before adapter can access it */
2361 wmb();
2362
2363 /* inform hw to start processing it */
2364 ocrdma_ring_rq_db(qp);
2365
2366 /* update pointer, counter for next wr */
2367 ocrdma_hwq_inc_head(&qp->rq);
2368 wr = wr->next;
2369 }
2370 spin_unlock_irqrestore(&qp->q_lock, flags);
2371 return status;
2372 }
2373
2374 /* cqe for srq's rqe can potentially arrive out of order.
2375 * index gives the entry in the shadow table where to store
2376 * the wr_id. tag/index is returned in cqe to reference back
2377 * for a given rqe.
2378 */
2379 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2380 {
2381 int row = 0;
2382 int indx = 0;
2383
2384 for (row = 0; row < srq->bit_fields_len; row++) {
2385 if (srq->idx_bit_fields[row]) {
2386 indx = ffs(srq->idx_bit_fields[row]);
2387 indx = (row * 32) + (indx - 1);
2388 BUG_ON(indx >= srq->rq.max_cnt);
2389 ocrdma_srq_toggle_bit(srq, indx);
2390 break;
2391 }
2392 }
2393
2394 BUG_ON(row == srq->bit_fields_len);
2395 return indx + 1; /* Use from index 1 */
2396 }
2397
2398 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2399 {
2400 u32 val = srq->rq.dbid | (1 << 16);
2401
2402 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2403 }
2404
2405 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2406 struct ib_recv_wr **bad_wr)
2407 {
2408 int status = 0;
2409 unsigned long flags;
2410 struct ocrdma_srq *srq;
2411 struct ocrdma_hdr_wqe *rqe;
2412 u16 tag;
2413
2414 srq = get_ocrdma_srq(ibsrq);
2415
2416 spin_lock_irqsave(&srq->q_lock, flags);
2417 while (wr) {
2418 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2419 wr->num_sge > srq->rq.max_sges) {
2420 status = -ENOMEM;
2421 *bad_wr = wr;
2422 break;
2423 }
2424 tag = ocrdma_srq_get_idx(srq);
2425 rqe = ocrdma_hwq_head(&srq->rq);
2426 ocrdma_build_rqe(rqe, wr, tag);
2427
2428 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2429 /* make sure rqe is written before adapter can perform DMA */
2430 wmb();
2431 /* inform hw to start processing it */
2432 ocrdma_ring_srq_db(srq);
2433 /* update pointer, counter for next wr */
2434 ocrdma_hwq_inc_head(&srq->rq);
2435 wr = wr->next;
2436 }
2437 spin_unlock_irqrestore(&srq->q_lock, flags);
2438 return status;
2439 }
2440
2441 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2442 {
2443 enum ib_wc_status ibwc_status;
2444
2445 switch (status) {
2446 case OCRDMA_CQE_GENERAL_ERR:
2447 ibwc_status = IB_WC_GENERAL_ERR;
2448 break;
2449 case OCRDMA_CQE_LOC_LEN_ERR:
2450 ibwc_status = IB_WC_LOC_LEN_ERR;
2451 break;
2452 case OCRDMA_CQE_LOC_QP_OP_ERR:
2453 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2454 break;
2455 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2456 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2457 break;
2458 case OCRDMA_CQE_LOC_PROT_ERR:
2459 ibwc_status = IB_WC_LOC_PROT_ERR;
2460 break;
2461 case OCRDMA_CQE_WR_FLUSH_ERR:
2462 ibwc_status = IB_WC_WR_FLUSH_ERR;
2463 break;
2464 case OCRDMA_CQE_MW_BIND_ERR:
2465 ibwc_status = IB_WC_MW_BIND_ERR;
2466 break;
2467 case OCRDMA_CQE_BAD_RESP_ERR:
2468 ibwc_status = IB_WC_BAD_RESP_ERR;
2469 break;
2470 case OCRDMA_CQE_LOC_ACCESS_ERR:
2471 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2472 break;
2473 case OCRDMA_CQE_REM_INV_REQ_ERR:
2474 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2475 break;
2476 case OCRDMA_CQE_REM_ACCESS_ERR:
2477 ibwc_status = IB_WC_REM_ACCESS_ERR;
2478 break;
2479 case OCRDMA_CQE_REM_OP_ERR:
2480 ibwc_status = IB_WC_REM_OP_ERR;
2481 break;
2482 case OCRDMA_CQE_RETRY_EXC_ERR:
2483 ibwc_status = IB_WC_RETRY_EXC_ERR;
2484 break;
2485 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2486 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2487 break;
2488 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2489 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2490 break;
2491 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2492 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2493 break;
2494 case OCRDMA_CQE_REM_ABORT_ERR:
2495 ibwc_status = IB_WC_REM_ABORT_ERR;
2496 break;
2497 case OCRDMA_CQE_INV_EECN_ERR:
2498 ibwc_status = IB_WC_INV_EECN_ERR;
2499 break;
2500 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2501 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2502 break;
2503 case OCRDMA_CQE_FATAL_ERR:
2504 ibwc_status = IB_WC_FATAL_ERR;
2505 break;
2506 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2507 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2508 break;
2509 default:
2510 ibwc_status = IB_WC_GENERAL_ERR;
2511 break;
2512 }
2513 return ibwc_status;
2514 }
2515
2516 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2517 u32 wqe_idx)
2518 {
2519 struct ocrdma_hdr_wqe *hdr;
2520 struct ocrdma_sge *rw;
2521 int opcode;
2522
2523 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2524
2525 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2526 /* Undo the hdr->cw swap */
2527 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2528 switch (opcode) {
2529 case OCRDMA_WRITE:
2530 ibwc->opcode = IB_WC_RDMA_WRITE;
2531 break;
2532 case OCRDMA_READ:
2533 rw = (struct ocrdma_sge *)(hdr + 1);
2534 ibwc->opcode = IB_WC_RDMA_READ;
2535 ibwc->byte_len = rw->len;
2536 break;
2537 case OCRDMA_SEND:
2538 ibwc->opcode = IB_WC_SEND;
2539 break;
2540 case OCRDMA_FR_MR:
2541 ibwc->opcode = IB_WC_REG_MR;
2542 break;
2543 case OCRDMA_LKEY_INV:
2544 ibwc->opcode = IB_WC_LOCAL_INV;
2545 break;
2546 default:
2547 ibwc->status = IB_WC_GENERAL_ERR;
2548 pr_err("%s() invalid opcode received = 0x%x\n",
2549 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
2550 break;
2551 }
2552 }
2553
2554 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2555 struct ocrdma_cqe *cqe)
2556 {
2557 if (is_cqe_for_sq(cqe)) {
2558 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2559 cqe->flags_status_srcqpn) &
2560 ~OCRDMA_CQE_STATUS_MASK);
2561 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2562 cqe->flags_status_srcqpn) |
2563 (OCRDMA_CQE_WR_FLUSH_ERR <<
2564 OCRDMA_CQE_STATUS_SHIFT));
2565 } else {
2566 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2567 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2568 cqe->flags_status_srcqpn) &
2569 ~OCRDMA_CQE_UD_STATUS_MASK);
2570 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2571 cqe->flags_status_srcqpn) |
2572 (OCRDMA_CQE_WR_FLUSH_ERR <<
2573 OCRDMA_CQE_UD_STATUS_SHIFT));
2574 } else {
2575 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2576 cqe->flags_status_srcqpn) &
2577 ~OCRDMA_CQE_STATUS_MASK);
2578 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2579 cqe->flags_status_srcqpn) |
2580 (OCRDMA_CQE_WR_FLUSH_ERR <<
2581 OCRDMA_CQE_STATUS_SHIFT));
2582 }
2583 }
2584 }
2585
2586 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2587 struct ocrdma_qp *qp, int status)
2588 {
2589 bool expand = false;
2590
2591 ibwc->byte_len = 0;
2592 ibwc->qp = &qp->ibqp;
2593 ibwc->status = ocrdma_to_ibwc_err(status);
2594
2595 ocrdma_flush_qp(qp);
2596 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
2597
2598 /* if wqe/rqe pending for which cqe needs to be returned,
2599 * trigger inflating it.
2600 */
2601 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2602 expand = true;
2603 ocrdma_set_cqe_status_flushed(qp, cqe);
2604 }
2605 return expand;
2606 }
2607
2608 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2609 struct ocrdma_qp *qp, int status)
2610 {
2611 ibwc->opcode = IB_WC_RECV;
2612 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2613 ocrdma_hwq_inc_tail(&qp->rq);
2614
2615 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2616 }
2617
2618 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2619 struct ocrdma_qp *qp, int status)
2620 {
2621 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2622 ocrdma_hwq_inc_tail(&qp->sq);
2623
2624 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2625 }
2626
2627
2628 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2629 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2630 bool *polled, bool *stop)
2631 {
2632 bool expand;
2633 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2634 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2635 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2636 if (status < OCRDMA_MAX_CQE_ERR)
2637 atomic_inc(&dev->cqe_err_stats[status]);
2638
2639 /* when hw sq is empty, but rq is not empty, so we continue
2640 * to keep the cqe in order to get the cq event again.
2641 */
2642 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2643 /* when cq for rq and sq is same, it is safe to return
2644 * flush cqe for RQEs.
2645 */
2646 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2647 *polled = true;
2648 status = OCRDMA_CQE_WR_FLUSH_ERR;
2649 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2650 } else {
2651 /* stop processing further cqe as this cqe is used for
2652 * triggering cq event on buddy cq of RQ.
2653 * When QP is destroyed, this cqe will be removed
2654 * from the cq's hardware q.
2655 */
2656 *polled = false;
2657 *stop = true;
2658 expand = false;
2659 }
2660 } else if (is_hw_sq_empty(qp)) {
2661 /* Do nothing */
2662 expand = false;
2663 *polled = false;
2664 *stop = false;
2665 } else {
2666 *polled = true;
2667 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2668 }
2669 return expand;
2670 }
2671
2672 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2673 struct ocrdma_cqe *cqe,
2674 struct ib_wc *ibwc, bool *polled)
2675 {
2676 bool expand = false;
2677 int tail = qp->sq.tail;
2678 u32 wqe_idx;
2679
2680 if (!qp->wqe_wr_id_tbl[tail].signaled) {
2681 *polled = false; /* WC cannot be consumed yet */
2682 } else {
2683 ibwc->status = IB_WC_SUCCESS;
2684 ibwc->wc_flags = 0;
2685 ibwc->qp = &qp->ibqp;
2686 ocrdma_update_wc(qp, ibwc, tail);
2687 *polled = true;
2688 }
2689 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2690 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
2691 if (tail != wqe_idx)
2692 expand = true; /* Coalesced CQE can't be consumed yet */
2693
2694 ocrdma_hwq_inc_tail(&qp->sq);
2695 return expand;
2696 }
2697
2698 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2699 struct ib_wc *ibwc, bool *polled, bool *stop)
2700 {
2701 int status;
2702 bool expand;
2703
2704 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2705 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2706
2707 if (status == OCRDMA_CQE_SUCCESS)
2708 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2709 else
2710 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2711 return expand;
2712 }
2713
2714 static int ocrdma_update_ud_rcqe(struct ocrdma_dev *dev, struct ib_wc *ibwc,
2715 struct ocrdma_cqe *cqe)
2716 {
2717 int status;
2718 u16 hdr_type = 0;
2719
2720 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2721 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2722 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2723 OCRDMA_CQE_SRCQP_MASK;
2724 ibwc->pkey_index = 0;
2725 ibwc->wc_flags = IB_WC_GRH;
2726 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2727 OCRDMA_CQE_UD_XFER_LEN_SHIFT) &
2728 OCRDMA_CQE_UD_XFER_LEN_MASK;
2729
2730 if (ocrdma_is_udp_encap_supported(dev)) {
2731 hdr_type = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2732 OCRDMA_CQE_UD_L3TYPE_SHIFT) &
2733 OCRDMA_CQE_UD_L3TYPE_MASK;
2734 ibwc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE;
2735 ibwc->network_hdr_type = hdr_type;
2736 }
2737
2738 return status;
2739 }
2740
2741 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2742 struct ocrdma_cqe *cqe,
2743 struct ocrdma_qp *qp)
2744 {
2745 unsigned long flags;
2746 struct ocrdma_srq *srq;
2747 u32 wqe_idx;
2748
2749 srq = get_ocrdma_srq(qp->ibqp.srq);
2750 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2751 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
2752 BUG_ON(wqe_idx < 1);
2753
2754 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2755 spin_lock_irqsave(&srq->q_lock, flags);
2756 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
2757 spin_unlock_irqrestore(&srq->q_lock, flags);
2758 ocrdma_hwq_inc_tail(&srq->rq);
2759 }
2760
2761 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2762 struct ib_wc *ibwc, bool *polled, bool *stop,
2763 int status)
2764 {
2765 bool expand;
2766 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2767
2768 if (status < OCRDMA_MAX_CQE_ERR)
2769 atomic_inc(&dev->cqe_err_stats[status]);
2770
2771 /* when hw_rq is empty, but wq is not empty, so continue
2772 * to keep the cqe to get the cq event again.
2773 */
2774 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2775 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2776 *polled = true;
2777 status = OCRDMA_CQE_WR_FLUSH_ERR;
2778 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2779 } else {
2780 *polled = false;
2781 *stop = true;
2782 expand = false;
2783 }
2784 } else if (is_hw_rq_empty(qp)) {
2785 /* Do nothing */
2786 expand = false;
2787 *polled = false;
2788 *stop = false;
2789 } else {
2790 *polled = true;
2791 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2792 }
2793 return expand;
2794 }
2795
2796 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2797 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2798 {
2799 struct ocrdma_dev *dev;
2800
2801 dev = get_ocrdma_dev(qp->ibqp.device);
2802 ibwc->opcode = IB_WC_RECV;
2803 ibwc->qp = &qp->ibqp;
2804 ibwc->status = IB_WC_SUCCESS;
2805
2806 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2807 ocrdma_update_ud_rcqe(dev, ibwc, cqe);
2808 else
2809 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2810
2811 if (is_cqe_imm(cqe)) {
2812 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2813 ibwc->wc_flags |= IB_WC_WITH_IMM;
2814 } else if (is_cqe_wr_imm(cqe)) {
2815 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2816 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2817 ibwc->wc_flags |= IB_WC_WITH_IMM;
2818 } else if (is_cqe_invalidated(cqe)) {
2819 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2820 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2821 }
2822 if (qp->ibqp.srq) {
2823 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
2824 } else {
2825 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2826 ocrdma_hwq_inc_tail(&qp->rq);
2827 }
2828 }
2829
2830 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2831 struct ib_wc *ibwc, bool *polled, bool *stop)
2832 {
2833 int status;
2834 bool expand = false;
2835
2836 ibwc->wc_flags = 0;
2837 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2838 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2839 OCRDMA_CQE_UD_STATUS_MASK) >>
2840 OCRDMA_CQE_UD_STATUS_SHIFT;
2841 } else {
2842 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2843 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2844 }
2845
2846 if (status == OCRDMA_CQE_SUCCESS) {
2847 *polled = true;
2848 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2849 } else {
2850 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2851 status);
2852 }
2853 return expand;
2854 }
2855
2856 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2857 u16 cur_getp)
2858 {
2859 if (cq->phase_change) {
2860 if (cur_getp == 0)
2861 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
2862 } else {
2863 /* clear valid bit */
2864 cqe->flags_status_srcqpn = 0;
2865 }
2866 }
2867
2868 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2869 struct ib_wc *ibwc)
2870 {
2871 u16 qpn = 0;
2872 int i = 0;
2873 bool expand = false;
2874 int polled_hw_cqes = 0;
2875 struct ocrdma_qp *qp = NULL;
2876 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
2877 struct ocrdma_cqe *cqe;
2878 u16 cur_getp; bool polled = false; bool stop = false;
2879
2880 cur_getp = cq->getp;
2881 while (num_entries) {
2882 cqe = cq->va + cur_getp;
2883 /* check whether valid cqe or not */
2884 if (!is_cqe_valid(cq, cqe))
2885 break;
2886 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2887 /* ignore discarded cqe */
2888 if (qpn == 0)
2889 goto skip_cqe;
2890 qp = dev->qp_tbl[qpn];
2891 BUG_ON(qp == NULL);
2892
2893 if (is_cqe_for_sq(cqe)) {
2894 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2895 &stop);
2896 } else {
2897 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2898 &stop);
2899 }
2900 if (expand)
2901 goto expand_cqe;
2902 if (stop)
2903 goto stop_cqe;
2904 /* clear qpn to avoid duplicate processing by discard_cqe() */
2905 cqe->cmn.qpn = 0;
2906 skip_cqe:
2907 polled_hw_cqes += 1;
2908 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2909 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2910 expand_cqe:
2911 if (polled) {
2912 num_entries -= 1;
2913 i += 1;
2914 ibwc = ibwc + 1;
2915 polled = false;
2916 }
2917 }
2918 stop_cqe:
2919 cq->getp = cur_getp;
2920
2921 if (polled_hw_cqes)
2922 ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes);
2923
2924 return i;
2925 }
2926
2927 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2928 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2929 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2930 {
2931 int err_cqes = 0;
2932
2933 while (num_entries) {
2934 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2935 break;
2936 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2937 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2938 ocrdma_hwq_inc_tail(&qp->sq);
2939 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2940 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2941 ocrdma_hwq_inc_tail(&qp->rq);
2942 } else {
2943 return err_cqes;
2944 }
2945 ibwc->byte_len = 0;
2946 ibwc->status = IB_WC_WR_FLUSH_ERR;
2947 ibwc = ibwc + 1;
2948 err_cqes += 1;
2949 num_entries -= 1;
2950 }
2951 return err_cqes;
2952 }
2953
2954 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2955 {
2956 int cqes_to_poll = num_entries;
2957 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2958 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2959 int num_os_cqe = 0, err_cqes = 0;
2960 struct ocrdma_qp *qp;
2961 unsigned long flags;
2962
2963 /* poll cqes from adapter CQ */
2964 spin_lock_irqsave(&cq->cq_lock, flags);
2965 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2966 spin_unlock_irqrestore(&cq->cq_lock, flags);
2967 cqes_to_poll -= num_os_cqe;
2968
2969 if (cqes_to_poll) {
2970 wc = wc + num_os_cqe;
2971 /* adapter returns single error cqe when qp moves to
2972 * error state. So insert error cqes with wc_status as
2973 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2974 * respectively which uses this CQ.
2975 */
2976 spin_lock_irqsave(&dev->flush_q_lock, flags);
2977 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2978 if (cqes_to_poll == 0)
2979 break;
2980 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2981 cqes_to_poll -= err_cqes;
2982 num_os_cqe += err_cqes;
2983 wc = wc + err_cqes;
2984 }
2985 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2986 }
2987 return num_os_cqe;
2988 }
2989
2990 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2991 {
2992 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2993 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2994 u16 cq_id;
2995 unsigned long flags;
2996 bool arm_needed = false, sol_needed = false;
2997
2998 cq_id = cq->id;
2999
3000 spin_lock_irqsave(&cq->cq_lock, flags);
3001 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
3002 arm_needed = true;
3003 if (cq_flags & IB_CQ_SOLICITED)
3004 sol_needed = true;
3005
3006 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
3007 spin_unlock_irqrestore(&cq->cq_lock, flags);
3008
3009 return 0;
3010 }
3011
3012 struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd,
3013 enum ib_mr_type mr_type,
3014 u32 max_num_sg)
3015 {
3016 int status;
3017 struct ocrdma_mr *mr;
3018 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3019 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3020
3021 if (mr_type != IB_MR_TYPE_MEM_REG)
3022 return ERR_PTR(-EINVAL);
3023
3024 if (max_num_sg > dev->attr.max_pages_per_frmr)
3025 return ERR_PTR(-EINVAL);
3026
3027 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3028 if (!mr)
3029 return ERR_PTR(-ENOMEM);
3030
3031 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
3032 if (!mr->pages) {
3033 status = -ENOMEM;
3034 goto pl_err;
3035 }
3036
3037 status = ocrdma_get_pbl_info(dev, mr, max_num_sg);
3038 if (status)
3039 goto pbl_err;
3040 mr->hwmr.fr_mr = 1;
3041 mr->hwmr.remote_rd = 0;
3042 mr->hwmr.remote_wr = 0;
3043 mr->hwmr.local_rd = 0;
3044 mr->hwmr.local_wr = 0;
3045 mr->hwmr.mw_bind = 0;
3046 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3047 if (status)
3048 goto pbl_err;
3049 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
3050 if (status)
3051 goto mbx_err;
3052 mr->ibmr.rkey = mr->hwmr.lkey;
3053 mr->ibmr.lkey = mr->hwmr.lkey;
3054 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
3055 (unsigned long) mr;
3056 return &mr->ibmr;
3057 mbx_err:
3058 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3059 pbl_err:
3060 kfree(mr->pages);
3061 pl_err:
3062 kfree(mr);
3063 return ERR_PTR(-ENOMEM);
3064 }
3065
3066 static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr)
3067 {
3068 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3069
3070 if (unlikely(mr->npages == mr->hwmr.num_pbes))
3071 return -ENOMEM;
3072
3073 mr->pages[mr->npages++] = addr;
3074
3075 return 0;
3076 }
3077
3078 int ocrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
3079 unsigned int *sg_offset)
3080 {
3081 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3082
3083 mr->npages = 0;
3084
3085 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, ocrdma_set_page);
3086 }
CRIS linux kernel tree