drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29
  30 #include "ixgbe.h"
  31 #include "ixgbe_type.h"
  32 #include "ixgbe_dcb.h"
  33 #include "ixgbe_dcb_82598.h"
  34 #include "ixgbe_dcb_82599.h"
  35
  36 /**
  37  * ixgbe_ieee_credits - This calculates the ieee traffic class
  38  * credits from the configured bandwidth percentages. Credits
  39  * are the smallest unit programmable into the underlying
  40  * hardware. The IEEE 802.1Qaz specification do not use bandwidth
  41  * groups so this is much simplified from the CEE case.
  42  * @bw: bandwidth index by traffic class
  43  * @refill: refill credits index by traffic class
  44  * @max: max credits by traffic class
  45  * @max_frame: maximum frame size
  46  */
  47 static s32 ixgbe_ieee_credits(__u8 *bw, __u16 *refill,
  48                               __u16 *max, int max_frame)
  49 {
  50         int min_percent = 100;
  51         int min_credit, multiplier;
  52         int i;
  53
  54         min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) /
  55                         DCB_CREDIT_QUANTUM;
  56
  57         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
  58                 if (bw[i] < min_percent && bw[i])
  59                         min_percent = bw[i];
  60         }
  61
  62         multiplier = (min_credit / min_percent) + 1;
  63
  64         /* Find out the hw credits for each TC */
  65         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
  66                 int val = min(bw[i] * multiplier, MAX_CREDIT_REFILL);
  67
  68                 if (val < min_credit)
  69                         val = min_credit;
  70                 refill[i] = val;
  71
  72                 max[i] = bw[i] ? (bw[i] * MAX_CREDIT)/100 : min_credit;
  73         }
  74         return 0;
  75 }
  76
  77 /**
  78  * ixgbe_dcb_calculate_tc_credits - Calculates traffic class credits
  79  * @hw: pointer to hardware structure
  80  * @dcb_config: Struct containing DCB settings
  81  * @max_frame: Maximum frame size
  82  * @direction: Configuring either Tx or Rx
  83  *
  84  * This function calculates the credits allocated to each traffic class.
  85  * It should be called only after the rules are checked by
  86  * ixgbe_dcb_check_config().
  87  */
  88 s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *hw,
  89                                    struct ixgbe_dcb_config *dcb_config,
  90                                    int max_frame, u8 direction)
  91 {
  92         struct tc_bw_alloc *p;
  93         int min_credit;
  94         int min_multiplier;
  95         int min_percent = 100;
  96         /* Initialization values default for Tx settings */
  97         u32 credit_refill       = 0;
  98         u32 credit_max          = 0;
  99         u16 link_percentage     = 0;
 100         u8  bw_percent          = 0;
 101         u8  i;
 102
 103         if (!dcb_config)
 104                 return DCB_ERR_CONFIG;
 105
 106         min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) /
 107                         DCB_CREDIT_QUANTUM;
 108
 109         /* Find smallest link percentage */
 110         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
 111                 p = &dcb_config->tc_config[i].path[direction];
 112                 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
 113                 link_percentage = p->bwg_percent;
 114
 115                 link_percentage = (link_percentage * bw_percent) / 100;
 116
 117                 if (link_percentage && link_percentage < min_percent)
 118                         min_percent = link_percentage;
 119         }
 120
 121         /*
 122          * The ratio between traffic classes will control the bandwidth
 123          * percentages seen on the wire. To calculate this ratio we use
 124          * a multiplier. It is required that the refill credits must be
 125          * larger than the max frame size so here we find the smallest
 126          * multiplier that will allow all bandwidth percentages to be
 127          * greater than the max frame size.
 128          */
 129         min_multiplier = (min_credit / min_percent) + 1;
 130
 131         /* Find out the link percentage for each TC first */
 132         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
 133                 p = &dcb_config->tc_config[i].path[direction];
 134                 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
 135
 136                 link_percentage = p->bwg_percent;
 137                 /* Must be careful of integer division for very small nums */
 138                 link_percentage = (link_percentage * bw_percent) / 100;
 139                 if (p->bwg_percent > 0 && link_percentage == 0)
 140                         link_percentage = 1;
 141
 142                 /* Save link_percentage for reference */
 143                 p->link_percent = (u8)link_percentage;
 144
 145                 /* Calculate credit refill ratio using multiplier */
 146                 credit_refill = min(link_percentage * min_multiplier,
 147                                     MAX_CREDIT_REFILL);
 148
 149                 /* Refill at least minimum credit */
 150                 if (credit_refill < min_credit)
 151                         credit_refill = min_credit;
 152
 153                 p->data_credits_refill = (u16)credit_refill;
 154
 155                 /* Calculate maximum credit for the TC */
 156                 credit_max = (link_percentage * MAX_CREDIT) / 100;
 157
 158                 /*
 159                  * Adjustment based on rule checking, if the percentage
 160                  * of a TC is too small, the maximum credit may not be
 161                  * enough to send out a jumbo frame in data plane arbitration.
 162                  */
 163                 if (credit_max < min_credit)
 164                         credit_max = min_credit;
 165
 166                 if (direction == DCB_TX_CONFIG) {
 167                         /*
 168                          * Adjustment based on rule checking, if the
 169                          * percentage of a TC is too small, the maximum
 170                          * credit may not be enough to send out a TSO
 171                          * packet in descriptor plane arbitration.
 172                          */
 173                         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 174                             credit_max &&
 175                             (credit_max < MINIMUM_CREDIT_FOR_TSO))
 176                                 credit_max = MINIMUM_CREDIT_FOR_TSO;
 177
 178                         dcb_config->tc_config[i].desc_credits_max =
 179                                 (u16)credit_max;
 180                 }
 181
 182                 p->data_credits_max = (u16)credit_max;
 183         }
 184
 185         return 0;
 186 }
 187
 188 void ixgbe_dcb_unpack_pfc(struct ixgbe_dcb_config *cfg, u8 *pfc_en)
 189 {
 190         struct tc_configuration *tc_config = &cfg->tc_config[0];
 191         int tc;
 192
 193         for (*pfc_en = 0, tc = 0; tc < MAX_TRAFFIC_CLASS; tc++) {
 194                 if (tc_config[tc].dcb_pfc != pfc_disabled)
 195                         *pfc_en |= BIT(tc);
 196         }
 197 }
 198
 199 void ixgbe_dcb_unpack_refill(struct ixgbe_dcb_config *cfg, int direction,
 200                              u16 *refill)
 201 {
 202         struct tc_configuration *tc_config = &cfg->tc_config[0];
 203         int tc;
 204
 205         for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
 206                 refill[tc] = tc_config[tc].path[direction].data_credits_refill;
 207 }
 208
 209 void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *cfg, u16 *max)
 210 {
 211         struct tc_configuration *tc_config = &cfg->tc_config[0];
 212         int tc;
 213
 214         for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
 215                 max[tc] = tc_config[tc].desc_credits_max;
 216 }
 217
 218 void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *cfg, int direction,
 219                             u8 *bwgid)
 220 {
 221         struct tc_configuration *tc_config = &cfg->tc_config[0];
 222         int tc;
 223
 224         for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
 225                 bwgid[tc] = tc_config[tc].path[direction].bwg_id;
 226 }
 227
 228 void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction,
 229                             u8 *ptype)
 230 {
 231         struct tc_configuration *tc_config = &cfg->tc_config[0];
 232         int tc;
 233
 234         for (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++)
 235                 ptype[tc] = tc_config[tc].path[direction].prio_type;
 236 }
 237
 238 u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up)
 239 {
 240         struct tc_configuration *tc_config = &cfg->tc_config[0];
 241         u8 prio_mask = BIT(up);
 242         u8 tc = cfg->num_tcs.pg_tcs;
 243
 244         /* If tc is 0 then DCB is likely not enabled or supported */
 245         if (!tc)
 246                 return 0;
 247
 248         /*
 249          * Test from maximum TC to 1 and report the first match we find.  If
 250          * we find no match we can assume that the TC is 0 since the TC must
 251          * be set for all user priorities
 252          */
 253         for (tc--; tc; tc--) {
 254                 if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap)
 255                         break;
 256         }
 257
 258         return tc;
 259 }
 260
 261 void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *cfg, int direction, u8 *map)
 262 {
 263         u8 up;
 264
 265         for (up = 0; up < MAX_USER_PRIORITY; up++)
 266                 map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up);
 267 }
 268
 269 /**
 270  * ixgbe_dcb_hw_config - Config and enable DCB
 271  * @hw: pointer to hardware structure
 272  * @dcb_config: pointer to ixgbe_dcb_config structure
 273  *
 274  * Configure dcb settings and enable dcb mode.
 275  */
 276 s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
 277                         struct ixgbe_dcb_config *dcb_config)
 278 {
 279         u8 pfc_en;
 280         u8 ptype[MAX_TRAFFIC_CLASS];
 281         u8 bwgid[MAX_TRAFFIC_CLASS];
 282         u8 prio_tc[MAX_TRAFFIC_CLASS];
 283         u16 refill[MAX_TRAFFIC_CLASS];
 284         u16 max[MAX_TRAFFIC_CLASS];
 285
 286         /* Unpack CEE standard containers */
 287         ixgbe_dcb_unpack_pfc(dcb_config, &pfc_en);
 288         ixgbe_dcb_unpack_refill(dcb_config, DCB_TX_CONFIG, refill);
 289         ixgbe_dcb_unpack_max(dcb_config, max);
 290         ixgbe_dcb_unpack_bwgid(dcb_config, DCB_TX_CONFIG, bwgid);
 291         ixgbe_dcb_unpack_prio(dcb_config, DCB_TX_CONFIG, ptype);
 292         ixgbe_dcb_unpack_map(dcb_config, DCB_TX_CONFIG, prio_tc);
 293
 294         switch (hw->mac.type) {
 295         case ixgbe_mac_82598EB:
 296                 return ixgbe_dcb_hw_config_82598(hw, pfc_en, refill, max,
 297                                                  bwgid, ptype);
 298         case ixgbe_mac_82599EB:
 299         case ixgbe_mac_X540:
 300         case ixgbe_mac_X550:
 301         case ixgbe_mac_X550EM_x:
 302         case ixgbe_mac_x550em_a:
 303                 return ixgbe_dcb_hw_config_82599(hw, pfc_en, refill, max,
 304                                                  bwgid, ptype, prio_tc);
 305         default:
 306                 break;
 307         }
 308         return 0;
 309 }
 310
 311 /* Helper routines to abstract HW specifics from DCB netlink ops */
 312 s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)
 313 {
 314         switch (hw->mac.type) {
 315         case ixgbe_mac_82598EB:
 316                 return ixgbe_dcb_config_pfc_82598(hw, pfc_en);
 317         case ixgbe_mac_82599EB:
 318         case ixgbe_mac_X540:
 319         case ixgbe_mac_X550:
 320         case ixgbe_mac_X550EM_x:
 321         case ixgbe_mac_x550em_a:
 322                 return ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc);
 323         default:
 324                 break;
 325         }
 326         return -EINVAL;
 327 }
 328
 329 s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max_frame)
 330 {
 331         __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
 332         __u8 prio_type[IEEE_8021QAZ_MAX_TCS];
 333         int i;
 334
 335         /* naively give each TC a bwg to map onto CEE hardware */
 336         __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
 337
 338         /* Map TSA onto CEE prio type */
 339         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 340                 switch (ets->tc_tsa[i]) {
 341                 case IEEE_8021QAZ_TSA_STRICT:
 342                         prio_type[i] = 2;
 343                         break;
 344                 case IEEE_8021QAZ_TSA_ETS:
 345                         prio_type[i] = 0;
 346                         break;
 347                 default:
 348                         /* Hardware only supports priority strict or
 349                          * ETS transmission selection algorithms if
 350                          * we receive some other value from dcbnl
 351                          * throw an error
 352                          */
 353                         return -EINVAL;
 354                 }
 355         }
 356
 357         ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
 358         return ixgbe_dcb_hw_ets_config(hw, refill, max,
 359                                        bwg_id, prio_type, ets->prio_tc);
 360 }
 361
 362 s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw,
 363                             u16 *refill, u16 *max, u8 *bwg_id,
 364                             u8 *prio_type, u8 *prio_tc)
 365 {
 366         switch (hw->mac.type) {
 367         case ixgbe_mac_82598EB:
 368                 ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max,
 369                                                         prio_type);
 370                 ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max,
 371                                                              bwg_id, prio_type);
 372                 ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max,
 373                                                              bwg_id, prio_type);
 374                 break;
 375         case ixgbe_mac_82599EB:
 376         case ixgbe_mac_X540:
 377         case ixgbe_mac_X550:
 378         case ixgbe_mac_X550EM_x:
 379         case ixgbe_mac_x550em_a:
 380                 ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max,
 381                                                   bwg_id, prio_type, prio_tc);
 382                 ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
 383                                                        bwg_id, prio_type);
 384                 ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,
 385                                                        prio_type, prio_tc);
 386                 break;
 387         default:
 388                 break;
 389         }
 390         return 0;
 391 }
 392
 393 static void ixgbe_dcb_read_rtrup2tc_82599(struct ixgbe_hw *hw, u8 *map)
 394 {
 395         u32 reg, i;
 396
 397         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
 398         for (i = 0; i < MAX_USER_PRIORITY; i++)
 399                 map[i] = IXGBE_RTRUP2TC_UP_MASK &
 400                         (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT));
 401 }
 402
 403 void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
 404 {
 405         switch (hw->mac.type) {
 406         case ixgbe_mac_82599EB:
 407         case ixgbe_mac_X540:
 408         case ixgbe_mac_X550:
 409         case ixgbe_mac_X550EM_x:
 410         case ixgbe_mac_x550em_a:
 411                 ixgbe_dcb_read_rtrup2tc_82599(hw, map);
 412                 break;
 413         default:
 414                 break;
 415         }
 416 }