1 # SPDX-License-Identifier: GPL-2.0
3 # PCI Express Port Bus Configuration
6 bool "PCI Express Port Bus support"
9 This automatically enables PCI Express Port Bus support. Users can
10 choose Native Hot-Plug support, Advanced Error Reporting support,
11 Power Management Event support and Virtual Channel support to run
12 on PCI Express Ports (Root or Switch).
15 # Include service Kconfig here
17 config HOTPLUG_PCI_PCIE
18 bool "PCI Express Hotplug driver"
19 depends on HOTPLUG_PCI && PCIEPORTBUS
21 Say Y here if you have a motherboard that supports PCI Express Native
26 source "drivers/pci/pcie/aer/Kconfig"
32 bool "PCI Express ASPM control" if EXPERT
33 depends on PCI && PCIEPORTBUS
36 This enables OS control over PCI Express ASPM (Active State
37 Power Management) and Clock Power Management. ASPM supports
40 ASPM is initially set up by the firmware. With this option enabled,
41 Linux can modify this state in order to disable ASPM on known-bad
42 hardware or configurations and enable it when known-safe.
44 ASPM can be disabled or enabled at runtime via
45 /sys/module/pcie_aspm/parameters/policy
50 bool "Debug PCI Express ASPM"
54 This enables PCI Express ASPM debug support. It will add per-device
55 interface to control ASPM.
58 prompt "Default ASPM policy"
59 default PCIEASPM_DEFAULT
62 config PCIEASPM_DEFAULT
66 Use the BIOS defaults for PCI Express ASPM.
68 config PCIEASPM_POWERSAVE
72 Enable PCI Express ASPM L0s and L1 where possible, even if the
75 config PCIEASPM_POWER_SUPERSAVE
76 bool "Power Supersave"
79 Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
80 possible. This would result in higher power savings while staying in L1
81 where the components support it.
83 config PCIEASPM_PERFORMANCE
87 Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
92 depends on PCIEPORTBUS && PM
95 bool "PCIe Downstream Port Containment support"
96 depends on PCIEPORTBUS && PCIEAER
99 This enables PCI Express Downstream Port Containment (DPC)
100 driver support. DPC events from Root and Downstream ports
101 will be handled by the DPC driver. If your system doesn't
102 have this capability or you do not want to use this feature,
103 it is safe to answer N.
106 bool "PCIe Precision Time Measurement support"
108 depends on PCIEPORTBUS
110 This enables PCI Express Precision Time Measurement (PTM)
113 This is only useful if you have devices that support PTM, but it
114 is safe to enable even if you don't.