drivers/usb/gadget/udc/fsl_mxc_udc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2009
   4  * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
   5  *
   6  * Description:
   7  * Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
   8  * driver to function correctly on these systems.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/delay.h>
  12 #include <linux/err.h>
  13 #include <linux/fsl_devices.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/io.h>
  16
  17 #include "fsl_usb2_udc.h"
  18
  19 static struct clk *mxc_ahb_clk;
  20 static struct clk *mxc_per_clk;
  21 static struct clk *mxc_ipg_clk;
  22
  23 /* workaround ENGcm09152 for i.MX35 */
  24 #define MX35_USBPHYCTRL_OFFSET          0x600
  25 #define USBPHYCTRL_OTGBASE_OFFSET       0x8
  26 #define USBPHYCTRL_EVDO                 (1 << 23)
  27
  28 int fsl_udc_clk_init(struct platform_device *pdev)
  29 {
  30         struct fsl_usb2_platform_data *pdata;
  31         unsigned long freq;
  32         int ret;
  33
  34         pdata = dev_get_platdata(&pdev->dev);
  35
  36         mxc_ipg_clk = devm_clk_get(&pdev->dev, "ipg");
  37         if (IS_ERR(mxc_ipg_clk)) {
  38                 dev_err(&pdev->dev, "clk_get(\"ipg\") failed\n");
  39                 return PTR_ERR(mxc_ipg_clk);
  40         }
  41
  42         mxc_ahb_clk = devm_clk_get(&pdev->dev, "ahb");
  43         if (IS_ERR(mxc_ahb_clk)) {
  44                 dev_err(&pdev->dev, "clk_get(\"ahb\") failed\n");
  45                 return PTR_ERR(mxc_ahb_clk);
  46         }
  47
  48         mxc_per_clk = devm_clk_get(&pdev->dev, "per");
  49         if (IS_ERR(mxc_per_clk)) {
  50                 dev_err(&pdev->dev, "clk_get(\"per\") failed\n");
  51                 return PTR_ERR(mxc_per_clk);
  52         }
  53
  54         clk_prepare_enable(mxc_ipg_clk);
  55         clk_prepare_enable(mxc_ahb_clk);
  56         clk_prepare_enable(mxc_per_clk);
  57
  58         /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
  59         if (!strcmp(pdev->id_entry->name, "imx-udc-mx27")) {
  60                 freq = clk_get_rate(mxc_per_clk);
  61                 if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
  62                     (freq < 59999000 || freq > 60001000)) {
  63                         dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
  64                         ret = -EINVAL;
  65                         goto eclkrate;
  66                 }
  67         }
  68
  69         return 0;
  70
  71 eclkrate:
  72         clk_disable_unprepare(mxc_ipg_clk);
  73         clk_disable_unprepare(mxc_ahb_clk);
  74         clk_disable_unprepare(mxc_per_clk);
  75         mxc_per_clk = NULL;
  76         return ret;
  77 }
  78
  79 int fsl_udc_clk_finalize(struct platform_device *pdev)
  80 {
  81         struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
  82         int ret = 0;
  83
  84         /* workaround ENGcm09152 for i.MX35 */
  85         if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
  86                 unsigned int v;
  87                 struct resource *res = platform_get_resource
  88                         (pdev, IORESOURCE_MEM, 0);
  89                 void __iomem *phy_regs = ioremap(res->start +
  90                                                 MX35_USBPHYCTRL_OFFSET, 512);
  91                 if (!phy_regs) {
  92                         dev_err(&pdev->dev, "ioremap for phy address fails\n");
  93                         ret = -EINVAL;
  94                         goto ioremap_err;
  95                 }
  96
  97                 v = readl(phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
  98                 writel(v | USBPHYCTRL_EVDO,
  99                         phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
 100
 101                 iounmap(phy_regs);
 102         }
 103
 104
 105 ioremap_err:
 106         /* ULPI transceivers don't need usbpll */
 107         if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
 108                 clk_disable_unprepare(mxc_per_clk);
 109                 mxc_per_clk = NULL;
 110         }
 111
 112         return ret;
 113 }
 114
 115 void fsl_udc_clk_release(void)
 116 {
 117         if (mxc_per_clk)
 118                 clk_disable_unprepare(mxc_per_clk);
 119         clk_disable_unprepare(mxc_ahb_clk);
 120         clk_disable_unprepare(mxc_ipg_clk);
 121 }