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x86/topology: Fix function name in documentation
[cris-mirror.git] / drivers / usb / mtu3 / mtu3_gadget_ep0.c
blobebdcf7a38c293223ddfba7f99802a35df605a77d
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
4 *
5 * Copyright (c) 2016 MediaTek Inc.
6 *
7 * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
8 */
9
10 #include <linux/usb/composite.h>
11
12 #include "mtu3.h"
13
14 /* ep0 is always mtu3->in_eps[0] */
15 #define next_ep0_request(mtu) next_request((mtu)->ep0)
16
17 /* for high speed test mode; see USB 2.0 spec 7.1.20 */
18 static const u8 mtu3_test_packet[53] = {
19 /* implicit SYNC then DATA0 to start */
20
21 /* JKJKJKJK x9 */
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 /* JJKKJJKK x8 */
24 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
25 /* JJJJKKKK x8 */
26 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
27 /* JJJJJJJKKKKKKK x8 */
28 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
29 /* JJJJJJJK x8 */
30 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
31 /* JKKKKKKK x10, JK */
32 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
33 /* implicit CRC16 then EOP to end */
34 };
35
36 static char *decode_ep0_state(struct mtu3 *mtu)
37 {
38 switch (mtu->ep0_state) {
39 case MU3D_EP0_STATE_SETUP:
40 return "SETUP";
41 case MU3D_EP0_STATE_TX:
42 return "IN";
43 case MU3D_EP0_STATE_RX:
44 return "OUT";
45 case MU3D_EP0_STATE_TX_END:
46 return "TX-END";
47 case MU3D_EP0_STATE_STALL:
48 return "STALL";
49 default:
50 return "??";
51 }
52 }
53
54 static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
55 {
56 mtu3_req_complete(mtu->ep0, req, 0);
57 }
58
59 static int
60 forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
61 __releases(mtu->lock)
62 __acquires(mtu->lock)
63 {
64 int ret;
65
66 if (!mtu->gadget_driver)
67 return -EOPNOTSUPP;
68
69 spin_unlock(&mtu->lock);
70 ret = mtu->gadget_driver->setup(&mtu->g, setup);
71 spin_lock(&mtu->lock);
72
73 dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
74 return ret;
75 }
76
77 static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
78 {
79 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
80 u16 index = 0;
81
82 dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
83 __func__, mep->epnum, len, src);
84
85 if (len >= 4) {
86 iowrite32_rep(fifo, src, len >> 2);
87 index = len & ~0x03;
88 }
89 if (len & 0x02) {
90 writew(*(u16 *)&src[index], fifo);
91 index += 2;
92 }
93 if (len & 0x01)
94 writeb(src[index], fifo);
95 }
96
97 static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
98 {
99 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
100 u32 value;
101 u16 index = 0;
102
103 dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
104 __func__, mep->epnum, len, dst);
105
106 if (len >= 4) {
107 ioread32_rep(fifo, dst, len >> 2);
108 index = len & ~0x03;
109 }
110 if (len & 0x3) {
111 value = readl(fifo);
112 memcpy(&dst[index], &value, len & 0x3);
113 }
114
115 }
116
117 static void ep0_load_test_packet(struct mtu3 *mtu)
118 {
119 /*
120 * because the length of test packet is less than max packet of HS ep0,
121 * write it into fifo directly.
122 */
123 ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
124 }
125
126 /*
127 * A. send STALL for setup transfer without data stage:
128 * set SENDSTALL and SETUPPKTRDY at the same time;
129 * B. send STALL for other cases:
130 * set SENDSTALL only.
131 */
132 static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
133 {
134 struct mtu3 *mtu = mep0->mtu;
135 void __iomem *mbase = mtu->mac_base;
136 u32 csr;
137
138 /* EP0_SENTSTALL is W1C */
139 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
140 if (set)
141 csr |= EP0_SENDSTALL | pktrdy;
142 else
143 csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
144 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
145
146 mtu->delayed_status = false;
147 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
148
149 dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
150 set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
151 }
152
153 static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
154
155 static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
156 {}
157
158 static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
159 {
160 struct mtu3_request *mreq;
161 struct mtu3 *mtu;
162 struct usb_set_sel_req sel;
163
164 memcpy(&sel, req->buf, sizeof(sel));
165
166 mreq = to_mtu3_request(req);
167 mtu = mreq->mtu;
168 dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
169 sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
170 }
171
172 /* queue data stage to handle 6 byte SET_SEL request */
173 static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
174 {
175 int ret;
176 u16 length = le16_to_cpu(setup->wLength);
177
178 if (unlikely(length != 6)) {
179 dev_err(mtu->dev, "%s wrong wLength:%d\n",
180 __func__, length);
181 return -EINVAL;
182 }
183
184 mtu->ep0_req.mep = mtu->ep0;
185 mtu->ep0_req.request.length = 6;
186 mtu->ep0_req.request.buf = mtu->setup_buf;
187 mtu->ep0_req.request.complete = ep0_set_sel_complete;
188 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
189
190 return ret < 0 ? ret : 1;
191 }
192
193 static int
194 ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
195 {
196 struct mtu3_ep *mep = NULL;
197 int handled = 1;
198 u8 result[2] = {0, 0};
199 u8 epnum = 0;
200 int is_in;
201
202 switch (setup->bRequestType & USB_RECIP_MASK) {
203 case USB_RECIP_DEVICE:
204 result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
205 result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
206
207 if (mtu->g.speed >= USB_SPEED_SUPER) {
208 result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
209 result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
210 }
211
212 dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
213 result[0], mtu->u1_enable, mtu->u2_enable);
214
215 break;
216 case USB_RECIP_INTERFACE:
217 break;
218 case USB_RECIP_ENDPOINT:
219 epnum = (u8) le16_to_cpu(setup->wIndex);
220 is_in = epnum & USB_DIR_IN;
221 epnum &= USB_ENDPOINT_NUMBER_MASK;
222
223 if (epnum >= mtu->num_eps) {
224 handled = -EINVAL;
225 break;
226 }
227 if (!epnum)
228 break;
229
230 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
231 if (!mep->desc) {
232 handled = -EINVAL;
233 break;
234 }
235 if (mep->flags & MTU3_EP_STALL)
236 result[0] |= 1 << USB_ENDPOINT_HALT;
237
238 break;
239 default:
240 /* class, vendor, etc ... delegate */
241 handled = 0;
242 break;
243 }
244
245 if (handled > 0) {
246 int ret;
247
248 /* prepare a data stage for GET_STATUS */
249 dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
250 memcpy(mtu->setup_buf, result, sizeof(result));
251 mtu->ep0_req.mep = mtu->ep0;
252 mtu->ep0_req.request.length = 2;
253 mtu->ep0_req.request.buf = &mtu->setup_buf;
254 mtu->ep0_req.request.complete = ep0_dummy_complete;
255 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
256 if (ret < 0)
257 handled = ret;
258 }
259 return handled;
260 }
261
262 static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
263 {
264 void __iomem *mbase = mtu->mac_base;
265 int handled = 1;
266
267 switch (le16_to_cpu(setup->wIndex) >> 8) {
268 case TEST_J:
269 dev_dbg(mtu->dev, "TEST_J\n");
270 mtu->test_mode_nr = TEST_J_MODE;
271 break;
272 case TEST_K:
273 dev_dbg(mtu->dev, "TEST_K\n");
274 mtu->test_mode_nr = TEST_K_MODE;
275 break;
276 case TEST_SE0_NAK:
277 dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
278 mtu->test_mode_nr = TEST_SE0_NAK_MODE;
279 break;
280 case TEST_PACKET:
281 dev_dbg(mtu->dev, "TEST_PACKET\n");
282 mtu->test_mode_nr = TEST_PACKET_MODE;
283 break;
284 default:
285 handled = -EINVAL;
286 goto out;
287 }
288
289 mtu->test_mode = true;
290
291 /* no TX completion interrupt, and need restart platform after test */
292 if (mtu->test_mode_nr == TEST_PACKET_MODE)
293 ep0_load_test_packet(mtu);
294
295 mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
296
297 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
298
299 out:
300 return handled;
301 }
302
303 static int ep0_handle_feature_dev(struct mtu3 *mtu,
304 struct usb_ctrlrequest *setup, bool set)
305 {
306 void __iomem *mbase = mtu->mac_base;
307 int handled = -EINVAL;
308 u32 lpc;
309
310 switch (le16_to_cpu(setup->wValue)) {
311 case USB_DEVICE_REMOTE_WAKEUP:
312 mtu->may_wakeup = !!set;
313 handled = 1;
314 break;
315 case USB_DEVICE_TEST_MODE:
316 if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
317 (le16_to_cpu(setup->wIndex) & 0xff))
318 break;
319
320 handled = handle_test_mode(mtu, setup);
321 break;
322 case USB_DEVICE_U1_ENABLE:
323 if (mtu->g.speed < USB_SPEED_SUPER ||
324 mtu->g.state != USB_STATE_CONFIGURED)
325 break;
326
327 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
328 if (set)
329 lpc |= SW_U1_ACCEPT_ENABLE;
330 else
331 lpc &= ~SW_U1_ACCEPT_ENABLE;
332 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
333
334 mtu->u1_enable = !!set;
335 handled = 1;
336 break;
337 case USB_DEVICE_U2_ENABLE:
338 if (mtu->g.speed < USB_SPEED_SUPER ||
339 mtu->g.state != USB_STATE_CONFIGURED)
340 break;
341
342 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
343 if (set)
344 lpc |= SW_U2_ACCEPT_ENABLE;
345 else
346 lpc &= ~SW_U2_ACCEPT_ENABLE;
347 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
348
349 mtu->u2_enable = !!set;
350 handled = 1;
351 break;
352 default:
353 handled = -EINVAL;
354 break;
355 }
356 return handled;
357 }
358
359 static int ep0_handle_feature(struct mtu3 *mtu,
360 struct usb_ctrlrequest *setup, bool set)
361 {
362 struct mtu3_ep *mep;
363 int handled = -EINVAL;
364 int is_in;
365 u16 value;
366 u16 index;
367 u8 epnum;
368
369 value = le16_to_cpu(setup->wValue);
370 index = le16_to_cpu(setup->wIndex);
371
372 switch (setup->bRequestType & USB_RECIP_MASK) {
373 case USB_RECIP_DEVICE:
374 handled = ep0_handle_feature_dev(mtu, setup, set);
375 break;
376 case USB_RECIP_INTERFACE:
377 /* superspeed only */
378 if (value == USB_INTRF_FUNC_SUSPEND &&
379 mtu->g.speed >= USB_SPEED_SUPER) {
380 /*
381 * forward the request because function drivers
382 * should handle it
383 */
384 handled = 0;
385 }
386 break;
387 case USB_RECIP_ENDPOINT:
388 epnum = index & USB_ENDPOINT_NUMBER_MASK;
389 if (epnum == 0 || epnum >= mtu->num_eps ||
390 value != USB_ENDPOINT_HALT)
391 break;
392
393 is_in = index & USB_DIR_IN;
394 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
395 if (!mep->desc)
396 break;
397
398 handled = 1;
399 /* ignore request if endpoint is wedged */
400 if (mep->wedged)
401 break;
402
403 mtu3_ep_stall_set(mep, set);
404 break;
405 default:
406 /* class, vendor, etc ... delegate */
407 handled = 0;
408 break;
409 }
410 return handled;
411 }
412
413 /*
414 * handle all control requests can be handled
415 * returns:
416 * negative errno - error happened
417 * zero - need delegate SETUP to gadget driver
418 * positive - already handled
419 */
420 static int handle_standard_request(struct mtu3 *mtu,
421 struct usb_ctrlrequest *setup)
422 {
423 void __iomem *mbase = mtu->mac_base;
424 enum usb_device_state state = mtu->g.state;
425 int handled = -EINVAL;
426 u32 dev_conf;
427 u16 value;
428
429 value = le16_to_cpu(setup->wValue);
430
431 /* the gadget driver handles everything except what we must handle */
432 switch (setup->bRequest) {
433 case USB_REQ_SET_ADDRESS:
434 /* change it after the status stage */
435 mtu->address = (u8) (value & 0x7f);
436 dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
437
438 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
439 dev_conf &= ~DEV_ADDR_MSK;
440 dev_conf |= DEV_ADDR(mtu->address);
441 mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
442
443 if (mtu->address)
444 usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
445 else
446 usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
447
448 handled = 1;
449 break;
450 case USB_REQ_SET_CONFIGURATION:
451 if (state == USB_STATE_ADDRESS) {
452 usb_gadget_set_state(&mtu->g,
453 USB_STATE_CONFIGURED);
454 } else if (state == USB_STATE_CONFIGURED) {
455 /*
456 * USB2 spec sec 9.4.7, if wValue is 0 then dev
457 * is moved to addressed state
458 */
459 if (!value)
460 usb_gadget_set_state(&mtu->g,
461 USB_STATE_ADDRESS);
462 }
463 handled = 0;
464 break;
465 case USB_REQ_CLEAR_FEATURE:
466 handled = ep0_handle_feature(mtu, setup, 0);
467 break;
468 case USB_REQ_SET_FEATURE:
469 handled = ep0_handle_feature(mtu, setup, 1);
470 break;
471 case USB_REQ_GET_STATUS:
472 handled = ep0_get_status(mtu, setup);
473 break;
474 case USB_REQ_SET_SEL:
475 handled = ep0_set_sel(mtu, setup);
476 break;
477 case USB_REQ_SET_ISOCH_DELAY:
478 handled = 1;
479 break;
480 default:
481 /* delegate SET_CONFIGURATION, etc */
482 handled = 0;
483 }
484
485 return handled;
486 }
487
488 /* receive an data packet (OUT) */
489 static void ep0_rx_state(struct mtu3 *mtu)
490 {
491 struct mtu3_request *mreq;
492 struct usb_request *req;
493 void __iomem *mbase = mtu->mac_base;
494 u32 maxp;
495 u32 csr;
496 u16 count = 0;
497
498 dev_dbg(mtu->dev, "%s\n", __func__);
499
500 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
501 mreq = next_ep0_request(mtu);
502 req = &mreq->request;
503
504 /* read packet and ack; or stall because of gadget driver bug */
505 if (req) {
506 void *buf = req->buf + req->actual;
507 unsigned int len = req->length - req->actual;
508
509 /* read the buffer */
510 count = mtu3_readl(mbase, U3D_RXCOUNT0);
511 if (count > len) {
512 req->status = -EOVERFLOW;
513 count = len;
514 }
515 ep0_read_fifo(mtu->ep0, buf, count);
516 req->actual += count;
517 csr |= EP0_RXPKTRDY;
518
519 maxp = mtu->g.ep0->maxpacket;
520 if (count < maxp || req->actual == req->length) {
521 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
522 dev_dbg(mtu->dev, "ep0 state: %s\n",
523 decode_ep0_state(mtu));
524
525 csr |= EP0_DATAEND;
526 } else {
527 req = NULL;
528 }
529 } else {
530 csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
531 dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
532 }
533
534 mtu3_writel(mbase, U3D_EP0CSR, csr);
535
536 /* give back the request if have received all data */
537 if (req)
538 ep0_req_giveback(mtu, req);
539
540 }
541
542 /* transmitting to the host (IN) */
543 static void ep0_tx_state(struct mtu3 *mtu)
544 {
545 struct mtu3_request *mreq = next_ep0_request(mtu);
546 struct usb_request *req;
547 u32 csr;
548 u8 *src;
549 u8 count;
550 u32 maxp;
551
552 dev_dbg(mtu->dev, "%s\n", __func__);
553
554 if (!mreq)
555 return;
556
557 maxp = mtu->g.ep0->maxpacket;
558 req = &mreq->request;
559
560 /* load the data */
561 src = (u8 *)req->buf + req->actual;
562 count = min(maxp, req->length - req->actual);
563 if (count)
564 ep0_write_fifo(mtu->ep0, src, count);
565
566 dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
567 __func__, req->actual, req->length, count, maxp, req->zero);
568
569 req->actual += count;
570
571 if ((count < maxp)
572 || ((req->actual == req->length) && !req->zero))
573 mtu->ep0_state = MU3D_EP0_STATE_TX_END;
574
575 /* send it out, triggering a "txpktrdy cleared" irq */
576 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
577 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
578
579 dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
580 mtu3_readl(mtu->mac_base, U3D_EP0CSR));
581 }
582
583 static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
584 {
585 struct mtu3_request *mreq;
586 u32 count;
587 u32 csr;
588
589 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
590 count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
591
592 ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
593
594 dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
595 setup->bRequestType, setup->bRequest,
596 le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
597 le16_to_cpu(setup->wLength));
598
599 /* clean up any leftover transfers */
600 mreq = next_ep0_request(mtu);
601 if (mreq)
602 ep0_req_giveback(mtu, &mreq->request);
603
604 if (le16_to_cpu(setup->wLength) == 0) {
605 ; /* no data stage, nothing to do */
606 } else if (setup->bRequestType & USB_DIR_IN) {
607 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
608 csr | EP0_SETUPPKTRDY | EP0_DPHTX);
609 mtu->ep0_state = MU3D_EP0_STATE_TX;
610 } else {
611 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
612 (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
613 mtu->ep0_state = MU3D_EP0_STATE_RX;
614 }
615 }
616
617 static int ep0_handle_setup(struct mtu3 *mtu)
618 __releases(mtu->lock)
619 __acquires(mtu->lock)
620 {
621 struct usb_ctrlrequest setup;
622 struct mtu3_request *mreq;
623 void __iomem *mbase = mtu->mac_base;
624 int handled = 0;
625
626 ep0_read_setup(mtu, &setup);
627
628 if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
629 handled = handle_standard_request(mtu, &setup);
630
631 dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
632 handled, decode_ep0_state(mtu));
633
634 if (handled < 0)
635 goto stall;
636 else if (handled > 0)
637 goto finish;
638
639 handled = forward_to_driver(mtu, &setup);
640 if (handled < 0) {
641 stall:
642 dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
643
644 ep0_stall_set(mtu->ep0, true,
645 le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
646
647 return 0;
648 }
649
650 finish:
651 if (mtu->test_mode) {
652 ; /* nothing to do */
653 } else if (handled == USB_GADGET_DELAYED_STATUS) {
654 /* handle the delay STATUS phase till receive ep_queue on ep0 */
655 mtu->delayed_status = true;
656 } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
657
658 mtu3_writel(mbase, U3D_EP0CSR,
659 (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS)
660 | EP0_SETUPPKTRDY | EP0_DATAEND);
661
662 /* complete zlp request directly */
663 mreq = next_ep0_request(mtu);
664 if (mreq && !mreq->request.length)
665 ep0_req_giveback(mtu, &mreq->request);
666 }
667
668 return 0;
669 }
670
671 irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
672 {
673 void __iomem *mbase = mtu->mac_base;
674 struct mtu3_request *mreq;
675 u32 int_status;
676 irqreturn_t ret = IRQ_NONE;
677 u32 csr;
678 u32 len;
679
680 int_status = mtu3_readl(mbase, U3D_EPISR);
681 int_status &= mtu3_readl(mbase, U3D_EPIER);
682 mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
683
684 /* only handle ep0's */
685 if (!(int_status & EP0ISR))
686 return IRQ_NONE;
687
688 csr = mtu3_readl(mbase, U3D_EP0CSR);
689
690 dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
691
692 /* we sent a stall.. need to clear it now.. */
693 if (csr & EP0_SENTSTALL) {
694 ep0_stall_set(mtu->ep0, false, 0);
695 csr = mtu3_readl(mbase, U3D_EP0CSR);
696 ret = IRQ_HANDLED;
697 }
698 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
699
700 switch (mtu->ep0_state) {
701 case MU3D_EP0_STATE_TX:
702 /* irq on clearing txpktrdy */
703 if ((csr & EP0_FIFOFULL) == 0) {
704 ep0_tx_state(mtu);
705 ret = IRQ_HANDLED;
706 }
707 break;
708 case MU3D_EP0_STATE_RX:
709 /* irq on set rxpktrdy */
710 if (csr & EP0_RXPKTRDY) {
711 ep0_rx_state(mtu);
712 ret = IRQ_HANDLED;
713 }
714 break;
715 case MU3D_EP0_STATE_TX_END:
716 mtu3_writel(mbase, U3D_EP0CSR,
717 (csr & EP0_W1C_BITS) | EP0_DATAEND);
718
719 mreq = next_ep0_request(mtu);
720 if (mreq)
721 ep0_req_giveback(mtu, &mreq->request);
722
723 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
724 ret = IRQ_HANDLED;
725 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
726 break;
727 case MU3D_EP0_STATE_SETUP:
728 if (!(csr & EP0_SETUPPKTRDY))
729 break;
730
731 len = mtu3_readl(mbase, U3D_RXCOUNT0);
732 if (len != 8) {
733 dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
734 break;
735 }
736
737 ep0_handle_setup(mtu);
738 ret = IRQ_HANDLED;
739 break;
740 default:
741 /* can't happen */
742 ep0_stall_set(mtu->ep0, true, 0);
743 WARN_ON(1);
744 break;
745 }
746
747 return ret;
748 }
749
750
751 static int mtu3_ep0_enable(struct usb_ep *ep,
752 const struct usb_endpoint_descriptor *desc)
753 {
754 /* always enabled */
755 return -EINVAL;
756 }
757
758 static int mtu3_ep0_disable(struct usb_ep *ep)
759 {
760 /* always enabled */
761 return -EINVAL;
762 }
763
764 static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
765 {
766 struct mtu3 *mtu = mep->mtu;
767
768 mreq->mtu = mtu;
769 mreq->request.actual = 0;
770 mreq->request.status = -EINPROGRESS;
771
772 dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
773 mep->name, decode_ep0_state(mtu), mreq->request.length);
774
775 switch (mtu->ep0_state) {
776 case MU3D_EP0_STATE_SETUP:
777 case MU3D_EP0_STATE_RX: /* control-OUT data */
778 case MU3D_EP0_STATE_TX: /* control-IN data */
779 break;
780 default:
781 dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
782 decode_ep0_state(mtu));
783 return -EINVAL;
784 }
785
786 if (mtu->delayed_status) {
787 u32 csr;
788
789 mtu->delayed_status = false;
790 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
791 csr |= EP0_SETUPPKTRDY | EP0_DATAEND;
792 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
793 /* needn't giveback the request for handling delay STATUS */
794 return 0;
795 }
796
797 if (!list_empty(&mep->req_list))
798 return -EBUSY;
799
800 list_add_tail(&mreq->list, &mep->req_list);
801
802 /* sequence #1, IN ... start writing the data */
803 if (mtu->ep0_state == MU3D_EP0_STATE_TX)
804 ep0_tx_state(mtu);
805
806 return 0;
807 }
808
809 static int mtu3_ep0_queue(struct usb_ep *ep,
810 struct usb_request *req, gfp_t gfp)
811 {
812 struct mtu3_ep *mep;
813 struct mtu3_request *mreq;
814 struct mtu3 *mtu;
815 unsigned long flags;
816 int ret = 0;
817
818 if (!ep || !req)
819 return -EINVAL;
820
821 mep = to_mtu3_ep(ep);
822 mtu = mep->mtu;
823 mreq = to_mtu3_request(req);
824
825 spin_lock_irqsave(&mtu->lock, flags);
826 ret = ep0_queue(mep, mreq);
827 spin_unlock_irqrestore(&mtu->lock, flags);
828 return ret;
829 }
830
831 static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
832 {
833 /* we just won't support this */
834 return -EINVAL;
835 }
836
837 static int mtu3_ep0_halt(struct usb_ep *ep, int value)
838 {
839 struct mtu3_ep *mep;
840 struct mtu3 *mtu;
841 unsigned long flags;
842 int ret = 0;
843
844 if (!ep || !value)
845 return -EINVAL;
846
847 mep = to_mtu3_ep(ep);
848 mtu = mep->mtu;
849
850 dev_dbg(mtu->dev, "%s\n", __func__);
851
852 spin_lock_irqsave(&mtu->lock, flags);
853
854 if (!list_empty(&mep->req_list)) {
855 ret = -EBUSY;
856 goto cleanup;
857 }
858
859 switch (mtu->ep0_state) {
860 /*
861 * stalls are usually issued after parsing SETUP packet, either
862 * directly in irq context from setup() or else later.
863 */
864 case MU3D_EP0_STATE_TX:
865 case MU3D_EP0_STATE_TX_END:
866 case MU3D_EP0_STATE_RX:
867 case MU3D_EP0_STATE_SETUP:
868 ep0_stall_set(mtu->ep0, true, 0);
869 break;
870 default:
871 dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
872 decode_ep0_state(mtu));
873 ret = -EINVAL;
874 }
875
876 cleanup:
877 spin_unlock_irqrestore(&mtu->lock, flags);
878 return ret;
879 }
880
881 const struct usb_ep_ops mtu3_ep0_ops = {
882 .enable = mtu3_ep0_enable,
883 .disable = mtu3_ep0_disable,
884 .alloc_request = mtu3_alloc_request,
885 .free_request = mtu3_free_request,
886 .queue = mtu3_ep0_queue,
887 .dequeue = mtu3_ep0_dequeue,
888 .set_halt = mtu3_ep0_halt,
889 };
CRIS linux kernel tree