arch/arm/boot/dts/dove.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/interrupt-controller/irq.h>
   5
   6 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   7
   8 / {
   9         compatible = "marvell,dove";
  10         model = "Marvell Armada 88AP510 SoC";
  11         interrupt-parent = <&intc>;
  12
  13         aliases {
  14                 gpio0 = &gpio0;
  15                 gpio1 = &gpio1;
  16                 gpio2 = &gpio2;
  17         };
  18
  19         cpus {
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22
  23                 cpu0: cpu@0 {
  24                         compatible = "marvell,pj4a", "marvell,sheeva-v7";
  25                         device_type = "cpu";
  26                         next-level-cache = <&l2>;
  27                         reg = <0>;
  28                 };
  29         };
  30
  31         l2: l2-cache {
  32                 compatible = "marvell,tauros2-cache";
  33                 marvell,tauros2-cache-features = <0>;
  34         };
  35
  36         i2c-mux {
  37                 compatible = "i2c-mux-pinctrl";
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40
  41                 i2c-parent = <&i2c>;
  42
  43                 pinctrl-names = "i2c0", "i2c1", "i2c2";
  44                 pinctrl-0 = <&pmx_i2cmux_0>;
  45                 pinctrl-1 = <&pmx_i2cmux_1>;
  46                 pinctrl-2 = <&pmx_i2cmux_2>;
  47
  48                 i2c0: i2c@0 {
  49                         reg = <0>;
  50                         #address-cells = <1>;
  51                         #size-cells = <0>;
  52                         status = "okay";
  53                 };
  54
  55                 i2c1: i2c@1 {
  56                         reg = <1>;
  57                         #address-cells = <1>;
  58                         #size-cells = <0>;
  59                         /* Requires pmx_i2c1 on i2c controller node */
  60                         status = "disabled";
  61                 };
  62
  63                 i2c2: i2c@2 {
  64                         reg = <2>;
  65                         #address-cells = <1>;
  66                         #size-cells = <0>;
  67                         /* Requires pmx_i2c2 on i2c controller node */
  68                         status = "disabled";
  69                 };
  70         };
  71
  72         mbus {
  73                 compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus";
  74                 #address-cells = <2>;
  75                 #size-cells = <1>;
  76                 controller = <&mbusc>;
  77                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */
  78                 pcie-io-aperture  = <0xf2000000 0x00200000>; /*   2M I/O space */
  79
  80                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x0100000   /* MBUS regs  1M */
  81                           MBUS_ID(0xf0, 0x02) 0 0xf1800000 0x1000000   /* AXI  regs 16M */
  82                           MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000   /* BootROM  128M */
  83                           MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000   /* CESA SRAM  1M */
  84                           MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU  SRAM  1M */
  85
  86                 pcie: pcie-controller {
  87                         compatible = "marvell,dove-pcie";
  88                         status = "disabled";
  89                         device_type = "pci";
  90                         #address-cells = <3>;
  91                         #size-cells = <2>;
  92
  93                         msi-parent = <&intc>;
  94                         bus-range = <0x00 0xff>;
  95
  96                         ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000
  97                                   0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000
  98                                   0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0   /* Port 0.0 Mem */
  99                                   0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0   /* Port 0.0 I/O */
 100                                   0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0   /* Port 1.0 Mem */
 101                                   0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
 102
 103                         pcie0: pcie-port@0 {
 104                                 device_type = "pci";
 105                                 status = "disabled";
 106                                 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
 107                                 reg = <0x0800 0 0 0 0>;
 108                                 clocks = <&gate_clk 4>;
 109                                 marvell,pcie-port = <0>;
 110
 111                                 #address-cells = <3>;
 112                                 #size-cells = <2>;
 113                                 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
 114                                           0x81000000 0 0 0x81000000 0x1 0 1 0>;
 115
 116                                 #interrupt-cells = <1>;
 117                                 interrupt-map-mask = <0 0 0 0>;
 118                                 interrupt-map = <0 0 0 0 &intc 16>;
 119                         };
 120
 121                         pcie1: pcie-port@1 {
 122                                 device_type = "pci";
 123                                 status = "disabled";
 124                                 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
 125                                 reg = <0x1000 0 0 0 0>;
 126                                 clocks = <&gate_clk 5>;
 127                                 marvell,pcie-port = <1>;
 128
 129                                 #address-cells = <3>;
 130                                 #size-cells = <2>;
 131                                 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
 132                                           0x81000000 0 0 0x81000000 0x2 0 1 0>;
 133
 134                                 #interrupt-cells = <1>;
 135                                 interrupt-map-mask = <0 0 0 0>;
 136                                 interrupt-map = <0 0 0 0 &intc 18>;
 137                         };
 138                 };
 139
 140                 internal-regs {
 141                         compatible = "simple-bus";
 142                         #address-cells = <1>;
 143                         #size-cells = <1>;
 144                         ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000   /* MBUS regs  1M */
 145                                   0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000   /* AXI  regs 16M */
 146                                   0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800   /* CESA SRAM  2k */
 147                                   0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU  SRAM  2k */
 148
 149                         spi0: spi-ctrl@10600 {
 150                                 compatible = "marvell,orion-spi";
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153                                 cell-index = <0>;
 154                                 interrupts = <6>;
 155                                 reg = <0x10600 0x28>;
 156                                 clocks = <&core_clk 0>;
 157                                 pinctrl-0 = <&pmx_spi0>;
 158                                 pinctrl-names = "default";
 159                                 status = "disabled";
 160                         };
 161
 162                         i2c: i2c-ctrl@11000 {
 163                                 compatible = "marvell,mv64xxx-i2c";
 164                                 reg = <0x11000 0x20>;
 165                                 #address-cells = <1>;
 166                                 #size-cells = <0>;
 167                                 interrupts = <11>;
 168                                 clock-frequency = <400000>;
 169                                 timeout-ms = <1000>;
 170                                 clocks = <&core_clk 0>;
 171                                 status = "okay";
 172                         };
 173
 174                         uart0: serial@12000 {
 175                                 compatible = "ns16550a";
 176                                 reg = <0x12000 0x100>;
 177                                 reg-shift = <2>;
 178                                 interrupts = <7>;
 179                                 clocks = <&core_clk 0>;
 180                                 status = "disabled";
 181                         };
 182
 183                         uart1: serial@12100 {
 184                                 compatible = "ns16550a";
 185                                 reg = <0x12100 0x100>;
 186                                 reg-shift = <2>;
 187                                 interrupts = <8>;
 188                                 clocks = <&core_clk 0>;
 189                                 pinctrl-0 = <&pmx_uart1>;
 190                                 pinctrl-names = "default";
 191                                 status = "disabled";
 192                         };
 193
 194                         uart2: serial@12200 {
 195                                 compatible = "ns16550a";
 196                                 reg = <0x12200 0x100>;
 197                                 reg-shift = <2>;
 198                                 interrupts = <9>;
 199                                 clocks = <&core_clk 0>;
 200                                 status = "disabled";
 201                         };
 202
 203                         uart3: serial@12300 {
 204                                 compatible = "ns16550a";
 205                                 reg = <0x12300 0x100>;
 206                                 reg-shift = <2>;
 207                                 interrupts = <10>;
 208                                 clocks = <&core_clk 0>;
 209                                 status = "disabled";
 210                         };
 211
 212                         spi1: spi-ctrl@14600 {
 213                                 compatible = "marvell,orion-spi";
 214                                 #address-cells = <1>;
 215                                 #size-cells = <0>;
 216                                 cell-index = <1>;
 217                                 interrupts = <5>;
 218                                 reg = <0x14600 0x28>;
 219                                 clocks = <&core_clk 0>;
 220                                 status = "disabled";
 221                         };
 222
 223                         mbusc: mbus-ctrl@20000 {
 224                                 compatible = "marvell,mbus-controller";
 225                                 reg = <0x20000 0x80>, <0x800100 0x8>;
 226                         };
 227
 228                         sysc: system-ctrl@20000 {
 229                                 compatible = "marvell,orion-system-controller";
 230                                 reg = <0x20000 0x110>;
 231                         };
 232
 233                         bridge_intc: bridge-interrupt-ctrl@20110 {
 234                                 compatible = "marvell,orion-bridge-intc";
 235                                 interrupt-controller;
 236                                 #interrupt-cells = <1>;
 237                                 reg = <0x20110 0x8>;
 238                                 interrupts = <0>;
 239                                 marvell,#interrupts = <5>;
 240                         };
 241
 242                         intc: main-interrupt-ctrl@20200 {
 243                                 compatible = "marvell,orion-intc";
 244                                 interrupt-controller;
 245                                 #interrupt-cells = <1>;
 246                                 reg = <0x20200 0x10>, <0x20210 0x10>;
 247                         };
 248
 249                         timer: timer@20300 {
 250                                 compatible = "marvell,orion-timer";
 251                                 reg = <0x20300 0x20>;
 252                                 interrupt-parent = <&bridge_intc>;
 253                                 interrupts = <1>, <2>;
 254                                 clocks = <&core_clk 0>;
 255                         };
 256
 257                         watchdog@20300 {
 258                                 compatible = "marvell,orion-wdt";
 259                                 reg = <0x20300 0x28>, <0x20108 0x4>;
 260                                 interrupt-parent = <&bridge_intc>;
 261                                 interrupts = <3>;
 262                                 clocks = <&core_clk 0>;
 263                         };
 264
 265                         crypto: crypto-engine@30000 {
 266                                 compatible = "marvell,orion-crypto";
 267                                 reg = <0x30000 0x10000>,
 268                                       <0xffffe000 0x800>;
 269                                 reg-names = "regs", "sram";
 270                                 interrupts = <31>;
 271                                 clocks = <&gate_clk 15>;
 272                                 status = "okay";
 273                         };
 274
 275                         ehci0: usb-host@50000 {
 276                                 compatible = "marvell,orion-ehci";
 277                                 reg = <0x50000 0x1000>;
 278                                 interrupts = <24>;
 279                                 clocks = <&gate_clk 0>;
 280                                 status = "okay";
 281                         };
 282
 283                         ehci1: usb-host@51000 {
 284                                 compatible = "marvell,orion-ehci";
 285                                 reg = <0x51000 0x1000>;
 286                                 interrupts = <25>;
 287                                 clocks = <&gate_clk 1>;
 288                                 status = "okay";
 289                         };
 290
 291                         xor0: dma-engine@60800 {
 292                                 compatible = "marvell,orion-xor";
 293                                 reg = <0x60800 0x100
 294                                        0x60a00 0x100>;
 295                                 clocks = <&gate_clk 23>;
 296                                 status = "okay";
 297
 298                                 channel0 {
 299                                         interrupts = <39>;
 300                                         dmacap,memcpy;
 301                                         dmacap,xor;
 302                                 };
 303
 304                                 channel1 {
 305                                         interrupts = <40>;
 306                                         dmacap,memcpy;
 307                                         dmacap,xor;
 308                                 };
 309                         };
 310
 311                         xor1: dma-engine@60900 {
 312                                 compatible = "marvell,orion-xor";
 313                                 reg = <0x60900 0x100
 314                                        0x60b00 0x100>;
 315                                 clocks = <&gate_clk 24>;
 316                                 status = "okay";
 317
 318                                 channel0 {
 319                                         interrupts = <42>;
 320                                         dmacap,memcpy;
 321                                         dmacap,xor;
 322                                 };
 323
 324                                 channel1 {
 325                                         interrupts = <43>;
 326                                         dmacap,memcpy;
 327                                         dmacap,xor;
 328                                 };
 329                         };
 330
 331                         sdio1: sdio-host@90000 {
 332                                 compatible = "marvell,dove-sdhci";
 333                                 reg = <0x90000 0x100>;
 334                                 interrupts = <36>, <38>;
 335                                 clocks = <&gate_clk 9>;
 336                                 pinctrl-0 = <&pmx_sdio1>;
 337                                 pinctrl-names = "default";
 338                                 status = "disabled";
 339                         };
 340
 341                         eth: ethernet-ctrl@72000 {
 342                                 compatible = "marvell,orion-eth";
 343                                 #address-cells = <1>;
 344                                 #size-cells = <0>;
 345                                 reg = <0x72000 0x4000>;
 346                                 clocks = <&gate_clk 2>;
 347                                 marvell,tx-checksum-limit = <1600>;
 348                                 status = "disabled";
 349
 350                                 ethernet-port@0 {
 351                                         compatible = "marvell,orion-eth-port";
 352                                         reg = <0>;
 353                                         interrupts = <29>;
 354                                         /* overwrite MAC address in bootloader */
 355                                         local-mac-address = [00 00 00 00 00 00];
 356                                         phy-handle = <&ethphy>;
 357                                 };
 358                         };
 359
 360                         mdio: mdio-bus@72004 {
 361                                 compatible = "marvell,orion-mdio";
 362                                 #address-cells = <1>;
 363                                 #size-cells = <0>;
 364                                 reg = <0x72004 0x84>;
 365                                 interrupts = <30>;
 366                                 clocks = <&gate_clk 2>;
 367                                 status = "disabled";
 368
 369                                 ethphy: ethernet-phy {
 370                                         /* set phy address in board file */
 371                                 };
 372                         };
 373
 374                         sdio0: sdio-host@92000 {
 375                                 compatible = "marvell,dove-sdhci";
 376                                 reg = <0x92000 0x100>;
 377                                 interrupts = <35>, <37>;
 378                                 clocks = <&gate_clk 8>;
 379                                 pinctrl-0 = <&pmx_sdio0>;
 380                                 pinctrl-names = "default";
 381                                 status = "disabled";
 382                         };
 383
 384                         sata0: sata-host@a0000 {
 385                                 compatible = "marvell,orion-sata";
 386                                 reg = <0xa0000 0x2400>;
 387                                 interrupts = <62>;
 388                                 clocks = <&gate_clk 3>;
 389                                 phys = <&sata_phy0>;
 390                                 phy-names = "port0";
 391                                 nr-ports = <1>;
 392                                 status = "disabled";
 393                         };
 394
 395                         sata_phy0: sata-phy@a2000 {
 396                                 compatible = "marvell,mvebu-sata-phy";
 397                                 reg = <0xa2000 0x0334>;
 398                                 clocks = <&gate_clk 3>;
 399                                 clock-names = "sata";
 400                                 #phy-cells = <0>;
 401                                 status = "ok";
 402                         };
 403
 404                         audio0: audio-controller@b0000 {
 405                                 compatible = "marvell,dove-audio";
 406                                 reg = <0xb0000 0x2210>;
 407                                 interrupts = <19>, <20>;
 408                                 clocks = <&gate_clk 12>;
 409                                 clock-names = "internal";
 410                                 status = "disabled";
 411                         };
 412
 413                         audio1: audio-controller@b4000 {
 414                                 compatible = "marvell,dove-audio";
 415                                 reg = <0xb4000 0x2210>;
 416                                 interrupts = <21>, <22>;
 417                                 clocks = <&gate_clk 13>;
 418                                 clock-names = "internal";
 419                                 status = "disabled";
 420                         };
 421
 422                         pmu: power-management@d0000 {
 423                                 compatible = "marvell,dove-pmu", "simple-bus";
 424                                 reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
 425                                 ranges = <0x00000000 0x000d0000 0x8000
 426                                           0x00008000 0x000d8000 0x8000>;
 427                                 interrupts = <33>;
 428                                 interrupt-controller;
 429                                 #address-cells = <1>;
 430                                 #size-cells = <1>;
 431                                 #interrupt-cells = <1>;
 432                                 #reset-cells = <1>;
 433
 434                                 domains {
 435                                         vpu_domain: vpu-domain {
 436                                                 #power-domain-cells = <0>;
 437                                                 marvell,pmu_pwr_mask = <0x00000008>;
 438                                                 marvell,pmu_iso_mask = <0x00000001>;
 439                                                 resets = <&pmu 16>;
 440                                         };
 441
 442                                         gpu_domain: gpu-domain {
 443                                                 #power-domain-cells = <0>;
 444                                                 marvell,pmu_pwr_mask = <0x00000004>;
 445                                                 marvell,pmu_iso_mask = <0x00000002>;
 446                                                 resets = <&pmu 18>;
 447                                         };
 448                                 };
 449
 450                                 thermal: thermal-diode@001c {
 451                                         compatible = "marvell,dove-thermal";
 452                                         reg = <0x001c 0x0c>, <0x005c 0x08>;
 453                                 };
 454
 455                                 gate_clk: clock-gating-ctrl@0038 {
 456                                         compatible = "marvell,dove-gating-clock";
 457                                         reg = <0x0038 0x4>;
 458                                         clocks = <&core_clk 0>;
 459                                         #clock-cells = <1>;
 460                                 };
 461
 462                                 pinctrl: pin-ctrl@0200 {
 463                                         compatible = "marvell,dove-pinctrl";
 464                                         reg = <0x0200 0x14>,
 465                                               <0x0440 0x04>;
 466                                         clocks = <&gate_clk 22>;
 467
 468                                         pmx_gpio_0: pmx-gpio-0 {
 469                                                 marvell,pins = "mpp0";
 470                                                 marvell,function = "gpio";
 471                                         };
 472
 473                                         pmx_gpio_1: pmx-gpio-1 {
 474                                                 marvell,pins = "mpp1";
 475                                                 marvell,function = "gpio";
 476                                         };
 477
 478                                         pmx_gpio_2: pmx-gpio-2 {
 479                                                 marvell,pins = "mpp2";
 480                                                 marvell,function = "gpio";
 481                                         };
 482
 483                                         pmx_gpio_3: pmx-gpio-3 {
 484                                                 marvell,pins = "mpp3";
 485                                                 marvell,function = "gpio";
 486                                         };
 487
 488                                         pmx_gpio_4: pmx-gpio-4 {
 489                                                 marvell,pins = "mpp4";
 490                                                 marvell,function = "gpio";
 491                                         };
 492
 493                                         pmx_gpio_5: pmx-gpio-5 {
 494                                                 marvell,pins = "mpp5";
 495                                                 marvell,function = "gpio";
 496                                         };
 497
 498                                         pmx_gpio_6: pmx-gpio-6 {
 499                                                 marvell,pins = "mpp6";
 500                                                 marvell,function = "gpio";
 501                                         };
 502
 503                                         pmx_gpio_7: pmx-gpio-7 {
 504                                                 marvell,pins = "mpp7";
 505                                                 marvell,function = "gpio";
 506                                         };
 507
 508                                         pmx_gpio_8: pmx-gpio-8 {
 509                                                 marvell,pins = "mpp8";
 510                                                 marvell,function = "gpio";
 511                                         };
 512
 513                                         pmx_gpio_9: pmx-gpio-9 {
 514                                                 marvell,pins = "mpp9";
 515                                                 marvell,function = "gpio";
 516                                         };
 517
 518                                         pmx_pcie1_clkreq: pmx-pcie1-clkreq {
 519                                                 marvell,pins = "mpp9";
 520                                                 marvell,function = "pex1";
 521                                         };
 522
 523                                         pmx_gpio_10: pmx-gpio-10 {
 524                                                 marvell,pins = "mpp10";
 525                                                 marvell,function = "gpio";
 526                                         };
 527
 528                                         pmx_gpio_11: pmx-gpio-11 {
 529                                                 marvell,pins = "mpp11";
 530                                                 marvell,function = "gpio";
 531                                         };
 532
 533                                         pmx_pcie0_clkreq: pmx-pcie0-clkreq {
 534                                                 marvell,pins = "mpp11";
 535                                                 marvell,function = "pex0";
 536                                         };
 537
 538                                         pmx_gpio_12: pmx-gpio-12 {
 539                                                 marvell,pins = "mpp12";
 540                                                 marvell,function = "gpio";
 541                                         };
 542
 543                                         pmx_gpio_13: pmx-gpio-13 {
 544                                                 marvell,pins = "mpp13";
 545                                                 marvell,function = "gpio";
 546                                         };
 547
 548                                         pmx_audio1_extclk: pmx-audio1-extclk {
 549                                                 marvell,pins = "mpp13";
 550                                                 marvell,function = "audio1";
 551                                         };
 552
 553                                         pmx_gpio_14: pmx-gpio-14 {
 554                                                 marvell,pins = "mpp14";
 555                                                 marvell,function = "gpio";
 556                                         };
 557
 558                                         pmx_gpio_15: pmx-gpio-15 {
 559                                                 marvell,pins = "mpp15";
 560                                                 marvell,function = "gpio";
 561                                         };
 562
 563                                         pmx_gpio_16: pmx-gpio-16 {
 564                                                 marvell,pins = "mpp16";
 565                                                 marvell,function = "gpio";
 566                                         };
 567
 568                                         pmx_gpio_17: pmx-gpio-17 {
 569                                                 marvell,pins = "mpp17";
 570                                                 marvell,function = "gpio";
 571                                         };
 572
 573                                         pmx_gpio_18: pmx-gpio-18 {
 574                                                 marvell,pins = "mpp18";
 575                                                 marvell,function = "gpio";
 576                                         };
 577
 578                                         pmx_gpio_19: pmx-gpio-19 {
 579                                                 marvell,pins = "mpp19";
 580                                                 marvell,function = "gpio";
 581                                         };
 582
 583                                         pmx_gpio_20: pmx-gpio-20 {
 584                                                 marvell,pins = "mpp20";
 585                                                 marvell,function = "gpio";
 586                                         };
 587
 588                                         pmx_gpio_21: pmx-gpio-21 {
 589                                                 marvell,pins = "mpp21";
 590                                                 marvell,function = "gpio";
 591                                         };
 592
 593                                         pmx_camera: pmx-camera {
 594                                                 marvell,pins = "mpp_camera";
 595                                                 marvell,function = "camera";
 596                                         };
 597
 598                                         pmx_camera_gpio: pmx-camera-gpio {
 599                                                 marvell,pins = "mpp_camera";
 600                                                 marvell,function = "gpio";
 601                                         };
 602
 603                                         pmx_sdio0: pmx-sdio0 {
 604                                                 marvell,pins = "mpp_sdio0";
 605                                                 marvell,function = "sdio0";
 606                                         };
 607
 608                                         pmx_sdio0_gpio: pmx-sdio0-gpio {
 609                                                 marvell,pins = "mpp_sdio0";
 610                                                 marvell,function = "gpio";
 611                                         };
 612
 613                                         pmx_sdio1: pmx-sdio1 {
 614                                                 marvell,pins = "mpp_sdio1";
 615                                                 marvell,function = "sdio1";
 616                                         };
 617
 618                                         pmx_sdio1_gpio: pmx-sdio1-gpio {
 619                                                 marvell,pins = "mpp_sdio1";
 620                                                 marvell,function = "gpio";
 621                                         };
 622
 623                                         pmx_audio1_gpio: pmx-audio1-gpio {
 624                                                 marvell,pins = "mpp_audio1";
 625                                                 marvell,function = "gpio";
 626                                         };
 627
 628                                         pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo {
 629                                                 marvell,pins = "mpp_audio1";
 630                                                 marvell,function = "i2s1/spdifo";
 631                                         };
 632
 633                                         pmx_spi0: pmx-spi0 {
 634                                                 marvell,pins = "mpp_spi0";
 635                                                 marvell,function = "spi0";
 636                                         };
 637
 638                                         pmx_spi0_gpio: pmx-spi0-gpio {
 639                                                 marvell,pins = "mpp_spi0";
 640                                                 marvell,function = "gpio";
 641                                         };
 642
 643                                         pmx_spi1_4_7: pmx-spi1-4-7 {
 644                                                 marvell,pins = "mpp4", "mpp5",
 645                                                         "mpp6", "mpp7";
 646                                                 marvell,function = "spi1";
 647                                         };
 648
 649                                         pmx_spi1_20_23: pmx-spi1-20-23 {
 650                                                 marvell,pins = "mpp20", "mpp21",
 651                                                         "mpp22", "mpp23";
 652                                                 marvell,function = "spi1";
 653                                         };
 654
 655                                         pmx_uart1: pmx-uart1 {
 656                                                 marvell,pins = "mpp_uart1";
 657                                                 marvell,function = "uart1";
 658                                         };
 659
 660                                         pmx_uart1_gpio: pmx-uart1-gpio {
 661                                                 marvell,pins = "mpp_uart1";
 662                                                 marvell,function = "gpio";
 663                                         };
 664
 665                                         pmx_nand: pmx-nand {
 666                                                 marvell,pins = "mpp_nand";
 667                                                 marvell,function = "nand";
 668                                         };
 669
 670                                         pmx_nand_gpo: pmx-nand-gpo {
 671                                                 marvell,pins = "mpp_nand";
 672                                                 marvell,function = "gpo";
 673                                         };
 674
 675                                         pmx_i2c1: pmx-i2c1 {
 676                                                 marvell,pins = "mpp17", "mpp19";
 677                                                 marvell,function = "twsi";
 678                                         };
 679
 680                                         pmx_i2c2: pmx-i2c2 {
 681                                                 marvell,pins = "mpp_audio1";
 682                                                 marvell,function = "twsi";
 683                                         };
 684
 685                                         pmx_ssp_i2c2: pmx-ssp-i2c2 {
 686                                                 marvell,pins = "mpp_audio1";
 687                                                 marvell,function = "ssp/twsi";
 688                                         };
 689
 690                                         pmx_i2cmux_0: pmx-i2cmux-0 {
 691                                                 marvell,pins = "twsi";
 692                                                 marvell,function = "twsi-opt1";
 693                                         };
 694
 695                                         pmx_i2cmux_1: pmx-i2cmux-1 {
 696                                                 marvell,pins = "twsi";
 697                                                 marvell,function = "twsi-opt2";
 698                                         };
 699
 700                                         pmx_i2cmux_2: pmx-i2cmux-2 {
 701                                                 marvell,pins = "twsi";
 702                                                 marvell,function = "twsi-opt3";
 703                                         };
 704                                 };
 705
 706                                 core_clk: core-clocks@0214 {
 707                                         compatible = "marvell,dove-core-clock";
 708                                         reg = <0x0214 0x4>;
 709                                         #clock-cells = <1>;
 710                                 };
 711
 712                                 gpio0: gpio-ctrl@0400 {
 713                                         compatible = "marvell,orion-gpio";
 714                                         #gpio-cells = <2>;
 715                                         gpio-controller;
 716                                         reg = <0x0400 0x20>;
 717                                         ngpios = <32>;
 718                                         interrupt-controller;
 719                                         #interrupt-cells = <2>;
 720                                         interrupt-parent = <&intc>;
 721                                         interrupts = <12>, <13>, <14>, <60>;
 722                                 };
 723
 724                                 gpio1: gpio-ctrl@0420 {
 725                                         compatible = "marvell,orion-gpio";
 726                                         #gpio-cells = <2>;
 727                                         gpio-controller;
 728                                         reg = <0x0420 0x20>;
 729                                         ngpios = <32>;
 730                                         interrupt-controller;
 731                                         #interrupt-cells = <2>;
 732                                         interrupt-parent = <&intc>;
 733                                         interrupts = <61>;
 734                                 };
 735
 736                                 rtc: real-time-clock@8500 {
 737                                         compatible = "marvell,orion-rtc";
 738                                         reg = <0x8500 0x20>;
 739                                         interrupts = <5>;
 740                                 };
 741                         };
 742
 743                         gconf: global-config@e802c {
 744                                 compatible = "marvell,dove-global-config",
 745                                              "syscon";
 746                                 reg = <0xe802c 0x14>;
 747                         };
 748
 749                         gpio2: gpio-ctrl@e8400 {
 750                                 compatible = "marvell,orion-gpio";
 751                                 #gpio-cells = <2>;
 752                                 gpio-controller;
 753                                 reg = <0xe8400 0x0c>;
 754                                 ngpios = <8>;
 755                         };
 756
 757                         lcd1: lcd-controller@810000 {
 758                                 compatible = "marvell,dove-lcd";
 759                                 reg = <0x810000 0x1000>;
 760                                 interrupts = <46>;
 761                                 status = "disabled";
 762                         };
 763
 764                         lcd0: lcd-controller@820000 {
 765                                 compatible = "marvell,dove-lcd";
 766                                 reg = <0x820000 0x1000>;
 767                                 interrupts = <47>;
 768                                 status = "disabled";
 769                         };
 770                 };
 771         };
 772 };