arch/mips/include/asm/irqflags.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
   7  * Copyright (C) 1996 by Paul M. Antoine
   8  * Copyright (C) 1999 Silicon Graphics
   9  * Copyright (C) 2000 MIPS Technologies, Inc.
  10  */
  11 #ifndef _ASM_IRQFLAGS_H
  12 #define _ASM_IRQFLAGS_H
  13
  14 #ifndef __ASSEMBLY__
  15
  16 #include <linux/compiler.h>
  17 #include <linux/stringify.h>
  18 #include <asm/compiler.h>
  19 #include <asm/hazards.h>
  20
  21 #if defined(CONFIG_CPU_MIPSR2) || defined (CONFIG_CPU_MIPSR6)
  22
  23 static inline void arch_local_irq_disable(void)
  24 {
  25         __asm__ __volatile__(
  26         "       .set    push                                            \n"
  27         "       .set    noat                                            \n"
  28         "       di                                                      \n"
  29         "       " __stringify(__irq_disable_hazard) "                   \n"
  30         "       .set    pop                                             \n"
  31         : /* no outputs */
  32         : /* no inputs */
  33         : "memory");
  34 }
  35
  36 static inline unsigned long arch_local_irq_save(void)
  37 {
  38         unsigned long flags;
  39
  40         asm __volatile__(
  41         "       .set    push                                            \n"
  42         "       .set    reorder                                         \n"
  43         "       .set    noat                                            \n"
  44         "       di      %[flags]                                        \n"
  45         "       andi    %[flags], 1                                     \n"
  46         "       " __stringify(__irq_disable_hazard) "                   \n"
  47         "       .set    pop                                             \n"
  48         : [flags] "=r" (flags)
  49         : /* no inputs */
  50         : "memory");
  51
  52         return flags;
  53 }
  54
  55 static inline void arch_local_irq_restore(unsigned long flags)
  56 {
  57         unsigned long __tmp1;
  58
  59         __asm__ __volatile__(
  60         "       .set    push                                            \n"
  61         "       .set    noreorder                                       \n"
  62         "       .set    noat                                            \n"
  63 #if defined(CONFIG_IRQ_MIPS_CPU)
  64         /*
  65          * Slow, but doesn't suffer from a relatively unlikely race
  66          * condition we're having since days 1.
  67          */
  68         "       beqz    %[flags], 1f                                    \n"
  69         "       di                                                      \n"
  70         "       ei                                                      \n"
  71         "1:                                                             \n"
  72 #else
  73         /*
  74          * Fast, dangerous.  Life is fun, life is good.
  75          */
  76         "       mfc0    $1, $12                                         \n"
  77         "       ins     $1, %[flags], 0, 1                              \n"
  78         "       mtc0    $1, $12                                         \n"
  79 #endif
  80         "       " __stringify(__irq_disable_hazard) "                   \n"
  81         "       .set    pop                                             \n"
  82         : [flags] "=r" (__tmp1)
  83         : "0" (flags)
  84         : "memory");
  85 }
  86
  87 static inline void __arch_local_irq_restore(unsigned long flags)
  88 {
  89         __asm__ __volatile__(
  90         "       .set    push                                            \n"
  91         "       .set    noreorder                                       \n"
  92         "       .set    noat                                            \n"
  93 #if defined(CONFIG_IRQ_MIPS_CPU)
  94         /*
  95          * Slow, but doesn't suffer from a relatively unlikely race
  96          * condition we're having since days 1.
  97          */
  98         "       beqz    %[flags], 1f                                    \n"
  99         "       di                                                      \n"
 100         "       ei                                                      \n"
 101         "1:                                                             \n"
 102 #else
 103         /*
 104          * Fast, dangerous.  Life is fun, life is good.
 105          */
 106         "       mfc0    $1, $12                                         \n"
 107         "       ins     $1, %[flags], 0, 1                              \n"
 108         "       mtc0    $1, $12                                         \n"
 109 #endif
 110         "       " __stringify(__irq_disable_hazard) "                   \n"
 111         "       .set    pop                                             \n"
 112         : [flags] "=r" (flags)
 113         : "0" (flags)
 114         : "memory");
 115 }
 116 #else
 117 /* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
 118 void arch_local_irq_disable(void);
 119 unsigned long arch_local_irq_save(void);
 120 void arch_local_irq_restore(unsigned long flags);
 121 void __arch_local_irq_restore(unsigned long flags);
 122 #endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
 123
 124 static inline void arch_local_irq_enable(void)
 125 {
 126         __asm__ __volatile__(
 127         "       .set    push                                            \n"
 128         "       .set    reorder                                         \n"
 129         "       .set    noat                                            \n"
 130 #if   defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
 131         "       ei                                                      \n"
 132 #else
 133         "       mfc0    $1,$12                                          \n"
 134         "       ori     $1,0x1f                                         \n"
 135         "       xori    $1,0x1e                                         \n"
 136         "       mtc0    $1,$12                                          \n"
 137 #endif
 138         "       " __stringify(__irq_enable_hazard) "                    \n"
 139         "       .set    pop                                             \n"
 140         : /* no outputs */
 141         : /* no inputs */
 142         : "memory");
 143 }
 144
 145 static inline unsigned long arch_local_save_flags(void)
 146 {
 147         unsigned long flags;
 148
 149         asm __volatile__(
 150         "       .set    push                                            \n"
 151         "       .set    reorder                                         \n"
 152         "       mfc0    %[flags], $12                                   \n"
 153         "       .set    pop                                             \n"
 154         : [flags] "=r" (flags));
 155
 156         return flags;
 157 }
 158
 159
 160 static inline int arch_irqs_disabled_flags(unsigned long flags)
 161 {
 162         return !(flags & 1);
 163 }
 164
 165 #endif /* #ifndef __ASSEMBLY__ */
 166
 167 /*
 168  * Do the CPU's IRQ-state tracing from assembly code.
 169  */
 170 #ifdef CONFIG_TRACE_IRQFLAGS
 171 /* Reload some registers clobbered by trace_hardirqs_on */
 172 #ifdef CONFIG_64BIT
 173 # define TRACE_IRQS_RELOAD_REGS                                         \
 174         LONG_L  $11, PT_R11(sp);                                        \
 175         LONG_L  $10, PT_R10(sp);                                        \
 176         LONG_L  $9, PT_R9(sp);                                          \
 177         LONG_L  $8, PT_R8(sp);                                          \
 178         LONG_L  $7, PT_R7(sp);                                          \
 179         LONG_L  $6, PT_R6(sp);                                          \
 180         LONG_L  $5, PT_R5(sp);                                          \
 181         LONG_L  $4, PT_R4(sp);                                          \
 182         LONG_L  $2, PT_R2(sp)
 183 #else
 184 # define TRACE_IRQS_RELOAD_REGS                                         \
 185         LONG_L  $7, PT_R7(sp);                                          \
 186         LONG_L  $6, PT_R6(sp);                                          \
 187         LONG_L  $5, PT_R5(sp);                                          \
 188         LONG_L  $4, PT_R4(sp);                                          \
 189         LONG_L  $2, PT_R2(sp)
 190 #endif
 191 # define TRACE_IRQS_ON                                                  \
 192         CLI;    /* make sure trace_hardirqs_on() is called in kernel level */ \
 193         jal     trace_hardirqs_on
 194 # define TRACE_IRQS_ON_RELOAD                                           \
 195         TRACE_IRQS_ON;                                                  \
 196         TRACE_IRQS_RELOAD_REGS
 197 # define TRACE_IRQS_OFF                                                 \
 198         jal     trace_hardirqs_off
 199 #else
 200 # define TRACE_IRQS_ON
 201 # define TRACE_IRQS_ON_RELOAD
 202 # define TRACE_IRQS_OFF
 203 #endif
 204
 205 #endif /* _ASM_IRQFLAGS_H */