blk: rq_data_dir() should not return a boolean
[cris-mirror.git] / arch / mips / include / asm / uasm.h
blobfc1cdd25fcda3fa7b632b23039a3b810ef47d322
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
7 * Copyright (C) 2005 Maciej W. Rozycki
8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
12 #include <linux/types.h>
14 #ifdef CONFIG_EXPORT_UASM
15 #include <linux/export.h>
16 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
17 #else
18 #define UASM_EXPORT_SYMBOL(sym)
19 #endif
21 #define _UASM_ISA_CLASSIC 0
22 #define _UASM_ISA_MICROMIPS 1
24 #ifndef UASM_ISA
25 #ifdef CONFIG_CPU_MICROMIPS
26 #define UASM_ISA _UASM_ISA_MICROMIPS
27 #else
28 #define UASM_ISA _UASM_ISA_CLASSIC
29 #endif
30 #endif
32 #if (UASM_ISA == _UASM_ISA_CLASSIC)
33 #ifdef CONFIG_CPU_MICROMIPS
34 #define ISAOPC(op) CL_uasm_i##op
35 #define ISAFUNC(x) CL_##x
36 #else
37 #define ISAOPC(op) uasm_i##op
38 #define ISAFUNC(x) x
39 #endif
40 #elif (UASM_ISA == _UASM_ISA_MICROMIPS)
41 #ifdef CONFIG_CPU_MICROMIPS
42 #define ISAOPC(op) uasm_i##op
43 #define ISAFUNC(x) x
44 #else
45 #define ISAOPC(op) MM_uasm_i##op
46 #define ISAFUNC(x) MM_##x
47 #endif
48 #else
49 #error Unsupported micro-assembler ISA!!!
50 #endif
52 #define Ip_u1u2u3(op) \
53 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
55 #define Ip_u2u1u3(op) \
56 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
58 #define Ip_u3u2u1(op) \
59 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
61 #define Ip_u3u1u2(op) \
62 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
64 #define Ip_u1u2s3(op) \
65 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
67 #define Ip_u2s3u1(op) \
68 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
70 #define Ip_s3s1s2(op) \
71 void ISAOPC(op)(u32 **buf, int a, int b, int c)
73 #define Ip_u2u1s3(op) \
74 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
76 #define Ip_u2u1msbu3(op) \
77 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
78 unsigned int d)
80 #define Ip_u1u2(op) \
81 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
83 #define Ip_u2u1(op) \
84 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
86 #define Ip_u1s2(op) \
87 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
89 #define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
91 #define Ip_0(op) void ISAOPC(op)(u32 **buf)
93 Ip_u2u1s3(_addiu);
94 Ip_u3u1u2(_addu);
95 Ip_u3u1u2(_and);
96 Ip_u2u1u3(_andi);
97 Ip_u1u2s3(_bbit0);
98 Ip_u1u2s3(_bbit1);
99 Ip_u1u2s3(_beq);
100 Ip_u1u2s3(_beql);
101 Ip_u1s2(_bgez);
102 Ip_u1s2(_bgezl);
103 Ip_u1s2(_bltz);
104 Ip_u1s2(_bltzl);
105 Ip_u1u2s3(_bne);
106 Ip_u2s3u1(_cache);
107 Ip_u2u1s3(_daddiu);
108 Ip_u3u1u2(_daddu);
109 Ip_u2u1msbu3(_dins);
110 Ip_u2u1msbu3(_dinsm);
111 Ip_u1u2(_divu);
112 Ip_u1u2u3(_dmfc0);
113 Ip_u1u2u3(_dmtc0);
114 Ip_u2u1u3(_drotr);
115 Ip_u2u1u3(_drotr32);
116 Ip_u2u1u3(_dsll);
117 Ip_u2u1u3(_dsll32);
118 Ip_u2u1u3(_dsra);
119 Ip_u2u1u3(_dsrl);
120 Ip_u2u1u3(_dsrl32);
121 Ip_u3u1u2(_dsubu);
122 Ip_0(_eret);
123 Ip_u2u1msbu3(_ext);
124 Ip_u2u1msbu3(_ins);
125 Ip_u1(_j);
126 Ip_u1(_jal);
127 Ip_u2u1(_jalr);
128 Ip_u1(_jr);
129 Ip_u2s3u1(_lb);
130 Ip_u2s3u1(_ld);
131 Ip_u3u1u2(_ldx);
132 Ip_u2s3u1(_lh);
133 Ip_u2s3u1(_ll);
134 Ip_u2s3u1(_lld);
135 Ip_u1s2(_lui);
136 Ip_u2s3u1(_lw);
137 Ip_u3u1u2(_lwx);
138 Ip_u1u2u3(_mfc0);
139 Ip_u1u2u3(_mfhc0);
140 Ip_u1(_mfhi);
141 Ip_u1(_mflo);
142 Ip_u1u2u3(_mtc0);
143 Ip_u1u2u3(_mthc0);
144 Ip_u3u1u2(_mul);
145 Ip_u3u1u2(_or);
146 Ip_u2u1u3(_ori);
147 Ip_u2s3u1(_pref);
148 Ip_0(_rfe);
149 Ip_u2u1u3(_rotr);
150 Ip_u2s3u1(_sc);
151 Ip_u2s3u1(_scd);
152 Ip_u2s3u1(_sd);
153 Ip_u2u1u3(_sll);
154 Ip_u3u2u1(_sllv);
155 Ip_s3s1s2(_slt);
156 Ip_u2u1s3(_sltiu);
157 Ip_u3u1u2(_sltu);
158 Ip_u2u1u3(_sra);
159 Ip_u2u1u3(_srl);
160 Ip_u3u2u1(_srlv);
161 Ip_u3u1u2(_subu);
162 Ip_u2s3u1(_sw);
163 Ip_u1(_sync);
164 Ip_u1(_syscall);
165 Ip_0(_tlbp);
166 Ip_0(_tlbr);
167 Ip_0(_tlbwi);
168 Ip_0(_tlbwr);
169 Ip_u1(_wait);
170 Ip_u2u1(_wsbh);
171 Ip_u3u1u2(_xor);
172 Ip_u2u1u3(_xori);
173 Ip_u2u1(_yield);
176 /* Handle labels. */
177 struct uasm_label {
178 u32 *addr;
179 int lab;
182 void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
183 int lid);
184 #ifdef CONFIG_64BIT
185 int ISAFUNC(uasm_in_compat_space_p)(long addr);
186 #endif
187 int ISAFUNC(uasm_rel_hi)(long val);
188 int ISAFUNC(uasm_rel_lo)(long val);
189 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
190 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
192 #define UASM_L_LA(lb) \
193 static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
195 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
198 /* convenience macros for instructions */
199 #ifdef CONFIG_64BIT
200 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
201 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
202 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
203 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
204 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
205 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
206 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
207 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
208 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
209 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
210 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
211 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
212 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
213 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
214 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
215 #else
216 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
217 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
218 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
219 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
220 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
221 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
222 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
223 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
224 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
225 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
226 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
227 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
228 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
229 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
230 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
231 #endif
233 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
234 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
235 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
236 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
237 #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
238 #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
239 #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
240 #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
241 #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
243 static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
244 unsigned int a2, unsigned int a3)
246 if (a3 < 32)
247 ISAOPC(_drotr)(p, a1, a2, a3);
248 else
249 ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
252 static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
253 unsigned int a2, unsigned int a3)
255 if (a3 < 32)
256 ISAOPC(_dsll)(p, a1, a2, a3);
257 else
258 ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
261 static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
262 unsigned int a2, unsigned int a3)
264 if (a3 < 32)
265 ISAOPC(_dsrl)(p, a1, a2, a3);
266 else
267 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
270 /* Handle relocations. */
271 struct uasm_reloc {
272 u32 *addr;
273 unsigned int type;
274 int lab;
277 /* This is zero so we can use zeroed label arrays. */
278 #define UASM_LABEL_INVALID 0
280 void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
281 void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
282 void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
283 void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
284 void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
285 u32 *first, u32 *end, u32 *target);
286 int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
288 /* Convenience functions for labeled branches. */
289 void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
290 void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
291 unsigned int bit, int lid);
292 void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
293 unsigned int bit, int lid);
294 void uasm_il_beq(u32 **p, struct uasm_reloc **r, unsigned int r1,
295 unsigned int r2, int lid);
296 void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
297 void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
298 void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
299 void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
300 void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
301 void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
302 unsigned int reg2, int lid);
303 void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);