blk: rq_data_dir() should not return a boolean
[cris-mirror.git] / arch / sh / include / asm / processor_64.h
blobeedd4f625d07650e1f392a37b45e22d765e51602
1 #ifndef __ASM_SH_PROCESSOR_64_H
2 #define __ASM_SH_PROCESSOR_64_H
4 /*
5 * include/asm-sh/processor_64.h
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 * Copyright (C) 2003 Paul Mundt
9 * Copyright (C) 2004 Richard Curnow
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
15 #ifndef __ASSEMBLY__
17 #include <linux/compiler.h>
18 #include <asm/page.h>
19 #include <asm/types.h>
20 #include <cpu/registers.h>
23 * Default implementation of macro that returns current
24 * instruction pointer ("program counter").
26 #define current_text_addr() ({ \
27 void *pc; \
28 unsigned long long __dummy = 0; \
29 __asm__("gettr tr0, %1\n\t" \
30 "pta 4, tr0\n\t" \
31 "gettr tr0, %0\n\t" \
32 "ptabs %1, tr0\n\t" \
33 :"=r" (pc), "=r" (__dummy) \
34 : "1" (__dummy)); \
35 pc; })
37 #endif
40 * User space process size: 2GB - 4k.
42 #define TASK_SIZE 0x7ffff000UL
44 #define STACK_TOP TASK_SIZE
45 #define STACK_TOP_MAX STACK_TOP
47 /* This decides where the kernel will search for a free chunk of vm
48 * space during mmap's.
50 #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
53 * Bit of SR register
55 * FD-bit:
56 * When it's set, it means the processor doesn't have right to use FPU,
57 * and it results exception when the floating operation is executed.
59 * IMASK-bit:
60 * Interrupt level mask
62 * STEP-bit:
63 * Single step bit
66 #if defined(CONFIG_SH64_SR_WATCH)
67 #define SR_MMU 0x84000000
68 #else
69 #define SR_MMU 0x80000000
70 #endif
72 #define SR_IMASK 0x000000f0
73 #define SR_FD 0x00008000
74 #define SR_SSTEP 0x08000000
76 #ifndef __ASSEMBLY__
79 * FPU structure and data : require 8-byte alignment as we need to access it
80 with fld.p, fst.p
83 struct sh_fpu_hard_struct {
84 unsigned long fp_regs[64];
85 unsigned int fpscr;
86 /* long status; * software status information */
89 /* Dummy fpu emulator */
90 struct sh_fpu_soft_struct {
91 unsigned long fp_regs[64];
92 unsigned int fpscr;
93 unsigned char lookahead;
94 unsigned long entry_pc;
97 union thread_xstate {
98 struct sh_fpu_hard_struct hardfpu;
99 struct sh_fpu_soft_struct softfpu;
101 * The structure definitions only produce 32 bit alignment, yet we need
102 * to access them using 64 bit load/store as well.
104 unsigned long long alignment_dummy;
107 struct thread_struct {
108 unsigned long sp;
109 unsigned long pc;
111 /* Various thread flags, see SH_THREAD_xxx */
112 unsigned long flags;
114 /* This stores the address of the pt_regs built during a context
115 switch, or of the register save area built for a kernel mode
116 exception. It is used for backtracing the stack of a sleeping task
117 or one that traps in kernel mode. */
118 struct pt_regs *kregs;
119 /* This stores the address of the pt_regs constructed on entry from
120 user mode. It is a fixed value over the lifetime of a process, or
121 NULL for a kernel thread. */
122 struct pt_regs *uregs;
124 unsigned long address;
125 /* Hardware debugging registers may come here */
127 /* floating point info */
128 union thread_xstate *xstate;
131 * fpu_counter contains the number of consecutive context switches
132 * that the FPU is used. If this is over a threshold, the lazy fpu
133 * saving becomes unlazy to save the trap. This is an unsigned char
134 * so that after 256 times the counter wraps and the behavior turns
135 * lazy again; this to deal with bursty apps that only use FPU for
136 * a short time
138 unsigned char fpu_counter;
141 #define INIT_MMAP \
142 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
144 #define INIT_THREAD { \
145 .sp = sizeof(init_stack) + \
146 (long) &init_stack, \
147 .pc = 0, \
148 .kregs = &fake_swapper_regs, \
149 .uregs = NULL, \
150 .address = 0, \
151 .flags = 0, \
155 * Do necessary setup to start up a newly executed thread.
157 #define SR_USER (SR_MMU | SR_FD)
159 #define start_thread(_regs, new_pc, new_sp) \
160 _regs->sr = SR_USER; /* User mode. */ \
161 _regs->pc = new_pc - 4; /* Compensate syscall exit */ \
162 _regs->pc |= 1; /* Set SHmedia ! */ \
163 _regs->regs[18] = 0; \
164 _regs->regs[15] = new_sp
166 /* Forward declaration, a strange C thing */
167 struct task_struct;
168 struct mm_struct;
170 /* Free all resources held by a thread. */
171 extern void release_thread(struct task_struct *);
173 /* Copy and release all segment info associated with a VM */
174 #define copy_segments(p, mm) do { } while (0)
175 #define release_segments(mm) do { } while (0)
176 #define forget_segments() do { } while (0)
178 * FPU lazy state save handling.
181 static inline void disable_fpu(void)
183 unsigned long long __dummy;
185 /* Set FD flag in SR */
186 __asm__ __volatile__("getcon " __SR ", %0\n\t"
187 "or %0, %1, %0\n\t"
188 "putcon %0, " __SR "\n\t"
189 : "=&r" (__dummy)
190 : "r" (SR_FD));
193 static inline void enable_fpu(void)
195 unsigned long long __dummy;
197 /* Clear out FD flag in SR */
198 __asm__ __volatile__("getcon " __SR ", %0\n\t"
199 "and %0, %1, %0\n\t"
200 "putcon %0, " __SR "\n\t"
201 : "=&r" (__dummy)
202 : "r" (~SR_FD));
205 /* Round to nearest, no exceptions on inexact, overflow, underflow,
206 zero-divide, invalid. Configure option for whether to flush denorms to
207 zero, or except if a denorm is encountered. */
208 #if defined(CONFIG_SH64_FPU_DENORM_FLUSH)
209 #define FPSCR_INIT 0x00040000
210 #else
211 #define FPSCR_INIT 0x00000000
212 #endif
214 #ifdef CONFIG_SH_FPU
215 /* Initialise the FP state of a task */
216 void fpinit(struct sh_fpu_hard_struct *fpregs);
217 #else
218 #define fpinit(fpregs) do { } while (0)
219 #endif
221 extern struct task_struct *last_task_used_math;
224 * Return saved PC of a blocked thread.
226 #define thread_saved_pc(tsk) (tsk->thread.pc)
228 extern unsigned long get_wchan(struct task_struct *p);
230 #define KSTK_EIP(tsk) ((tsk)->thread.pc)
231 #define KSTK_ESP(tsk) ((tsk)->thread.sp)
233 #endif /* __ASSEMBLY__ */
234 #endif /* __ASM_SH_PROCESSOR_64_H */